Commit graph

108 commits

Author SHA1 Message Date
Jonas Karlman
3b4e6e9462 video: rockchip: dw_mipi_dsi: Use generic_phy_valid() helper
The documentation for struct phy state that "The content of the
structure is managed solely by the PHY API and PHY drivers".

Change to use the generic_phy_valid() helper to check if phy is valid.

Fixes: b7d8d40346 ("video: rockchip: dw_mipi_dsi: Fix external phy existence check")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-09-13 15:52:21 -04:00
Ondrej Jirman
0825522eea video: rockchip: Add support for RK3399 to dw-mipi-dsi bridge
This just needs some extra clocks enabled, and different registers
configured. Copied from Linux, just like the original submitter
of this driver did for rk3568.

Tested on Pinephone Pro.

Signed-off-by: Ondrej Jirman <megi@xff.cz>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@vrull.eu>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28 18:45:02 +08:00
Ondrej Jirman
bd6375c551 video: rockchip: dw_mipi_dsi: Fix GRF access
Use proper register base and access method to access GRF registers.
GRF registers start at a completely different base, and need special
access method, that sets the change mask in the 16 MSBs.

Signed-off-by: Ondrej Jirman <megi@xff.cz>
2023-07-14 18:30:58 +02:00
Ondrej Jirman
7c5f278a03 video: rockchip: dw_mipi_dsi: Correct check for lacking phy phandle
If phy is not defined in DT (eg. on rk3399), generic_phy_get_by_name
will return -ENODATA. Handle that case correctly.

Signed-off-by: Ondrej Jirman <megi@xff.cz>
2023-07-14 18:29:11 +02:00
Ondrej Jirman
dc3f2403c2 video: rockchip: dw_mipi_dsi: Fix best_rate calculation
pllref_clk is unused after being retrieved. fin needs to be set
to dsi->ref clock's rate for the following calculation to work.
Otherwise fin is undefined, and calculation return bogus number
based on undefined variable.

Signed-off-by: Ondrej Jirman <megi@xff.cz>
2023-07-14 18:27:43 +02:00
Ondrej Jirman
4158d7f987 video: rockchip: dw_mipi_dsi: Return 0 from dsi_phy_init on success
ret is undefined if external phy is not used resulting in bogus
error being returned in that scenario.

Signed-off-by: Ondrej Jirman <megi@xff.cz>
2023-07-14 18:25:09 +02:00
Ondrej Jirman
14dd77fdc4 video: rockchip: dw_mipi_dsi: Fix error path checks in probe function
Wrong return codes were checked in several places. Check the proper ones.

Signed-off-by: Ondrej Jirman <megi@xff.cz>
2023-07-14 18:23:40 +02:00
Ondrej Jirman
b7d8d40346 video: rockchip: dw_mipi_dsi: Fix external phy existence check
&priv->phy is always true. Compiler warns about this loudly.

Use a propper check for phy device allocation. Without this fix
using this driver with SoC that doesn't use external phy (eg. RK3399)
doesn't work.

Signed-off-by: Ondrej Jirman <megi@xff.cz>
2023-07-14 18:19:08 +02:00
Ondrej Jirman
f4c7efe011 video: rockchip: vop: Fix whitespace
Fix confusing use of indentation.

Signed-off-by: Ondrej Jirman <megi@xff.cz>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-14 18:15:01 +02:00
Johan Jonker
a12a73b664 drivers: use dev_read_addr_ptr when cast to pointer
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
dev_read_addr_ptr instead of the dev_read_addr function in the
various files in the drivers directory that cast to a pointer.
As we are there also streamline the error response to -EINVAL on return.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-06 17:28:18 +08:00
Chris Morgan
6fa83833b0 rockchip: video: Add support for RK3568 DSI Host
Add support for DSI Host controller on Rockchip RK3568. This driver
is heavily based on the Rockchip dw_mipi_dsi_rockchip.c driver in
Linux and the stm32_dsi.c driver in U-Boot. It should be easy to add
support for other SoCs as the only missing component from the mainline
driver is setting the VOP big or VOP little (which the rk3568 does
not have).

Driver was tested for use in sending commands to a DSI panel in order
to obtain the panel ID.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-04-21 15:16:01 +08:00
Johan Jonker
e2b57ffbaf video: rockchip: rk_vop: add rk3288-dp compare string
In the current rk3288.dtsi file the compatible string for
the DisplayPort(DP) node ends with "edp". The string in the
binding ends with "dp" which conflicts with "cdn-dp" as a
search term. Add "rk3288-dp" as compare string to select
vop_id.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # chromebook-jerry
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-04-21 15:16:00 +08:00
Simon Glass
b86986c7b3 video: Rename CONFIG_DM_VIDEO to CONFIG_VIDEO
Now that all the old code is gone, rename this option. Driver model
migration is now complete.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:17 +01:00
Johan Jonker
dcaaefdc0a rockchip: video: mipi: add more compatible strings for rk3288/rk3399
The rk3288/RK3399 DT synced from Linux contains some different
compatible strings in the mipi node then origanal used in U-boot.
Allow both options to be backwards compatible and to be able
to handle recent rk3288.dtsi and rk3399.dtsi files.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
0944e77fde rockchip: video: rk_edp: add more rk3288 edp node options
The rk3288 DT synced from Linux contains some different
properties in the edp node then origanal used in U-boot.
Allow both options to be backwards compatible and to be able
to handle recent rk3288.dtsi files.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Heinrich Schuchardt
185f812c41 doc: replace @return by Return:
Sphinx expects Return: and not @return to indicate a return value.

find . -name '*.c' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

find . -name '*.h' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-19 18:11:34 +01:00
Wolfgang Denk
66356b4c06 WS cleanup: remove trailing empty lines
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-30 08:08:56 -04:00
Arnaud Patard (Rtp)
9749d2ea29 rockchip: video: vop: Add reset support
In order to ensure that the VOP registers are in correct state,
add missing support for the VOP reset lines found in the device-tree

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10 11:57:03 +02:00
Arnaud Patard (Rtp)
cd529f7ad6 rockchip: video: edp: Add missing reset support
In order to ensure that the eDP registers are in correct state,
add missing support for the eDP reset lines found in the device-tree.

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10 11:56:22 +02:00
Arnaud Patard (Rtp)
3fd64112ce rockchip: video: vop: Fix format of fbbase in debug string
The debug string printing the device name, framebuffer address and of node
is using %lu as format for the framebuffer address, which is not so nice.
Change it to %lx.

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10 11:55:37 +02:00
Arnaud Patard (Rtp)
decbc18ed2 Rockchip: video: vop: Reserve efi fb memory
When booting with EFI and graphics, the memory used for framebuffer
has to be reserved, otherwise it may leads to kernel memory
overwrite.

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10 11:53:36 +02:00
Arnaud Patard (Rtp)
04d67ceb1c rockchip: video: edp: Add rk3399 support
According to linux commit "drm/rockchip: analogix_dp: add rk3399 eDP
support" (82872e42bb1501dd9e60ca430f4bae45a469aa64), rk3288 and rk3399
eDP IPs are nearly the same, the difference is in the grf register
(SOC_CON6 versus SOC_CON20). So, change the code to use the right
register on each IP.

The clocks don't seem to be the same, the eDP clock is not at index 1
on rk3399, so don't try changing the clock at index 1 to rate 0 on
rk3399.

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10 11:51:56 +02:00
Arnaud Patard (Rtp)
7fe2ebf3a3 rockchip: video: vop: Use endpoint compatible string to find VOP mode
The current code is using an hard coded enum and the of node reg value of
endpoint to find out if the endpoint is mipi/hdmi/lvds/edp/dp. The order
is different between rk3288, rk3399 vop little, rk3399 vop big.

A possible solution would be to make sure that the rk3288.dtsi and
rk3399.dtsi files have "expected" reg value or an other solution is
to find the kind of endpoint by comparing the endpoint compatible value.

This patch is implementing the more flexible second solution.

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10 11:51:13 +02:00
Simon Glass
401d1c4f5d common: Drop asm/global_data.h from common header
Move this out of the common header and include it only where needed.  In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly.   Finally, we have a few
cases where we did not need to include <asm/global_data.h> at all, so
remove that include.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-02 15:33:42 -05:00
Simon Glass
f10643cf8a dm: core: Access device ofnode through functions
At present ofnode is present in the device even if it is never used. With
of-platdata this field is not used, so can be removed. In preparation for
this, change the access to go through inline functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
8a8d24bdf1 dm: treewide: Rename ..._platdata variables to just ..._plat
Try to maintain some consistency between these variables by using _plat as
a suffix for them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
d1998a9fde dm: treewide: Rename ofdata_to_platdata() to of_to_plat()
This name is far too long. Rename it to remove the 'data' bits. This makes
it consistent with the platdata->plat rename.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
caa4daa2ae dm: treewide: Rename 'platdata' variables to just 'plat'
We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).

Rename some of the latter variables to end with 'plat' for consistency.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:08 -07:00
Simon Glass
41575d8e4c dm: treewide: Rename auto_alloc_size members to be shorter
This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 08:00:25 -07:00
Alper Nebi Yasak
a355ece8e6 video: rockchip: Restrict EDP, VOP, MIPI files to GPL-2.0
These files have a lot of code in common with their counterparts in
coreboot, especially in their earlier revisions:

                  U-Boot                  |                  coreboot
    --------------------------------------|--------------------------------------------
    drivers/video/rockchip/:              | src/soc/rockchip/:
    - rk_edp.c          (GPL-2.0+)        | - common/edp.c          (GPL-2.0-only)
       "                                  | - rk3288/display.c      (GPL-2.0-only)
       "                                  | - rk3399/display.c      (GPL-2.0-only)
    - rk_hdmi.h         (GPL-2.0+)        | (none)
    - rk_hdmi.c         (GPL-2.0+)        | - rk3288/hdmi.c         (GPL-2.0-or-later)
    - rk3288_hdmi.c     (GPL-2.0+)        | - rk3288/hdmi.c         (GPL-2.0-or-later)
    - rk3399_hdmi.c     (GPL-2.0+)        | (none)
    - rk_mipi.h         (GPL-2.0+)        | (none)
    - rk_mipi.c         (GPL-2.0+)        | - rk3399/mipi.c         (GPL-2.0-only)
    - rk3288_mipi.c     (GPL-2.0+)        | - rk3399/mipi.c         (GPL-2.0-only)
    - rk3399_mipi.c     (GPL-2.0+)        | - rk3399/mipi.c         (GPL-2.0-only)
    - rk_lvds.c         (GPL-2.0+)        | (none)
    - rk_vop.h          (GPL-2.0+)        | (none)
    - rk_vop.c          (GPL-2.0+)        | - common/vop.c          (GPL-2.0-only)
    - rk3288_vop.c      (GPL-2.0+)        | - common/vop.c          (GPL-2.0-only)
    - rk3399_vop.c      (GPL-2.0+)        | (none)
                                          |
    arch/arm/include/asm/arch-rockchip/:  | src/soc/rockchip/*/include/soc/*:
    - edp_rk3288.h      (GPL-2.0+)        | - common/.../edp.h      (GPL-2.0-only)
       "                                  | - rk3288/.../display.h  (GPL-2.0-only)
       "                                  | - rk3399/.../display.h  (GPL-2.0-only)
    - vop_rk3288.h      (GPL-2.0+)        | - common/.../vop.h      (GPL-2.0-only)

Restrict the licenses to match coreboot's so that changes from coreboot
can be imported to U-Boot as necessary. HDMI files are already 2.0+
there and rk_lvds.c has no counterpart, so keep them as is.

Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Eric Gao <eric.gao@rock-chips.com>
Cc: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-11-13 18:16:11 +08:00
Jagan Teki
9abece3985 video: rockchip: Support 4K resolution for rk3288, HDMI
Like, rk3399 the rk3288 also supports 4K resolution.

So, enable it for rk3288 with HDMI platforms.

Right now, rockchip video drivers are supporting for rk3288,
rk3399 SoC families, so mark the 4K resolution by default
if it's an HDMI video out.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-10-30 23:09:01 +08:00
Alper Nebi Yasak
127c8d85cf video: rockchip: Add missing dpcd_write() call to link_train_ce()
Found this by comparing it to the coreboot driver, a form of this call
was introduced there in their commit b9a7877568cf ("rockchip/*: refactor
edp driver"). This is copy-pasted from U-Boot's link_train_cr() slightly
above it.

Without this on a gru-kevin chromebook, I have:

    clock recovery at voltage 0 pre-emphasis 0
    requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
    using signal parameters: voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
    using signal parameters: voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
    using signal parameters: voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
    using signal parameters: voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
    using signal parameters: voltage 0.4V pre_emph 3.5dB
    channel eq failed, ret=-5
    link train failed!
    rk_vop_probe() Device failed: ret=-5

With this, it looks like training succeeds:

    clock recovery at voltage 0 pre-emphasis 0
    requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
    using signal parameters: voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 0 voltage 0.4V pre_emph 6dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 6dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 6dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 6dB
    using signal parameters: voltage 0.4V pre_emph 6dB
    requested signal parameters: lane 0 voltage 0.4V pre_emph 0dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 0dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 0dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 0dB
    using signal parameters: voltage 0.4V pre_emph 0dB
    channel eq at voltage 0 pre-emphasis 0
    config video failed
    rk_vop_probe() Device failed: ret=-110

The "config video failed" error also goes away when I disable higher
log levels, and it claims to have successfully probed the device.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-10-30 18:20:03 +08:00
Walter Lozano
e3e2470fdd drivers: rename drivers to match compatible string
When using OF_PLATDATA, the bind process between devices and drivers
is performed trying to match compatible string with driver names.
However driver names are not strictly defined, and also there are different
names used when declaring a driver with U_BOOT_DRIVER, the name of the
symbol used in the linker list and the used in the struct driver_info.

In order to make things a bit more clear, rename the drivers names. This
will also help for further OF_PLATDATA improvements, such as checking
for valid driver names.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a fix for sandbox of-platdata to avoid using an invalid ANSI colour:
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Anatolij Gustschin
35ee34b2c2 video: rockchip: fix HDMI 4K resolution
3480 is not valid XRES, use 3840 as default.

Fixes: 05c65a82c3 ("video: rockchip: Support 4K resolution for rk3399, HDMI")
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # roc-rk3399-pc
2020-06-29 17:53:16 +02:00
Patrick Wildt
673eb44e91 rockchip: correctly set vop0 or vop1
The EDP_LCDC_SEL bit has to be set correctly to select vop0 or
vop1, but so far we have set it in both conditions, which is not
correct.

Can someone verify this is the correct way round?  vop1 -> set,
vop0 -> clear?

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-06-28 09:56:11 +08:00
Simon Glass
cd93d625fd common: Drop linux/bitops.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
c05ed00afb common: Drop linux/delay.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
f7ae49fc4f common: Drop log.h from common header
Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:18 -04:00
Kever Yang
653ac184ee rockchip: video: Convert to use APIs which support live DT
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-28 18:05:08 +08:00
Kever Yang
c3d31af6d6 rockchip: video: Use ofnode_decode_display_timing() to parse timing
Use ofnode_decode_display_timing() instead of
fdtdec_decode_display_timing() to parse display timing, so that we can
support live DT.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-28 18:05:08 +08:00
Peter Robinson
973e31fd47 drivers: video: rockchip: fix building eDP and LVDS drivers
The rk_edp.c and rk_lvds.c files reference rk_setreg which is declared in
hardware.h so include it so the drivers build. Adjust rk_lvds.c so
includes are in alphabetical order while updating.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
2020-04-26 22:58:50 +02:00
Jagan Teki
05c65a82c3 video: rockchip: Support 4K resolution for rk3399, HDMI
The default resolution for rockchip display is 1920x1080
which failed to work on 4K HDMI out displays on rk3399.

So, mark the default resolution as 3480x2160 for rk3399
HDMI out.

This would work all the hdmi display resolutions till
4K.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2020-04-02 15:52:01 +02:00
Jagan Teki
e67243f1a3 video: rockchip: Fix vop modes for rk3399
VOP display endpoint pipeline configuration differs
between rk3288 vs rk3399.

These VOP pipeline configuration depends on how the
different display interfaces connected in sequence to
IN and OUT ports like for,

RK3288:

vopb_out: port {
	#address-cells = <1>;
	#size-cells = <0>;
	vopb_out_edp: endpoint@0 {
		reg = <0>;
		remote-endpoint = <&edp_in_vopb>;
	};
	vopb_out_hdmi: endpoint@1 {
		reg = <1>;
                remote-endpoint = <&hdmi_in_vopb>;
        };
        vopb_out_lvds: endpoint@2 {
                reg = <2>;
                remote-endpoint = <&lvds_in_vopb>;
        };
        vopb_out_mipi: endpoint@3 {
                reg = <3>;
                remote-endpoint = <&mipi_in_vopb>;
        };
};

RK3399:

vopb_out: port {
         #address-cells = <1>;
         #size-cells = <0>;
         vopb_out_edp: endpoint@0 {
                reg = <0>;
                remote-endpoint = <&edp_in_vopb>;
         };
         vopb_out_mipi: endpoint@1 {
                reg = <1>;
                remote-endpoint = <&mipi_in_vopb>;
         };
         vopb_out_hdmi: endpoint@2 {
                reg = <2>;
                remote-endpoint = <&hdmi_in_vopb>;
         };
         vopb_out_mipi1: endpoint@3 {
                reg = <3>;
                remote-endpoint = <&mipi1_in_vopb>;
         };
         vopb_out_dp: endpoint@4 {
                reg = <4>;
                remote-endpoint = <&dp_in_vopb>;
         };
};

here, HDMI interface has endpoint 1 in rk3288 and 2 in rk3399.

The rockchip vop driver often depends on this determined endpoint
number and stored in vop_mode. So based on this vop_mode the bpp
and pin polarity would configure on detected display interface.

Since, the existing driver using rk3288 vop mode settings enabling
the same will result wrong display interface configuration for rk3399.

Add the patch for fixing these vop modes for rk3399.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2020-04-02 15:47:35 +02:00
Simon Glass
336d4615f8 dm: core: Create a new header file for 'compat' features
At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.

Move the compatibility features into a separate header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
61b29b8268 dm: core: Require users of devres to include the header
At present devres.h is included in all files that include dm.h but few
make use of it. Also this pulls in linux/compat which adds several more
headers. Drop the automatic inclusion and require files to include devres
themselves. This provides a good indication of which files use devres.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-02-05 19:33:46 -07:00
Jagan Teki
b52a199e32 arm: rockchip: Add common cru.h
Few of the rockchip family SoC atleast rk3288,
rk3399 are sharing some cru register bits so
adding common code between these SoC families
would require to include both cru include files
that indeed resulting function declarations error.

So, create a common cru include as cru.h then
include the rk3399 arch cru include file and move
the common cru register bit definitions into it.

The rest of rockchip cru files will add it in future.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-30 11:44:01 +08:00
Niklas Schulze
60a62acfb0 video: dw_hdmi: Add support for ddc-i2c-bus property
Add support for the ddc-i2c-bus device tree property which allows
for using an external i2c master for reading the display's EDID.

Signed-off-by: Niklas Schulze <me@jns.io>
2019-07-29 00:32:59 +02:00
Niklas Schulze
79cdcaced7 rockchip: video: rk3288_hdmi: Add missing call to dw_hdmi_enable()
The RK3288 HDMI driver's rk3288_hdmi_enable() currently lacks a call to
dw_hdmi_enable(). Thus, the HDMI output never gets enabled.

Signed-off-by: Niklas Schulze <me@jns.io>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-07-20 23:59:44 +08:00
Kever Yang
15f09a1a83 rockchip: use 'arch-rockchip' as header file path
Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common
header file path, so that we can get the correct path directly.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:05 +02:00
Chris Packham
8e34c1d34a video: Kconfig: spelling fixes
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-18 09:16:15 -05:00