Currently, both are defined as an unsigned long, but
should be phys_size_t. This should result in no real change,
since phys_size_t is currently an unsigned long for all the
default configs. Also add print_lnum to cmd_bdinfo to deal
with the potentially wider memsize.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).
Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This way we become able to utilize the full post_log_word for POST
activities (overwise, POST ECC, which has 0x8000 ID, could be
erroneously treated as started in post_output_backlog() even if there
was actually no POST ECC run (because of OCM POST failure, for
example).
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Don't run futher tests in case of a test fails that is marked as
POST_STOP.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Also add CONFIG_PHYS_64BIT on powerpc to deal with 32-bit ppc's
that have larger physical addresses like 44x, 85xx, and 86xx.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The previous patch was lacking of i386, microblaze, nios and nios2. This
patch tries to fix them.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
map_physmem() returns a virtual address which can be used to access a
given physical address without involving the cache. unmap_physmem()
should be called when the virtual address returned by map_physmem() is
no longer needed.
This patch adds a stub implementation which simply returns the
physical address cast to a uchar * for all architectures except AVR32,
which converts the physical address to an uncached virtual mapping.
unmap_physmem() is a no-op on all architectures, but if any
architecture needs to do such mappings through the TLB, this is the
hook where those TLB entries can be invalidated.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
timer support
interrupt controller support
flash support
ethernet support
cache support
board information support
env support
booting image support
adding support for Xilinx ML401
Some CPUs like PPC, BLACKFIN need sync() to ensure cfi flash write command
is fully finished. The sync() is defined in each CPU's io.h file. For
those CPUs which do not need sync for now, a dummy sync() is defined in
their io.h as well.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
- add empty include/asm-microblaze/processor.h
- add to CREDITS and MAINTAINERS
- add gd initialization
- add MicroBlaze and SUZAKU board to MAKEALL script
- add reset support for SUZAKU
- add flush_cache() for MicroBlaze
- add CFG_FLASH_SIZE to include/configs/suzaku.h since we have fixed
size flash memory on SUZAKU
