mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 15:14:43 +00:00
* Add missing microblaze header files
* Patch by Rune Torgersen, 06 Apr 2004: - Fix some PCI problems on the MPC8266ADS board - Fix the location of some PCI entries in the immap structure
This commit is contained in:
wdenk
parent
507bbe3e80
commit
d4326aca18
5 changed files with 571 additions and 6 deletions
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@ -2,6 +2,10 @@
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Changes for U-Boot 1.1.1:
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======================================================================
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* Patch by Rune Torgersen, 06 Apr 2004:
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- Fix some PCI problems on the MPC8266ADS board
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- Fix the location of some PCI entries in the immap structure
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* Patch by Yasushi Shoji, 07 Apr 2004:
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- add support for microblaze processors
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- add support for AtmarkTechno "suzaku" board
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@ -291,8 +291,8 @@ void pci_mpc8250_init (struct pci_controller *hose)
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immap->im_memctl.memc_pcibr0 = PCI_MSTR0_LOCAL | PCIBR_ENABLE;
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#ifdef CONFIG_MPC8266ADS
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immap->im_memctl.memc_pcimsk0 = PCIMSK1_MASK;
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immap->im_memctl.memc_pcibr0 = PCI_MSTR1_LOCAL | PCIBR_ENABLE;
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immap->im_memctl.memc_pcimsk1 = PCIMSK1_MASK;
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immap->im_memctl.memc_pcibr1 = PCI_MSTR1_LOCAL | PCIBR_ENABLE;
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#endif
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/* Release PCI RST (by default the PCI RST signal is held low) */
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301
include/asm-microblaze/arch-microblaze/xbasic_types.h
Normal file
301
include/asm-microblaze/arch-microblaze/xbasic_types.h
Normal file
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@ -0,0 +1,301 @@
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/******************************************************************************
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*
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* Author: Xilinx, Inc.
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
|
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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||||
*
|
||||
*
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||||
* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
|
||||
* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
|
||||
* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
|
||||
* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
|
||||
* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
|
||||
* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
|
||||
* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
|
||||
* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
|
||||
* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
|
||||
* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
|
||||
* FITNESS FOR A PARTICULAR PURPOSE.
|
||||
*
|
||||
*
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||||
* Xilinx hardware products are not intended for use in life support
|
||||
* appliances, devices, or systems. Use in such applications is
|
||||
* expressly prohibited.
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*
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*
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* (c) Copyright 2002-2003 Xilinx Inc.
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* All rights reserved.
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||||
*
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||||
*
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* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xbasic_types.h
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*
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* This file contains basic types for Xilinx software IP. These types do not
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* follow the standard naming convention with respect to using the component
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* name in front of each name because they are considered to be primitives.
|
||||
*
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* @note
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||||
*
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* This file contains items which are architecture dependent.
|
||||
*
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||||
* <pre>
|
||||
* MODIFICATION HISTORY:
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*
|
||||
* Ver Who Date Changes
|
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* ----- ---- -------- -----------------------------------------------
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* 1.00a rmm 12/14/01 First release
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* rmm 05/09/03 Added "xassert always" macros to rid ourselves of diab
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* compiler warnings
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* </pre>
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*
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******************************************************************************/
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#ifndef XBASIC_TYPES_H /* prevent circular inclusions */
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#define XBASIC_TYPES_H /* by using protection macros */
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/***************************** Include Files *********************************/
|
||||
|
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/************************** Constant Definitions *****************************/
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#ifndef TRUE
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#define TRUE 1
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#endif
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#ifndef FALSE
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#define FALSE 0
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#endif
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#ifndef NULL
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#define NULL 0
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#endif
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/** Null */
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#define XCOMPONENT_IS_READY 0x11111111 /* component has been initialized */
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#define XCOMPONENT_IS_STARTED 0x22222222 /* component has been started */
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/* the following constants and declarations are for unit test purposes and are
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* designed to be used in test applications.
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*/
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#define XTEST_PASSED 0
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#define XTEST_FAILED 1
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#define XASSERT_NONE 0
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#define XASSERT_OCCURRED 1
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extern unsigned int XAssertStatus;
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extern void XAssert(char *, int);
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|
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/**************************** Type Definitions *******************************/
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|
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/** @name Primitive types
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* These primitive types are created for transportability.
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* They are dependent upon the target architecture.
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* @{
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*/
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#include <linux/types.h>
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typedef struct {
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u32 Upper;
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u32 Lower;
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} Xuint64;
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/* Xilinx's unsigned integer types */
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typedef u32 Xuint32;
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typedef u16 Xuint16;
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typedef u8 Xuint8;
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/* and signed integer types */
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typedef s32 Xint32;
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typedef s16 Xint16;
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typedef s8 Xint8;
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#ifndef NULL
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#define NULL 0
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#endif
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typedef unsigned long Xboolean;
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#define XNULL NULL
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#define XTRUE 1
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#define XFALSE 0
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/*@}*/
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/**
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* This data type defines an interrupt handler for a device.
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* The argument points to the instance of the component
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*/
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typedef void (*XInterruptHandler) (void *InstancePtr);
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/**
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* This data type defines a callback to be invoked when an
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* assert occurs. The callback is invoked only when asserts are enabled
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*/
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typedef void (*XAssertCallback) (char *FilenamePtr, int LineNumber);
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/***************** Macros (Inline Functions) Definitions *********************/
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/*****************************************************************************/
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/**
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* Return the most significant half of the 64 bit data type.
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*
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* @param x is the 64 bit word.
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*
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* @return
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*
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* The upper 32 bits of the 64 bit word.
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*
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* @note
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*
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* None.
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*
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******************************************************************************/
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#define XUINT64_MSW(x) ((x).Upper)
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/*****************************************************************************/
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/**
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* Return the least significant half of the 64 bit data type.
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*
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* @param x is the 64 bit word.
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*
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* @return
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*
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* The lower 32 bits of the 64 bit word.
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*
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* @note
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*
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* None.
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*
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******************************************************************************/
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#define XUINT64_LSW(x) ((x).Lower)
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#ifndef NDEBUG
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/*****************************************************************************/
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/**
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* This assert macro is to be used for functions that do not return anything
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* (void). This in conjunction with the XWaitInAssert boolean can be used to
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* accomodate tests so that asserts which fail allow execution to continue.
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*
|
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* @param expression is the expression to evaluate. If it evaluates to false,
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* the assert occurs.
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||||
*
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* @return
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*
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* Returns void unless the XWaitInAssert variable is true, in which case
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* no return is made and an infinite loop is entered.
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*
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* @note
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*
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* None.
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*
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******************************************************************************/
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#define XASSERT_VOID(expression) \
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{ \
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if (expression) { \
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XAssertStatus = XASSERT_NONE; \
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} else { \
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XAssert(__FILE__, __LINE__); \
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XAssertStatus = XASSERT_OCCURRED; \
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return; \
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} \
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}
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/*****************************************************************************/
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||||
/**
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* This assert macro is to be used for functions that do return a value. This in
|
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* conjunction with the XWaitInAssert boolean can be used to accomodate tests so
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* that asserts which fail allow execution to continue.
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*
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* @param expression is the expression to evaluate. If it evaluates to false,
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* the assert occurs.
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*
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* @return
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*
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* Returns 0 unless the XWaitInAssert variable is true, in which case
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* no return is made and an infinite loop is entered.
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*
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* @note
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*
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* None.
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*
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******************************************************************************/
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#define XASSERT_NONVOID(expression) \
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{ \
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if (expression) { \
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XAssertStatus = XASSERT_NONE; \
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} else { \
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XAssert(__FILE__, __LINE__); \
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XAssertStatus = XASSERT_OCCURRED; \
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return 0; \
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} \
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}
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/*****************************************************************************/
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/**
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* Always assert. This assert macro is to be used for functions that do not
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* return anything (void). Use for instances where an assert should always
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* occur.
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*
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* @return
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*
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* Returns void unless the XWaitInAssert variable is true, in which case
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* no return is made and an infinite loop is entered.
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*
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* @note
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*
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* None.
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*
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******************************************************************************/
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#define XASSERT_VOID_ALWAYS() \
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{ \
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XAssert(__FILE__, __LINE__); \
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XAssertStatus = XASSERT_OCCURRED; \
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return; \
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}
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/*****************************************************************************/
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/**
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* Always assert. This assert macro is to be used for functions that do return
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* a value. Use for instances where an assert should always occur.
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*
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* @return
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*
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* Returns void unless the XWaitInAssert variable is true, in which case
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* no return is made and an infinite loop is entered.
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*
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* @note
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*
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* None.
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*
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******************************************************************************/
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#define XASSERT_NONVOID_ALWAYS() \
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{ \
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XAssert(__FILE__, __LINE__); \
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XAssertStatus = XASSERT_OCCURRED; \
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return 0; \
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}
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#else
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#define XASSERT_VOID(expression)
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#define XASSERT_VOID_ALWAYS()
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#define XASSERT_NONVOID(expression)
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#define XASSERT_NONVOID_ALWAYS()
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#endif
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/************************** Function Prototypes ******************************/
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void XAssertSetCallback(XAssertCallback Routine);
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#endif /* end of protection macro */
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256
include/asm-microblaze/arch-microblaze/xuartlite_l.h
Normal file
256
include/asm-microblaze/arch-microblaze/xuartlite_l.h
Normal file
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@ -0,0 +1,256 @@
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/*****************************************************************************
|
||||
*
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* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
|
||||
* AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND
|
||||
* SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE,
|
||||
* OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE,
|
||||
* APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION
|
||||
* THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
|
||||
* AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
|
||||
* FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY
|
||||
* WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
|
||||
* IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
|
||||
* REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
|
||||
* INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE.
|
||||
*
|
||||
* (c) Copyright 2002 Xilinx Inc.
|
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* All rights reserved.
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*
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||||
*****************************************************************************/
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/****************************************************************************/
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/**
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*
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* @file xuartlite_l.h
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*
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* This header file contains identifiers and low-level driver functions (or
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* macros) that can be used to access the device. High-level driver functions
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* are defined in xuartlite.h.
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*
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* <pre>
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||||
* MODIFICATION HISTORY:
|
||||
*
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* Ver Who Date Changes
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* ----- ---- -------- -----------------------------------------------
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* 1.00b rpm 04/25/02 First release
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* </pre>
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*
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*****************************************************************************/
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#ifndef XUARTLITE_L_H /* prevent circular inclusions */
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#define XUARTLITE_L_H /* by using protection macros */
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/***************************** Include Files ********************************/
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#include "xbasic_types.h"
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#include "xio.h"
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/************************** Constant Definitions ****************************/
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/* UART Lite register offsets */
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#define XUL_RX_FIFO_OFFSET 0 /* receive FIFO, read only */
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#define XUL_TX_FIFO_OFFSET 4 /* transmit FIFO, write only */
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#define XUL_STATUS_REG_OFFSET 8 /* status register, read only */
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#define XUL_CONTROL_REG_OFFSET 12 /* control register, write only */
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/* control register bit positions */
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#define XUL_CR_ENABLE_INTR 0x10 /* enable interrupt */
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#define XUL_CR_FIFO_RX_RESET 0x02 /* reset receive FIFO */
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#define XUL_CR_FIFO_TX_RESET 0x01 /* reset transmit FIFO */
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/* status register bit positions */
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#define XUL_SR_PARITY_ERROR 0x80
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#define XUL_SR_FRAMING_ERROR 0x40
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#define XUL_SR_OVERRUN_ERROR 0x20
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#define XUL_SR_INTR_ENABLED 0x10 /* interrupt enabled */
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#define XUL_SR_TX_FIFO_FULL 0x08 /* transmit FIFO full */
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#define XUL_SR_TX_FIFO_EMPTY 0x04 /* transmit FIFO empty */
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#define XUL_SR_RX_FIFO_FULL 0x02 /* receive FIFO full */
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#define XUL_SR_RX_FIFO_VALID_DATA 0x01 /* data in receive FIFO */
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/* the following constant specifies the size of the FIFOs, the size of the
|
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* FIFOs includes the transmitter and receiver such that it is the total number
|
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* of bytes that the UART can buffer
|
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*/
|
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#define XUL_FIFO_SIZE 16
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|
||||
/* Stop bits are fixed at 1. Baud, parity, and data bits are fixed on a
|
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* per instance basis
|
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*/
|
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#define XUL_STOP_BITS 1
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|
||||
/* Parity definitions
|
||||
*/
|
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#define XUL_PARITY_NONE 0
|
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#define XUL_PARITY_ODD 1
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#define XUL_PARITY_EVEN 2
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|
||||
/**************************** Type Definitions ******************************/
|
||||
|
||||
/***************** Macros (Inline Functions) Definitions ********************/
|
||||
|
||||
/*****************************************************************************
|
||||
*
|
||||
* Low-level driver macros and functions. The list below provides signatures
|
||||
* to help the user use the macros.
|
||||
*
|
||||
* void XUartLite_mSetControlReg(u32 BaseAddress, u32 Mask)
|
||||
* u32 XUartLite_mGetControlReg(u32 BaseAddress)
|
||||
* u32 XUartLite_mGetStatusReg(u32 BaseAddress)
|
||||
*
|
||||
* Xboolean XUartLite_mIsReceiveEmpty(u32 BaseAddress)
|
||||
* Xboolean XUartLite_mIsTransmitFull(u32 BaseAddress)
|
||||
* Xboolean XUartLite_mIsIntrEnabled(u32 BaseAddress)
|
||||
*
|
||||
* void XUartLite_mEnableIntr(u32 BaseAddress)
|
||||
* void XUartLite_mDisableIntr(u32 BaseAddress)
|
||||
*
|
||||
* void XUartLite_SendByte(u32 BaseAddress, u8 Data);
|
||||
* u8 XUartLite_RecvByte(u32 BaseAddress);
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* Set the contents of the control register. Use the XUL_CR_* constants defined
|
||||
* above to create the bit-mask to be written to the register.
|
||||
*
|
||||
* @param BaseAddress is the base address of the device
|
||||
* @param Mask is the 32-bit value to write to the control register
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*****************************************************************************/
|
||||
#define XUartLite_mSetControlReg(BaseAddress, Mask) \
|
||||
XIo_Out32((BaseAddress) + XUL_CONTROL_REG_OFFSET, (Mask))
|
||||
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||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* Get the contents of the control register. Use the XUL_CR_* constants defined
|
||||
* above to interpret the bit-mask returned.
|
||||
*
|
||||
* @param BaseAddress is the base address of the device
|
||||
*
|
||||
* @return A 32-bit value representing the contents of the control register.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*****************************************************************************/
|
||||
#define XUartLite_mGetControlReg(BaseAddress) \
|
||||
XIo_In32((BaseAddress) + XUL_CONTROL_REG_OFFSET)
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* Get the contents of the status register. Use the XUL_SR_* constants defined
|
||||
* above to interpret the bit-mask returned.
|
||||
*
|
||||
* @param BaseAddress is the base address of the device
|
||||
*
|
||||
* @return A 32-bit value representing the contents of the status register.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*****************************************************************************/
|
||||
#define XUartLite_mGetStatusReg(BaseAddress) \
|
||||
XIo_In32((BaseAddress) + XUL_STATUS_REG_OFFSET)
|
||||
|
||||
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||||
/****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* Check to see if the receiver has data.
|
||||
*
|
||||
* @param BaseAddress is the base address of the device
|
||||
*
|
||||
* @return XTRUE if the receiver is empty, XFALSE if there is data present.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*****************************************************************************/
|
||||
#define XUartLite_mIsReceiveEmpty(BaseAddress) \
|
||||
(!(XUartLite_mGetStatusReg((BaseAddress)) & XUL_SR_RX_FIFO_VALID_DATA))
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* Check to see if the transmitter is full.
|
||||
*
|
||||
* @param BaseAddress is the base address of the device
|
||||
*
|
||||
* @return XTRUE if the transmitter is full, XFALSE otherwise.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*****************************************************************************/
|
||||
#define XUartLite_mIsTransmitFull(BaseAddress) \
|
||||
(XUartLite_mGetStatusReg((BaseAddress)) & XUL_SR_TX_FIFO_FULL)
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* Check to see if the interrupt is enabled.
|
||||
*
|
||||
* @param BaseAddress is the base address of the device
|
||||
*
|
||||
* @return XTRUE if the interrupt is enabled, XFALSE otherwise.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*****************************************************************************/
|
||||
#define XUartLite_mIsIntrEnabled(BaseAddress) \
|
||||
(XUartLite_mGetStatusReg((BaseAddress)) & XUL_SR_INTR_ENABLED)
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* Enable the device interrupt. Preserve the contents of the control register.
|
||||
*
|
||||
* @param BaseAddress is the base address of the device
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*****************************************************************************/
|
||||
#define XUartLite_mEnableIntr(BaseAddress) \
|
||||
XUartLite_mSetControlReg((BaseAddress), \
|
||||
XUartLite_mGetControlReg((BaseAddress)) | XUL_CR_ENABLE_INTR)
|
||||
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* Disable the device interrupt. Preserve the contents of the control register.
|
||||
*
|
||||
* @param BaseAddress is the base address of the device
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*****************************************************************************/
|
||||
#define XUartLite_mDisableIntr(BaseAddress) \
|
||||
XUartLite_mSetControlReg((BaseAddress), \
|
||||
XUartLite_mGetControlReg((BaseAddress)) & ~XUL_CR_ENABLE_INTR)
|
||||
|
||||
|
||||
/************************** Function Prototypes *****************************/
|
||||
|
||||
void XUartLite_SendByte(u32 BaseAddress, u8 Data);
|
||||
u8 XUartLite_RecvByte(u32 BaseAddress);
|
||||
|
||||
|
||||
#endif /* end of protection macro */
|
||||
|
|
@ -135,17 +135,21 @@ typedef struct pci_config {
|
|||
uint pci_imimr;
|
||||
char res5[24];
|
||||
uint pci_ifhpr;
|
||||
char res5_2[4];
|
||||
uint pci_iftpr;
|
||||
char res6[8];
|
||||
char res6[4];
|
||||
uint pci_iphpr;
|
||||
char res6_2[4];
|
||||
uint pci_iptpr;
|
||||
char res7[8];
|
||||
char res7[4];
|
||||
uint pci_ofhpr;
|
||||
char res7_2[4];
|
||||
uint pci_oftpr;
|
||||
char res8[8];
|
||||
char res8[4];
|
||||
uint pci_ophpr;
|
||||
char res8_2[4];
|
||||
uint pci_optpr;
|
||||
char res9[12];
|
||||
char res9[8];
|
||||
uint pci_mucr;
|
||||
char res10[8];
|
||||
uint pci_qbar;
|
||||
|
|
|
|||
Loading…
Reference in a new issue