Commit graph

69 commits

Author SHA1 Message Date
Timur Tabi
a2c1229c39 powerpc/85xx: use fdt_create_phandle() to create the Fman firmware phandles
Function fdt_create_phandle() conveniently creates new phandle properties
using both "linux,phandle" and "phandle", so it should be used by all code
that wants to create a phandle.

The Fman firmware code, which embeds an Fman firmware into the device tree,
was creating the phandle properties manually.  Instead, change it to use
fdt_create_phandle().

Signed-off-by: Timur Tabi <timur@freescale.com>
2011-10-15 09:35:15 -04:00
Kumar Gala
e2d0f255cf powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set
Add ifdef protection around fman specific code related to device tree
clock setup.  If we dont have CONFIG_SYS_DPAA_FMAN defined we shouldn't
be executing this code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:04 -05:00
Timur Tabi
90f89f099d powerpc/85xx: verify the device tree before booting Linux
Introduce ft_verify_fdt(), a function that is called after the device tree
has been fixed up, that displays warning messages if there is a mismatch
between the physical addresses of some devices that U-Boot has configured
with what the device tree says the addresses are.

This is a particular problem when booting a 36-bit device tree from a
32-bit U-Boot (or vice versa), because the physical address of CCSR is
wrong in the device tree.  When the operating system boots, no messages are
displayed, so the user generally has no idea what's wrong.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:39 -05:00
Bhaskar Upadhaya
65bb8b060a powerpc/85xx: Fix up clock_freq property in CAN node of dts
Fix up the device tree property associated with the Flexcan clock
frequency. This property is used to calculate the bit timing parameters
for Flexcan.

Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:38 -05:00
Kumar Gala
acf3f8da98 powerpc/85xx: Handle the lack of L2 cache on P2040/P2040E
The P2040/P2040E have no L2 cache.  So we utilize the SVR to determine
if we are one of these devices and skip the L2 init code in cpu_init.c
and release.  For the device tree we skip the updating of the L2 cache
properties but we still update the chain of caches so the CPC/L3 node
can be properly updated.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:38 -05:00
Timur Tabi
ffadc441bc fman: insert the Fman firmware into the device tree
The Fman device tree node binding allows for the entire Fman firmware binary
data to be embedded in the device tree.  This eliminates the need to have
NOR flash mapped to Linux just so that the Fman driver can see the firmware.

The location of the Fman firmware is taken from the 'fman_ucode' environment
variable.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-22 03:07:43 -05:00
Timur Tabi
ee4756d4cb powerpc/85xx: fix compatible property for the L2 cache node
The compatible property for the L2 cache node (on 85xx systems that don't
have a CPC) was using a value for the property length that did not match
the actual length of the property.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-13 00:36:11 -05:00
Haiying Wang
2a0ffb84c7 powerpc/85xx: Add device tree fixup for bman portal
Fix fdt bportal to pass the bman revision number to kernel via device tree.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-27 22:29:03 -05:00
bhaskar upadhaya
f5feb5afb2 powerpc/85xx: Update timer-frequency prop in ptp_timer node of device tree
Fix up the device tree property associated with the IEEE 1588 timer
source frequency.  Currently we only support the IEEE 1588 timer source
being the internal eTSEC system clock (for those SoCs with IEEE 1588
support).  The eTSEC clock is ccb_clk/2.

Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:43 -05:00
Pankaj Chauhan
eea9a12344 powerpc/85xx: Extend ethernet device tree stashing parameters for "fsl,etsec2"
In a manner similar to passing ethernet stashing parameters into device
tree for "gianfar", extend the support to the "fsl,etsec2" as well.

Signed-off-by: Pankaj Chauhan <pankaj.chauhan@freescale.com>
Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Kumar Gala
a09b9b68d4 powerpc/8xxx: Refactor SRIO initialization into common code
Moved the SRIO init out of corenet_ds and into common code for
8xxx/QorIQ processors that have SRIO.  We mimic what we do with PCIe
controllers for SRIO.

We utilize the fact that SRIO is over serdes to determine if its
configured or not and thus can setup the LAWs needed for it dynamically.

We additionally update the device tree (to remove the SRIO nodes) if the
board doesn't have SRIO enabled.

Introduced the following standard defines for board config.h:

CONFIG_SYS_SRIO - Chip has SRIO or not
CONFIG_SRIO1 - Board has SRIO 1 port available
CONFIG_SRIO2 - Board has SRIO 2 port available

(where 'n' is the port #)
CONFIG_SYS_SRIOn_MEM_VIRT - virtual address in u-boot
CONFIG_SYS_SRIOn_MEM_PHYS - physical address (for law setup)
CONFIG_SYS_SRIOn_MEM_SIZE - size of window (for law setup)

[ These mimic what we have for PCI and PCIe controllers ]

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
2011-01-14 01:32:21 -06:00
Aaron Sierra
9d64c6bb4a 85xx: Add support for not releasing secondary cores via 'mp_holdoff'
Some OSes require that secondary cores not be initialized when they
are booted (eg VxWorks).  By default when U-Boot is compiled with the
CONFIG_MP option all secondary cores are brought out of reset and held
in spinloops.  Setting the "mp_holdoff" environment variable to 'yes'
or '1' will cause U-Boot to leave secondary cores in their default
state.

Signed-off-by: Aaron Sierra <asierra@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:38:40 -05:00
Matthew McClintock
b80d30546e mpx85xx/fdt: Add cpu-release-addr for all cores
We currently do not add a cpu-release-addr for core 0, this is needed
when we want to reset core 0 and later restart it from Linux

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-19 21:20:10 -05:00
Kumar Gala
db977abfc8 powerpc/85xx: Add support to initialize LIODN registers and portals
On the new QorIQ/CoreNet based platforms we need to initialize the
"portals" as access into the Data Path subystem as well as Logical IO
Device Numbers (LIODN) that are used for the IOMMU (PAMU).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-26 13:07:56 -05:00
Kumar Gala
6aba33e939 powerpc/p4080: Add support for CPC(Corenet platform cache) on CoreNet platforms
The CoreNet style platforms can have a L3 cache that fronts the memory
controllers.  Enable that cache as well as add information into the
device tree about it.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-26 13:07:56 -05:00
Kumar Gala
85f8cda3c2 powerpc/p4080: Add setting of clock-frequency for clockgen node
On QorIQ CoreNet based devices we have a global clocking block.  We want
to keep track of SYSCLK frequency as it is what is used to derive all
other frequencies in the SoC

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20 04:41:18 -05:00
Kumar Gala
1b942f7483 powerpc/85xx: Use fdt_node_offset_by_compat_reg for clock-frequency updates
Move to using fdt_node_offset_by_compat_reg to find the node offsets we
want to update instead of using aliases.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20 04:40:06 -05:00
Kumar Gala
8f3a7fa4a2 powerpc/8xxx: Add is_core_disabled to remove disabled cores from dtb
If we explicitly disabled a core remove it from the dtb we pass on to
the kernel.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:08 -05:00
Stefan Roese
a47a12becf Move arch/ppc to arch/powerpc
As discussed on the list, move "arch/ppc" to "arch/powerpc" to
better match the Linux directory structure.

Please note that this patch also changes the "ppc" target in
MAKEALL to "powerpc" to match this new infrastructure. But "ppc"
is kept as an alias for now, to not break compatibility with
scripts using this name.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Anatolij Gustschin <agust@denx.de>
2010-04-21 23:42:38 +02:00
Renamed from arch/ppc/cpu/mpc85xx/fdt.c (Browse further)