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powerpc/85xx: fix compatible property for the L2 cache node
The compatible property for the L2 cache node (on 85xx systems that don't have a CPC) was using a value for the property length that did not match the actual length of the property. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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3500e9aed6
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1 changed files with 19 additions and 10 deletions
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@ -165,7 +165,6 @@ static inline void ft_fixup_l2cache(void *blob)
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int len, off;
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u32 *ph;
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struct cpu_type *cpu = identify_cpu(SVR_SOC_VER(get_svr()));
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char compat_buf[38];
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const u32 line_size = 32;
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const u32 num_ways = 8;
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@ -192,22 +191,32 @@ static inline void ft_fixup_l2cache(void *blob)
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}
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if (cpu) {
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if (isdigit(cpu->name[0]))
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len = sprintf(compat_buf,
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"fsl,mpc%s-l2-cache-controller", cpu->name);
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else
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len = sprintf(compat_buf,
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"fsl,%c%s-l2-cache-controller",
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tolower(cpu->name[0]), cpu->name + 1);
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char buf[40];
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sprintf(&compat_buf[len + 1], "cache");
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if (isdigit(cpu->name[0])) {
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/* MPCxxxx, where xxxx == 4-digit number */
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len = sprintf(buf, "fsl,mpc%s-l2-cache-controller",
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cpu->name) + 1;
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} else {
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/* Pxxxx or Txxxx, where xxxx == 4-digit number */
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len = sprintf(buf, "fsl,%c%s-l2-cache-controller",
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tolower(cpu->name[0]), cpu->name + 1) + 1;
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}
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/*
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* append "cache" after the NULL character that the previous
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* sprintf wrote. This is how a device tree stores multiple
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* strings in a property.
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*/
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len += sprintf(buf + len, "cache") + 1;
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fdt_setprop(blob, off, "compatible", buf, len);
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}
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fdt_setprop(blob, off, "cache-unified", NULL, 0);
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fdt_setprop_cell(blob, off, "cache-block-size", line_size);
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fdt_setprop_cell(blob, off, "cache-size", size);
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fdt_setprop_cell(blob, off, "cache-sets", num_sets);
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fdt_setprop_cell(blob, off, "cache-level", 2);
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fdt_setprop(blob, off, "compatible", compat_buf, sizeof(compat_buf));
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/* we dont bother w/L3 since no platform of this type has one */
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}
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