Traditionally many boards used local definitions for SRAM base address
and size (like SRAM_BASE, SRAM_LEN and/or SRAM_SIZE), while the (now)
"official" names are CONFIG_SYS_SRAM_BASE and CONFIG_SYS_SRAM_SIZE.
The corresponding code in arch/powerpc/lib/board.c was board specific,
and has never actually been maintained well. Replace this by feature-
specific code and adapt the boards that actually use this.
NOTE: there is still a ton of boards using the old #defines, which
therefor contain incorrect values in bi_sramstart and bi_sramsize.
All respective board maintainers are requested to clean up their
respective configurations. Thanks.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Josef Wagner <Wagner@Microsys.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
A number of boards define CONFIG_SYS_SRAM_BASE but fail to define
CONFIG_SYS_SRAM_SIZE which is needed when cleaning up the code that
prints this information with the bdinfo command.
Add the missing deinitions.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
This patch is to save environment data to mmc card.
It uses interfaces defined in generic mmc.
Signed-off-by: Terry Lv <r65388@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Commit d2bf29e3 caused a number of compiler warnings:
mmc.c: In function 'mmc_bwrite':
mmc.c:97: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'long unsigned int'
mmc.c:97: warning: format '%x' expects type 'unsigned int', but argument 3 has type 'lbaint_t'
mmc.c: In function 'mmc_bread':
mmc.c:229: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'long unsigned int'
mmc.c:229: warning: format '%x' expects type 'unsigned int', but argument 3 has type 'lbaint_t'
Fix these.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Lei Wen <leiwen@marvell.com>
In commit bd7b26f8 (Tools: set multiple variable with fw_setenv utility),
the option parsing was changed to getopt_long(3), but option "-n"
of fw_printenv was not included.
This leads to an error message "invalid option -- 'n'" on stderr,
although the output on stdout is correct.
Signed-off-by: Daniel Hobi <daniel.hobi@schmid-telecom.ch>
The CURSOR_ON, CURSOR_OFF, and CURSOR_SET macros are defined incorrectly. If
cursor support is disabled, then these macros are defined to nothing, but
then they are used like this:
if (console_col < CONSOLE_COLS)
CURSOR_OFF
console_row++;
which was compiled like this:
if (console_col < CONSOLE_COLS)
console_row++;
This is obviously not what was intended.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Detlev Zundel <dzu@denx.de>
Due to a register glitch (result code <4 might show up right after the
start-calculation-bit was set), make sure the ECC has really started.
See 1c3275b656045aff9a75bb2c9f3251af1043ebb3 in the kernel.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
The SC520 CDP boards originally implemented by Daniel Engström are now
very broken. Attempts to contact Daniel via the email address on the
copyright notice have failed. Remove these boards from mainline
Commit 077e1958ca broke the ability of the
x86 port to boot from a cold-reset by removing the initial IDT. Re-
instate the initial IDT to allow cold-booting of x86 boards
Commit 54841ab50c made the argv parameter
to do_go_exec() const but did not allow for the fact that argv[-1] is
set to point to the global data structure and relies on argv being non-
const.
With this patch, do_go_exec() creates a new copy of the argv array with
an extra element to store global data pointer rather than simply
clobbering an arbitrary memory location.
The Blackfin implementation of musb has a TXCOUNT register that needs to
be programmed when transmitting data.
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
commit 47e26b1b "cmd_usage(): simplify return code handling" caused
the following compile warnings:
bedbug_860.c: In function 'bedbug860_do_break':
bedbug_860.c:73: warning: 'return' with a value, in function returning void
bedbug_860.c:121: warning: 'return' with a value, in function returning void
Fix the return type.
Actually these files could need some cleanup - commands should
return proper error codes, and there are coding style issues.
=> To be fixed later.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Correctly set PAD1_FREF_CLK4_REQ and PAD0_FREF_CLK4_OUT to enable and
activate both LEDs while setting pad mux.
Since this increases the line length, this patch also adjusts the white
space in this section of code to allign the pad mux signal description
comments.
Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@canonical.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
An upcoming version of Overo uses a Wifi/BT module with 1.8V signaling,
eliminating the need for an external transceiver to handle the level
shifting. This patch detects whether an external transceiver is present
and adjusts the pinmux settings as appropriate.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch adds support for the Beagle xM. It uses the board ID
GPIO bits to recognize this revision and perform appropriate setup.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Future versions of these boards have options for POP memory with no NAND.
This option prevents display of error messages when no NAND is detected.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This printk was added recently and results in ugly output on systems
with no NAND:
NAND: nand_get_flash_type: unknown NAND device: Manufacturer ID: 0x00, Chip ID: 0x00 0 MiB
instead of:
NAND: 0 MiB
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Upcoming Beagle and Overo revisions use POP memory with 256MB or 512MB
per bank. This patches uses the SDRC settings from x-load or the config
header to set up timing properly.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Using the reset command on OMAP36XX/37XX and OMAP4 caused a hang. This
patch uses the reset bit appropriate for each CPU architecture.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The workarounds for errata 621766 and 725233 should only be applied
on affected Cortex-A8 revisions. Recent chips use r3px cores where
these have been fixed.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This function consists entirely of inline asm statements, so writing
it directly in a .S file is simpler. Additionally, the inline asm is
not safe as is, since registers are not guaranteed to be preserved
between asm() statements.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
On OMAP34xx ES1.0, the L2 enable bit can only be set in secure mode,
so an SMC call to the ROM monitor is required. On later versions,
and on newer devices, this bit is banked and we can set it directly.
The code checked only the ES revision of the chip, and hence incorrectly
used the ROM call on ES1.0 versions of other devices.
This patch adds a check for chip family as well as revision, and also
removes some code duplication between the enable and disable functions.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch configures clocks properly when a 36XX/37XX
processor is detected.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
TI has added new processors to the OMAP3 family. This patch enhances
the code in sysinfo.c to detect which family member is present.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Confiures GPMC timings for both chips and also configures pinmux
for GPIO_65, which is used as the interrupt signal for the second chip
Signed-off-by: Scott Ellis <scott@jumpnowtek.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch enhances the revision detection function and adds
support for the C4 revision. The board revision is printed
and approriate revision specific setup is done automatically.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The latest Overo COM modules encode their revision number on
GPIOs 115, 113, and 112. All boards to date have no pullups on these pins
and hence appear as revision 0.
This patch reads and prints the revision information.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Allows one to set the processor clock rate via "setenv mpurate 720" for example
Default is set to a "safe" 500 Mhz.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch modifies the pinmux setup for MMC1_CLK and MMC3_CLK to enable
the input driver. MMC2_CLK was already properly configured.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch adds a function to allow one to easily set the target
voltage for the TWL4030 regulators. It also modifies the existing
code to use this new function. Applicable definitions are moved
out of the driver file and into the header file so that they are
generally accessible
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The functions in syslib.c can be shared, so this patch moves it from
cpu/omap3 to cpu/omap-common
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
