To allow a board- / platform-specific ahci_port_base() function, this
patch removes "static inline" and adds __weak to this function. This
will be used by the upcoming Armada 7K/8K SATA / AHCI support, which
unfortunately needs a different port base address calculation.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have
the same content. (both just wrap <asm-generic/errno.h>)
Replace all include directives for <asm/errno.h> with <linux/errno.h>.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Fixup include/clk.]
Signed-off-by: Tom Rini <trini@konsulko.com>
i.MX6DQPlus support sata interface, so not return failure
when CPU is i.MX6DQPlus.
In this patch, also use simpler runtime cpu dections macros to replace
is_cpu_type.
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tang Yuantian <Yuantian.Tang@freescale.com>
Cc: Shaohui Xie <Shaohui.Xie@freescale.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
The block device uclass does not currently support selecting a particular
hardware partition but this is needed for MMC. Add it so that the blk API
can support MMC properly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a function that automatically builds the device name given the parent
and a supplied string. Most callers will want to do this, so putting this
functionality in one place makes more sense.
Signed-off-by: Simon Glass <sjg@chromium.org>
Allow a devnum parameter of -1 to indicate that the device number should be
alocated automatically. The next highest available device number for that
interface type is used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that the MMC code accesses devices by number, we can implement this same
interface for driver model, allowing MMC to support using driver model for
block devices.
Add the required functions to the uclass.
Signed-off-by: Simon Glass <sjg@chromium.org>
There is quite a bit of duplicated common code related to block devices
in the IDE and SCSI implementations.
Create some helper functions that can be used to reduce the duplication.
These rely on a linker list of interface-type drivers
Signed-off-by: Simon Glass <sjg@chromium.org>
This option currently enables both the command and the SCSI functionality.
Rename the existing option to CONFIG_SCSI since most of the code relates
to the feature.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add some functions needed by the SATA code. This allows it to be compiled
for sandbox, thus increasing build coverage.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add some functions needed by the SCSI code. This allows it to be compiled
for sandbox, thus increasing build coverage.
Signed-off-by: Simon Glass <sjg@chromium.org>
This started as 'ahci' and was renamed to 'disk' during code review. But it
seems that this is too generic. Now that we have a 'blk' uclass, we can use
that as the generic piece, and revert to ahci for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Bring this support back so that sandbox can be compiled with CONFIG_BLK. This
allows sandbox to have greater build coverage during the block-device
transition. This can be removed again later.
This reverts commit 33cf727b16.
Signed-off-by: Simon Glass <sjg@chromium.org>
Ensure data the following sata command used is flushed out of dcache
and written to physical memory or timeout error may happen.
Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
Add a block device cache to speed up repeated reads of block devices by
various filesystems.
This small amount of cache can dramatically speed up filesystem
operations by skipping repeated reads of common areas of a block
device (typically directory structures).
This has shown to have some benefit on FAT filesystem operations of
loading a kernel and RAM disk, but more dramatic benefits on ext4
filesystems when the kernel and/or RAM disk are spread across
multiple extent header structures as described in commit fc0fc50.
The cache is implemented through a minimal list (block_cache) maintained
in most-recently-used order and count of the current number of entries
(cache_count). It uses a maximum block count setting to prevent copies
of large block reads and an upper bound on the number of cached areas.
The maximum number of entries in the cache defaults to 32 and the maximum
number of blocks per cache entry has a default of 2, which has shown to
produce the best results on testing of ext4 and FAT filesystems.
The 'blkcache' command (enabled through CONFIG_CMD_BLOCK_CACHE) allows
changing these values and can be used to tune for a particular filesystem
layout.
Signed-off-by: Eric Nelson <eric@nelint.com>
Driver model is used for host device block devices now, so we don't need the
old code. Remove it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Update the host driver to support driver model for block devices. A future
commit will remove the old code, but for now it is useful to be able to use
it both with and without CONFIG_BLK.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Make a few minor changes to make it easier to add driver-model support.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Add a uclass for block devices. These provide block-oriented data access,
supporting reading, writing and erasing of whole blocks.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
This is a device number, and we want to use 'dev' to mean a driver model
device. Rename the member.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Rename three partition functions so that they start with part_. This makes
it clear what they relate to.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Use 'struct' instead of a typdef. Also since 'struct block_dev_desc' is long
and causes 80-column violations, rename it to struct blk_desc.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Correct spelling of "U-Boot" shall be used in all written text
(documentation, comments in source files etc.).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Add a uclass ID for a disk controller. This can be used by AHCI/SATA or
other controller types. There are no operations and no interface so far,
but it is possible to probe a SATA device.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With format-security errors turned on, GCC picks up the use of sprintf with
a format parameter not being a string literal.
Simple uses of sprintf are also converted to use strcpy.
Signed-off-by: Ben Whitten <ben.whitten@gmail.com>
Acked-by: Wolfgang Denk <wd@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Until now, the SoC selection for the ARCH_MVEBU platforms has been done
in the config header. Using CONFIG_ARMADA_XP in a non-clear way. As
it needed to get selected for AXP and A38x based boards. This patch
now changes this to move the SoC selection to Kconfig. And also
uses CONFIG_ARCH_MVEBU as a common define for both AXP and A38x.
This makes things a bit clearer - especially for new board additions.
Additionally the defines CONFIG_SYS_MVEBU_DDR_AXP and
CONFIG_SYS_MVEBU_DDR_A38X are replaced with the already available
CONFIG_ARMADA_38X and CONFIG_ARMADA_XP.
And CONFIG_DDR3 is removed, as its not referenced anywhere.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
This patch adds a new SATA driver for the Marvell Kirkwood and Armada
370 / XP SoC's.
This driver supports the SATA controller of some Mavell SoC's.
Here a (most likely incomplete) list of the supported SoC's:
- Kirkwood
- Armada 370
- Armada XP
This driver implementation is an alternative to the already available
driver via the "ide" commands interface (drivers/block/mvsata_ide.c).
But this driver only supports PIO mode and as this new driver also
supports transfer via DMA, its much faster.
Please note, that the newer SoC's (e.g. Armada 38x) are not supported
by this driver. As they have an AHCI compatible SATA controller
integrated.
The original version of this driver was sent by Tor Krill to the U-Boot
list a few years ago. Here the link:
http://lists.denx.de/pipermail/u-boot/2010-June/073147.html
Changes by Stefan:
- Coding-style cleanup
- Support for Armada XP added
- MBUS window setup added
- D-cache flush and invalidation added - works with dcache enabled on
Armada XP
- Removed mdelay() from ata_wait_register() and add timer based timeout
detection to speed up the transfer
Signed-off-by: Tor Krill <tor@excito.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Tom Rini <trini@konsulko.com>
This will allow the implementation to make use of data in the block_dev
structure beyond the base device number. This will be useful so that eMMC
block devices can encompass the HW partition ID rather than treating this
out-of-band. Equally, the existence of the priv field is crying out for
this patch to exist.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The console includes a global variable and several functions that are only
used by a small subset of U-Boot files. Before adding more functions, move
the definitions into their own header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
CONFIG_AHCI_SETFEATURES_XFER is not selected by any user, so delete
the dead code.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Now that we have a new header file for cache-aligned allocation, we should
move the stack-based allocation macro there also.
Signed-off-by: Simon Glass <sjg@chromium.org>
This patch initializes the SATA address windows on Armada XP and
allows it to work with the existing mvsata_ide driver.
It also adds the necessary configuration for the db-mv784mp-gp board.
Signed-off-by: Anton Schubert <anton.schubert@gmx.de>
Tested-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
This driver was originally added to support the native IDE mode for
Intel chipset, however it has some bugs like not supporting ATAPI
devices, endianness issue, or even broken build when CONFIG_LAB48.
Given no board is using this driver as of today, rather than fixing
all these issues we just remove it from the source tree.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
