Commit graph

82339 commits

Author SHA1 Message Date
Heinrich Schuchardt
65e8b64d23 board: gateworks: gw_ventana: fix building with GCC 12.2
Building with GCC 12.2 results in an error

    board/gateworks/gw_ventana/gw_ventana.c:636:68: error: the comparison
    will always evaluate as 'true' for the address of 'pwm_padmux' will
    never be NULL [-Werror=address]
      636 |                 } else if (hwconfig_subarg_cmp(arg, "mode", "pwm") &&
          |                                                                    ^~

Remove the superfluous check.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-By: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-10-21 21:37:47 -04:00
Michal Suchanek
9259bd1735 common: board_f: Print information for all sysresets
Boards can have multiple sysresets, iterate all when printing sysreset
info.

Fixes: 23471aed5c ("board_f: Add reset status printing")
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-21 16:06:14 -04:00
Michal Suchanek
5b2f49c033 sandbox: Initialize sysreset before relocation
Without this the early sysreset code cannot be tested.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-21 16:06:14 -04:00
Andre Przywara
d6d8720c3f qemu: Try to automatically boot from the QEMU firmware device (qfw)
At the moment the QEMU boot sequence tries various (storage) devices
when trying to find a payload to boot.
To simplify starting a specific kernel and initrd, there is also the qfw
command, which can use the files specified on the QEMU command line, via
the -kernel and -initrd options.
Add this command to the list of boot options to try. Since users
specifying those options on the command line probably explicitly want
to run them, let's place the new command first. Without those options,
the qfw command will just gracefully fail, and we continue with the
existing order.

This allows auto-booting of specific kernels in QEMU, for instance in CI
systems.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-10-21 16:06:14 -04:00
Andre Przywara
2f6c45eb68 qfw: return failure when no kernel could be loaded
When we try to load a kernel via the QEMU firmware device, we currently
"return -1;" if no kernel was specified on the QEMU command line. This
leads to the usage output, which is confusing (since nothing on the
command line was really wrong), but also somewhat hides the actual error
message.

Return CMD_RET_FAILURE (1), as it's a proper error, and make the message
more clear that this is not only a "warning".

This helps to call this command in boot scripts, and to gracefully
continue if this doesn't work.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-10-21 16:06:14 -04:00
Andre Przywara
163fb37669 qfw: store loaded file size in environment variable
At the moment the QEMU firmware command just prints the size of the
loaded binaries on the console.
To go with all the other load methods, and many boot scripts'
expectations, also store the size of the file loaded last in the
environment variable "filesize".
We first put the kernel size in there, but overwrite this with the
initrd size, should we have one, because this is probably the more
prominent user of $filesize (in the booti or bootz command).

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-10-21 16:06:13 -04:00
Alice Guo
71858454fe gpio: adp5585: add gpio driver for ADP5585 I/O Expander Controller
Add gpio driver for ADP5585 I/O Expander Controller. The ADP5585 is a 10
input/output port expander and can be used to increase the number of
I/Os available to a processor.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
2022-10-21 16:06:13 -04:00
Joel Stanley
e8f58df178 config/aspeed: Enable NC-SI support
Aspeed BMCs are commonly used with NC-SI. A system indicates the driver
should configure the link over NC-SI using the device tree.

Add it to the defconfig so we get compile coverage of the driver, even
if the EVBs do not normally use it.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
2022-10-21 16:05:37 -04:00
Samuel Mendoza-Jonas
3b400e84ba net/ftgmac100: Add NC-SI mode support
Update the ftgmac100 driver to support NC-SI instead of an mdio phy
where available. This is a common setup for Aspeed AST2x00 platforms.

NC-SI mode is determined from the device-tree if either phy-mode sets it
or the use-ncsi property exists. If set then normal mdio setup is
skipped in favour of the NC-SI phy.

Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-10-21 16:04:39 -04:00
Samuel Mendoza-Jonas
4b290d4a75 cmd: Add ncsi command
Adds an "ncsi" command to manually start NC-SI configuration.

Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
2022-10-21 16:04:39 -04:00
Samuel Mendoza-Jonas
09bd3d0b0a net: NC-SI setup and handling
Add the handling of NC-SI ethernet frames, and add a check at the start
of net_loop() to configure NC-SI before starting other network commands.

Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-10-21 16:04:39 -04:00
Tom Rini
7723828c97 Merge branch '2022-10-21-enforce-some-DM-migrations'
- Enforce CONFIG_DM being enabled (which has been the case for all
  boards for a bit now) and remove non-DM_KEYBOARD options as they're also
  unused for some time now.
2022-10-21 15:32:45 -04:00
Tom Rini
d662e9adae configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-10-21 14:07:17 -04:00
Tom Rini
f60e6f6767 input: Remove legacy KEYBOARD option
There are no platforms that have not migrated to using DM_KEYBOARD,
remove the legacy option.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-21 13:47:56 -04:00
Tom Rini
9af4a0c8a6 core: Enable DM by default
There are no longer any platforms which do not enable DM, move this to a
def_bool y and remove the check in the Makefile.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-21 13:47:56 -04:00
Tom Rini
f35e37cffd First set of u-boot-at91 fixes for the 2023.01 cycle
-----BEGIN PGP SIGNATURE-----
 
 iQFQBAABCgA6FiEEqxhEmNJ6d7ZdeFLIHrMeAg6sL8gFAmNSPhMcHGV1Z2VuLmhy
 aXN0ZXZAbWljcm9jaGlwLmNvbQAKCRAesx4CDqwvyDrHCACddHL6pElPVUvNWomJ
 h7RNejIaFrm+V2tVoDqnUBEzxKod7g1cvBiZM+2o5fcLNIrWfH0gV+7a48Uybzt2
 r7VZ9u5Rnl1Fhhjvr8eL3uF/39V249eMPrzR8xC677sCJJkcczoOw8n4y534FaJZ
 1NePmMKhlo7YVEZKzwdg1sM6sUppXniSEXUllWumVaUgSHcZhFK579nCbYpt25bW
 sJ1V3fY2pJnaFHv9H599zSK79Izf5fR4fr3egKZknw8oqNLKNrjkWxxlPXJfjEYr
 ncFJ31dOZXJU09rRoE60nIc0QdRE8dvELjYhPKUS/wmFDg7IotwNj5GcX2RIlRPJ
 mS22
 =D3FL
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-at91-fixes-2023.01-a' of https://source.denx.de/u-boot/custodians/u-boot-at91

First set of u-boot-at91 fixes for the 2023.01 cycle:

This small fixes set includes an indentation fix for sam9x60 DT and one
name for one pin for sama7g5.
2022-10-21 08:33:48 -04:00
Mihai Sain
17e21d7cbf ARM: dts: at91: sama7g5: fix signal name of pin PB2
The signal name of pin PB2 with function F is FLEXCOM11_IO1
as it is defined in the datasheet.

Fixes: 558378a4cd ("ARM: mach-at91: add support for new SoC sama7g5")
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
2022-10-21 08:59:27 +03:00
Dario Binacchi
275943dba4 ARM: dts: at91: sam9x60ek: fix indentation for pinctrl sub-nodes
The indentation went far on the right due to an extra tab for
each pinctrl sub-nodes.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-10-21 08:59:16 +03:00
Tom Rini
145a996592 Merge tag 'u-boot-rockchip-20221020' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- dts update and sync for rk356x, rk3288, rk3399 from Linux;
- Add rk3399 EAIDK-610 board support;
- Update for puma-rk3399 board;
- some fix and typo fix in different drivers;
2022-10-20 22:32:38 -04:00
Tom Rini
d843273a80 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv 2022-10-20 09:11:08 -04:00
Tom Rini
dc3cb0abf4 Clock patches for 2023.01
This contains various fixes (some long overdue) for the next release.
 -----BEGIN PGP SIGNATURE-----
 
 iQGTBAABCgB9FiEEkGEdW86NSNID6GAoPuiP7LShEG4FAmNQLrdfFIAAAAAALgAo
 aXNzdWVyLWZwckBub3RhdGlvbnMub3BlbnBncC5maWZ0aGhvcnNlbWFuLm5ldDkw
 NjExRDVCQ0U4RDQ4RDIwM0U4NjAyODNFRTg4RkVDQjRBMTEwNkUACgkQPuiP7LSh
 EG59kQf/WHyc0gXWxzI2nCjlq+ERL12rdswsy1N6rPVB++a6qCO8puFJWoMOYNa0
 deEMye5lYlhPFnfLLBLuMtpoeQW6R0dsNCkUeGuVfmwWDLW77tqb9LSg3nqD4bMg
 Fd+mlkFVmKa0WU5/uklojHLQGUEzvFsTVfMmpfOr7js2jsOYXW6DBSXuF1PogTRh
 YOJ9+OFq5giNtoSj339s807S/sEbaM46C72h0S+2iKKIED5FGy4Hi+mN7q8/GUDS
 TP1zt5xuaYwu6qo586y9/yNPbmmfHF+Liw35EZCairyEAjxevjLw6xJsFyZvtTxM
 11hKabfN//eSMTTB6Q4ugahRM3nELg==
 =H1Iz
 -----END PGP SIGNATURE-----

Merge tag 'clk-2023.01' of https://source.denx.de/u-boot/custodians/u-boot-clk

Clock patches for 2023.01

This contains various fixes (some long overdue) for the next release.
2022-10-20 08:58:25 -04:00
Tom Rini
73ceadcd72 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
Beside some rather unexciting sync of the DTs from the kernel tree, and
some Kconfig cleanup, there are some improvements for the ARMv5 Allwinner
family, to support boards with the F1C200s (64MB DRAM) better. We will
get actual board support as soon as the DTs have passed the Linux review
process.
There is also support for the X96 Mate TV Box, featuring the H616 SoC and
a full 4GB of DRAM.
Also we found the secret to enable SPI booting on the H616 (pin PC5 must
be pulled to GND), so the SPI boot support patch is now good to go.

Passed the gitlab CI, plus briefly tested on Pine64-LTS, LicheePi Nano,
X96 Mate and OrangePi Zero.
2022-10-20 08:58:05 -04:00
Rick Chen
b3b44c674a riscv: ae350: Check firmware_fdt_addr header
Check firmware_fdt_addr header to see if it
is a valid fdt blob.

Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-10-20 15:26:31 +08:00
Yu Chien Peter Lin
bdb238355c riscv: andes_plic.c: use modified IPI scheme
The IPI scheme in OpenSBI has been updated to support 8-core AE350
platform, the plicsw configuration needs to be modified accordingly.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2022-10-20 15:23:41 +08:00
Bin Meng
cb052d7712 riscv: qemu: spl: Fix booting Linux kernel with OpenSBI 1.0+
Since OpenSBI commit bf3ef53bb7f5 ("firmware: Enable FW_PIC by default"),
OpenSBI runs directly at the load address without any code movement.
This causes the SPL version of QEMU 'virt' U-Boot does not boot Linux
kernel anymore. In that case, OpenSBI is loaded and runs at 0x81000000,
and it creates a 512KiB PMP window from that address. When booting
the Linux kernel, moving kernel to its linking address 0x80200000
overlaps the PMP window, and a PMP access failure is raised.

Update SPL_OPENSBI_LOAD_ADDR to load OpenSBI to a safe address.

Reported-by: Yangjie Zhang <pyjmstr@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Yangjie Zhang <pyjmstr@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2022-10-20 15:22:33 +08:00
Heinrich Schuchardt
e77ef0bb74 k210: fix k210_pll_calc_config()
The k210 driver is selected by sandbox_defconfig.
Building the sandbox on 32bit systems fails with:

test/dm/k210_pll.c: In function ‘dm_test_k210_pll_calc_config’:
include/linux/bitops.h:11:38: warning:
left shift count >= width of type [-Wshift-count-overflow]
   11 | #define BIT(nr)         (1UL << (nr))
      |                              ^~
test/dm/k210_pll.c:36:54: note: in expansion of macro ‘BIT’
   36 |                         error = abs((error - BIT(32))) >> 16;
      |                                              ^~~

Use the BIT_ULL() macro to create a u64 value.
Replace abs() by abs64() to get correct results on 32bit system
Apply the same for the unit test.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2022-10-20 15:22:30 +08:00
Heinrich Schuchardt
e67f34f778 riscv: support building double-float modules
The riscv32 toolchain for GCC-12 provided by kernel.org contains libgcc.a
compiled for double-float. To link to it we have to adjust how we build
U-Boot.

As U-Boot actually does not use floating point at all this should not
make a significant difference for the produced binaries.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-10-20 15:22:21 +08:00
Heinrich Schuchardt
f22db44c1b cmd/sbi: user friendly short texts
In the sbi command use the same short texts for the legacy extensions
as the SBI specification 1.0.0.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2022-10-20 15:22:15 +08:00
Heinrich Schuchardt
72c1f5f282 cmd/sbi: error message for failure to get spec version
If calling 'Get SBI specification version' fails, write an error message
and return CMD_RET_FAILURE.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2022-10-20 15:22:15 +08:00
Heinrich Schuchardt
9487764e7e cmd/sbi: format RustSBI version number
The SBI command can print out the version number of the SBI implementation.
Choose the correct output format for RustSBI.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2022-10-20 15:22:15 +08:00
Patrick Delaunay
19fb40a5e7 clk: update clk_clean_rate_cache to use private clk struct
In clk_clean_rate_cache, clk->rate should update the private clock
struct, in particular when CCF is activated, to save the cached
rate value.

When clk_get_parent_rate is called, the cached information
is read from pclk->rate, with pclk = clk_get_parent(clk).

As the cached is read from private clk data, the update should
be done also on it.

Fixes: 6b7fd3128f ("clk: fix set_rate to clean up cached rates for the hierarchy")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20220620153717.v2.1.Ifa06360115ffa3f3307372e6cdd98ec16759d6ba@changeid
Link: https://lore.kernel.org/r/20220712142352.RESEND.v2.1.Ifa06360115ffa3f3307372e6cdd98ec16759d6ba@changeid/
2022-10-19 12:28:30 -04:00
Michal Suchanek
aa36a74f0f rockchip: clk: pll: Fix constant typo
Fixes: bbda2ed584 ("rockchip: clk: pll: add common pll setting funcs")
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Link: https://lore.kernel.org/r/20220928104129.13240-1-msuchanek@suse.de
2022-10-19 12:06:48 -04:00
Michal Suchanek
a1265cd580 clk: change return type of clk_get_parent_rate from long long to ulong
All functions getting and setting clock rate use ulong for rate, only
clk_get_parent_rate is an exception. Change the return value to match
other clock rate funcrions.

Most users directly assign the rate to unsigned long anyway, and the few
users that use u64 (not s64) multiply the rate so they may need the
extra bits for the result in their use case.

Fixes: 4aa78300a0 ("dm: clk: Define clk_get_parent_rate() for clk operations")
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20220928103757.11870-1-msuchanek@suse.de
2022-10-19 12:06:41 -04:00
Andre Przywara
843ed983a0 suniv: add UART1 support
Some boards with the Allwinner F1C100s family SoCs use UART1 for its
debug UART, so define the pins for the SPL and the pinmux name and mux
value for U-Boot proper.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-10-19 14:15:02 +01:00
Andre Przywara
b87fb19668 suniv: move SKIP_LOWLEVEL_INIT_ONLY into Kconfig
So far we stated the lack of a lowlevel() init function for the
Allwinner F1C100s board by defining the respective SKIP_* symbol in the
board's defconfig. However we don't expect any *board* to employ such
low level code, so expect this to be never used for the ARMv5 Allwinner
SoCs.

Select the appropriate symbols in the Kconfig, so that we can remove
them from the defconfig, and avoid putting them in future defconfigs for
other boards.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-10-19 14:15:02 +01:00
Andre Przywara
c8b9ba4bb2 sunxi: fix 32MB load address layout
The default load addresses for the various payloads (kernel, DT,
ramdisk) on systems with just 32MB of DRAM have some issues:
For a start the preceding comment doesn't match the actual values:
apparently they were copied from the 64MB S3 layout, then halved, but
since 0x5 is NOT the half of 0x10, they don't match up.
Also those projected maximum sizes are quite restrictive: it's not easy
to build a compressed kernel image with just 4MB. The only defconfig in
mainline Linux that supports the F1C100s (the only 32MB user so far)
creates a 6MB compressed / 15MB uncompressed kernel.
Rearrange the default load addresses to accommodate such a kernel: we
allow an 7MB/16MB kernel, and up to 5MB of ramdisk, stuffing the smaller
binaries like the DTB towards the end, just before the relocated U-Boot.
Shrink the size for DTB and scripts on the way, there is no need for
allowing up to 512K for them.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-10-19 14:15:02 +01:00
Andre Przywara
1bf98bd4e2 sunxi: Kconfig: introduce SUNXI_MINIMUM_DRAM_MB
Traditionally we assumed that every Allwinner board would come with at
least 256 MB of DRAM, and set our DRAM layout accordingly. This affected
both the default load addresses, but also U-Boot's own address
expectations (like being loaded at 160 MB).

Some SoCs come with co-packaged DRAM, but only provide 32 or 64MB. So
far we special-cased those *chips*, as there was only one chip per DRAM
size. However new chips force us to take a more general approach.

Introduce a Kconfig symbol, which provides the minimum DRAM size of the
board. If nothing else is specified, we use 256 MB, and default to
smaller values for those co-packaged SoCs.
Then select the different DRAM maps according to this new symbol, so
that different SoCs with the same DRAM size can share those definitions.

Inspired by an idea from Icenowy.

This is just refactoring: compiled for all boards before and after this
patch: the binaries were identical.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-10-19 14:15:02 +01:00
Icenowy Zheng
14b3c6d72a configs: sunxi: licheepi_nano: enable D-Cache
As the compile error when D-Cache is enabled is gone, we can have
D-Cache enabled now.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-10-19 14:15:02 +01:00
Icenowy Zheng
9a916b07fe sunxi: fix SUNIV build when enabling D-Cache
The enable_caches function in architecture-specific board code is only
necessary for V7A CPUs, code for both V8A and ARM926 have already
declared this function.

Only provide our implementation of enable_caches() for V7A CPUs.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-10-19 14:15:02 +01:00
Andre Przywara
a514577ce2 sunxi: defconfig: Add X96 Mate TV box
The X96 Mate TV box is a TV box with the Allwinner H616 SoC. It is
available with up to 4GB of DRAM and 64GB eMMC.
The DRAM chips require a different configuration when compared to the
OrangePi Zero2, we must not use read/write training and write leveling.

Add a defconfig for the box, so that we can easily build U-Boot for it.
We synced the .dts file already from the kernel tree.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-10-19 14:14:55 +01:00
FUKAUMI Naoki
85a8ef1264 arm: dts: rockchip: rk356x: sync with Linux 6.0
prepare for rk3566 based board

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:49 +08:00
Simon Glass
70e351bdfe rockchip: jerry: Enable RESET driver
At present the display does not work since it needs the reset driver to
operate. Fix this by enabling it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: cd529f7ad6 ("rockchip: video: edp: Add missing reset support")
Fixes: 9749d2ea29 ("rockchip: video: vop: Add reset support")
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:49 +08:00
Quentin Schulz
bd9b4ac9c5 rockchip: puma-rk3399: migrate to u-boot-rockchip-spi.bin
Now that a single binary containing TPL/SPL correctly formatted for SPI
flashes and U-Boot proper, can be generated by binman, let's do it.

Also update the documentation to tell the user to use this newly
generated file instead of manually generating and flashing the binaries.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:49 +08:00
Quentin Schulz
35f571b56c rockchip: puma-rk3399: migrate to u-boot-rockchip.bin
The offset of the SPL payload on Puma is different than for other
Rockchip devices in that it is stored at offset 256K instead of much
further away in the MMC.

Flashing one binary instead of two at different offsets is much more
user friendly so let's migrate to it by modifying the offset in the Puma
specific Device Tree.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:49 +08:00
Quentin Schulz
2169e29c5a rockchip: puma-rk3399: migrate to TPL
Depending on the toolchain used to compile the SPL for Puma RK3399-Q7
module, the board does not boot because the resulting binary is too big
to fit in SRAM.

Let's add a TPL so that there's no need to fiddle with or hack the
defconfig to have a working bootloader.

This follows what's been done for the majority of other RK3399-based
boards.

See the original commit for the first migrations:
bdc0008011 "rockchip: rk3399: update defconfig for TPL"

Unfortunately, the offset in SPI-NOR for U-Boot proper needs to be
modified, since the move from SPL to TPL+SPL for idbloader.img (and the
"only the first 2KB per 4KB blocks are written" "hack" for rkspi format)
increased the size above 256KB. Let's move it to 512KB to, hopefully, be
safe.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:49 +08:00
Quentin Schulz
a913c03c16 rockchip: puma-rk3399: remove useless CONFIG_SYS_SPI_U_BOOT_OFFS
The SPL payload offset when booting from SPI defaults to
CONFIG_SYS_SPI_U_BOOT_OFFS but can be overridden by
u-boot,spl-payload-offset. The Device Tree for Puma Haikou has this
property so there's no need to have this one option in the defconfig,
especially since they are not in sync and therefore confusing.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:49 +08:00
Quentin Schulz
b1f1b4a5a5 rockchip: puma-rk3399: load environment from same medium as one used to load U-Boot proper
Chances are when one boots U-Boot proper from a given storage medium,
they want the same medium to be used to load and store the environment.

This basically allows to have completely separate U-Boot (TPL/SPL/U-Boot
proper/environment) per storage medium which is convenient when working
with recovery from SD-Card as one would just need to insert a properly
configured SD-Card into the device to have access to their whole debug
setup.

No fallback mechanism is provided as to not dirty other storage medium
environment by mistake. However, since arch_env_get_location() is called
by env_init() which is part of the pre-relocation process, a valid,
non-ENVL_UNKNOWN, value shall be returned otherwise the relocation fails
with the following message:
initcall sequence 00000000002866c0 failed at call 0000000000256b34 (err=-19)

This valid, non-ENVL_UNKNOWN, value is ENVL_NOWHERE which requires to
always select CONFIG_ENV_IS_NOWHERE otherwise this work-around does not
work.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:49 +08:00
Quentin Schulz
ac471587f2 rockchip: puma-rk3399: allow loading environment from SPI-NOR flash
There's a SPI-NOR flash available from which SPL and U-Boot proper can
be booted, it makes sense to also allow this medium to store U-Boot
environment so let's enable it.

The Device Tree advertises a max frequency of 50MHz so let's set the
config option appropriately.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:49 +08:00
Quentin Schulz
d7435d4057 rockchip: puma-rk3399: load environment from same MMC as used for loading U-Boot proper
Automatically detect which MMC device (SD-Card or eMMC) was used to load
U-Boot proper and load the environment from that MMC device instead of
a hardcoded one.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:49 +08:00
Quentin Schulz
ba086c6260 rockchip: puma-rk3399: remove unused default ENV_OFFSET for SPI flashes
CONFIG_ENV_OFFSET is set in the defconfig to a different value already
so this isn't used. Let's remove it as to not confuse users.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:49 +08:00