Commit graph

11 commits

Author SHA1 Message Date
Patrick Delaunay
b94b275b0a doc: st: stm32mp1: add STM32MP13x support
Add in U-Boot documentation the quick instruction to
setup the STMicroelectronics STM32MP13x boards.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 10:41:16 +02:00
Patrick Delaunay
c7c06fa776 board: stm32mp1: add support of nor1 device in dfu command
Add support of mtd backend for nor1 when this device is present on the
board, on STM32MP157C-EV1 for example, as the support of several MTD
spi-nor instance are now supported with commit b7f060565e ("mtd:
spi-nor: allow registering multiple MTDs when DM is enabled").

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
5b4c80284d doc: st: stm32mp1: Add FIP support for trusted boot
TF-A for STM32MP15 now supports the FIP: it is a packaging format which
includes the secure monitor, u-boot-nodtb.bin and u-boot.dtb

This FIP file is loaded by FSBL = TF-A BL2.

This patch updates the board documentation to use this FIP file and no
more u-boot.stm32 (with STM32 image header) which is no more generated.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-16 09:36:31 +02:00
Marek Vasut
b076cbe8aa doc: stm32mp1: Use u-boot.itb if CONFIG_SPL_LOAD_FIT=y
For systems where SPL loads fitImage, i.e. CONFIG_SPL_LOAD_FIT=y, use
u-boot.itb in the relevant documentation parts. Otherwise use u-boot.img.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-03-12 15:25:55 +01:00
Patrice Chotard
7ccaa31380 MAINTAINERS: Update STi and STM32 maintainers emails in remaining files
A previous series already update STMicroelectronics emails maintainers
but some files have been omitted (Makefile, .dts, .dtsi and .rst files).
Update Patrick and my email address with the one dedicated to upstream
activities.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-01-13 09:52:58 +01:00
Patrick Delaunay
1a803f6e14 doc: stm32mp1: update DFU support example
Update stm32mp1 board documentation with new management of MMC and
MTD partitions and new PID df11.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
ccf6e9ff95 configs: stm32mp1: remove optee defconfig
As the op-tee presence is detected by U-boot, the stm32mp15_optee_defconfig
is identical to stm32mp15_trusted_defconfig and can be removed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Marek Vasut
132e5b6898 ARM: dts: stm32: Split AV96 into DHCOR SoM and AV96 board
The AV96 is in fact an assembly of DH Electronics DHCOR SoM on top
of an AV96 reference board. Split the DTs to reflect that and make
sure to DHCOR SoM can be reused on other boards easily.

It is also highly recommended to configure the board for the DHCOM
make stm32mp15_dhcom_basic_defconfig
make DEVICE_TREE=stm32mp15xx-dhcor-avenger96
as that permits reusing the board code for the DH components, like
accessing and reading out the ethernet MAC from EEPROM.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Change-Id: I7db47280d4eb0d668eb4e006355240271154f97f
2020-04-24 15:52:48 +02:00
Patrick Delaunay
050fed8a97 stm32mp1: add 800 MHz profile support
The STM32MP1 series is available in 3 different lines which are pin-to-pin
compatible:
- STM32MP157: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz,
              3D GPU, DSI display interface and CAN FD
- STM32MP153: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz
              and CAN FD
- STM32MP151: Single Cortex-A7 core, Cortex-M4 core @ 209 MHz

Each line comes with a security option (cryptography & secure boot)
& a Cortex-A frequency option :

- A : Cortex-A7 @ 650 MHz
- C : Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz
- D : Cortex-A7 @ 800 MHz
- F : Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz

This patch adds the support of STM32MP15xD and STM32MP15xF in U-Boot.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:16:33 +01:00
Patrick Delaunay
7ae22d7278 arm: stm32mp: bsec: add permanent lock support in bsec driver
Add BSEC lock access (read / write) at 0xC0000000 offset of misc driver.
The write access only available for Trusted boot mode, based on new
SMC STM32_SMC_WRLOCK_OTP.

With the fuse command, the permanent lock status is accessed with
0x10000000 offset (0xC0000000 - 0x8000000 for OTP sense/program
divided by u32 size), for example:

Read lock status of fuse 57 (0x39)

  STM32MP> fuse sense 0 0x10000039 1

  Sensing bank 0:

  Word 0x10000039: 00000000

Set permanent lock of fuse 57 (0x39)

  STM32MP> fuse prog 0 0x10000039 1

  Sensing bank 0:

  Word 0x10000039: 00000000

WARNING: the OTP lock is updated only after reboot

WARING: Programming lock or fuses is an irreversible operation!
        This may brick your system.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:05:35 +01:00
Patrick Delaunay
efa667d38b doc: add board documentation for stm32mp1
Change plain test README to rst format and move this file
in documentation directory.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-02 09:41:32 +01:00