Commit graph

69353 commits

Author SHA1 Message Date
Simon Glass
6486eaa024 x86: coral: Correct max98357 file
This somehow ended up as an empty file. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-10 09:35:57 +08:00
Bin Meng
f72d3d6b04 x86: Avoid using hardcoded number of variable range MTRRs in mtrr_commit()
Since commit 29d2d64ed5 ("x86: Add support for more than 8 MTRRs"),
the maximum number of variable range MTRRs was increased from 8 to 10.
On the BayTrail platform there are only 8 variable range MTRRs. In
mtrr_commit() it still uses MTRR_MAX_COUNT which caused a #GP during
VESA video driver probe. It should have been updated to use dynamically
probed number.

This fixes the boot failure seen on Intel Minnow Max board.

Fixes: 29d2d64ed5 ("x86: Add support for more than 8 MTRRs")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-11-10 09:25:25 +08:00
Tom Rini
1ae955e3a5 Prepare v2021.01-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-11-09 17:20:05 -05:00
Tom Rini
b3f4873438 Pull request for UEFI sub-system for efi-2021-01-rc2 (2)
The following bugs are fixed:
 
 * The conitrace command failed to build.
 * Non-volatile UEFI variables were not delete form the file store.
 
 The following features are added:
 
 * Support for the FN1 - FN10 keys on crosswire keyboards is added.
 * An EFI binary is provided to dump the binary device tree.
 
 tpm2_get_capability() is adjusted in preparation of the implementation
 of the EFI_TCG2_PROTOCOL.
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Merge tag 'efi-2021-01-rc2-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2021-01-rc2 (2)

The following bugs are fixed:

* The conitrace command failed to build.
* Non-volatile UEFI variables were not delete form the file store.

The following features are added:

* Support for the FN1 - FN10 keys on crosswire keyboards is added.
* An EFI binary is provided to dump the binary device tree.

tpm2_get_capability() is adjusted in preparation of the implementation
of the EFI_TCG2_PROTOCOL.
2020-11-09 15:48:50 -05:00
Tom Rini
74f11b55df configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-11-09 14:23:01 -05:00
Amit Singh Tomar
97949924f1 arm: actions: increase SYS_MALLOC_F_LEN
after commit 4ab3817ff1 ("clk: fixed-rate: Enable DM_FLAG_PRE_RELOC flag")
Cubieboard7 (based on actions S700 SoC) fails to boot.

It is due to the fact that the default value of CONFIG_SYS_MALLOC_F_LEN (0x400)
would not provide enough memory for clock device to probe (before relocation)
well.

This commit fixes it, by increasing SYS_MALLOC_F_LEN to value 0x2000.

Suggested-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-11-09 14:18:10 -05:00
Marek Vasut
68cbc63da0 net: ks8851: Implement EEPROM MAC address readout
In case there is an EEPROM attached to the KS8851 MAC and the EEPROM
contains a valid MAC address, the MAC address is loaded into the NIC
registers on power on. Read the MAC address out of the NIC registers
and provide it to U-Boot.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-11-09 14:18:09 -05:00
Ilias Apalodimas
a322f54f50 tpm: Change response length of tpm2_get_capability()
For implementing the EFI_TCG2_PROTOCOL we need the count field returned by
the TPM when reading capabilities via tpm2_get_capability().

Adjust the implementation of the 'tpm2 get_capability' command accordingly.

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-11-09 17:28:18 +01:00
Heinrich Schuchardt
b1aa6fcf27 efi_selftest: add tool to download dtb
For validating the fixed up device tree we need a tool to need to save it
to a file.

dtbdump.efi copies the configuration table with the device tree to a file
on the same partition from which dtbdump.efi was invoked. The file name can
be entered on the console.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-11-09 17:28:17 +01:00
Heinrich Schuchardt
ab02c3fec4 efi_loader: non-volatile variable not deleted from file
When deleting a non-volatile variable it was deleted from memory but the
deletion was not persisted to the file system.

SetVariable() may be called with attributes == 0 to delete a variable. To
determine if the deletion shall be persisted we have to consider the
non-volatile flag in the attributes of the deleted variable and not the
value passed in the call parameter.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-11-09 17:28:17 +01:00
Heinrich Schuchardt
b055a05b98 input: add support for FN1 - FN10 on crosswire kbd
Chromebooks and the sandbox use a crosswire keyboard with function keys
FN1 - FN10. These keys are needed when running UEFI applications like GRUB
or the UEFI SCT.

Add support for these keys when translating from key codes to
ECMA-48 (or withdrawn ANSI 3.64) escape sequences.

All escape sequences start with 0x1b. So we should not repeat this
byte in the kbd_to_ansi364 table.

For testing use:

sandbox_defconfig + CONFIG_EFI_SELFTEST=y

$ ./u-boot -D -l

=> setenv efi_selftest extended text input
=> bootefi selftest

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-11-09 17:28:17 +01:00
Heinrich Schuchardt
2fb3ed2cbc cmd: conitrace: replace getc() by getchar()
This command was missed when renaming getc() to getchar().

Fixes: c670aeee3d ("common: rename getc() to getchar()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-11-09 17:28:17 +01:00
Tom Rini
22ad69b798 patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
 sandbox poweroff command
 minor fixes in binman, tests
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Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests
2020-11-06 11:27:14 -05:00
Tom Rini
896cc5aa4a Merge tag 'u-boot-amlogic-20201105' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- meson64_android: don't show logo on ROM USB boot
- doc: update support matrix and fix vim3/l build instructions
- meson64: relocate config_distro_bootcmmd header
2020-11-06 09:46:43 -05:00
Tom Rini
d062c1344c Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Add a new SMBIOS parser and enable it when booting from coreboot
- Fix up various driver names to avoid dtoc warnings
- Fully enable ACPI support on Google Chromebook Coral
- Add a way to set SMBIOS properties using the devicetree
- Update existing boards to use devicetree for SMBIOS using a new
  default sysinfo driver
2020-11-06 09:46:43 -05:00
Pali Rohár
71d3fa7efa Makefile: Fix calling make with V=1
Calling 'make V=1 all' on Ubuntu 18.04 with gcc version 9.2.1 and GNU Make
version 4.1 fails on error:

    scripts/Kbuild.include:220: *** Recursive variable 'echo-cmd' references itself (eventually).  Stop.

As a workaround expand 'echo-cmd' variable via 'call' construction instead
of expanding it directly.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reported-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Fixes: ae897022d7 ("Makefile: Fix u-boot-nodtb.bin target")
2020-11-06 09:46:11 -05:00
Simon Glass
e4f8e543f1 smbios: Drop the unused Kconfig options
Now that we can use devicetree to specify this information, drop the old
CONFIG options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:26:32 +08:00
Simon Glass
839d66cdb5 x86: Provide default SMBIOS manufacturer/product
Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:25:56 +08:00
Simon Glass
8f1f374f63 x86: galileo: Use devicetree for SMBIOS settings
Add settings and enable the default sysinfo driver so that these can come
from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Simon Glass
fa9e1bcfc4 arm64: mvebu: Use devicetree for SMBIOS settings on uDPU
Add settings and enable the default sysinfo driver so that these can come
from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Simon Glass
a1d63bc135 odroid-c2: Use devicetree for SMBIOS settings
Add settings and enable the default sysinfo driver so that these can come
from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Simon Glass
c0697c1f4b imx: Use devicetree for SMBIOS settings on MYiR MYS-6ULX
Add settings and enable the default sysinfo driver so that these can come
from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Simon Glass
70190f82cb rockchip: Use devicetree for SMBIOS settings
Add settings and enable the default sysinfo driver so that these can come
from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Simon Glass
44c74bdd58 sysinfo: Provide a default driver to set SMBIOS values
Some boards want to specify the manufacturer or product name but do not
need to have their own sysinfo driver.

Add a default driver which provides a way to specify this SMBIOS
information in the devicetree, without needing any board-specific
functionality.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Simon Glass
f969653154 smbios: Add documentation and devicetree binding
Add information about how to set SMBIOS properties using the devicetree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Simon Glass
a3f5c8ea69 smbios: Add more properties
The current tables only support a subset of the available fields defined
by the SMBIOS spec. Add a few more.

We could use CONFIG_SYS_CPU or CONFIG_SYS_SOC as a default for family, but
the meaning of that value relates more to the whole system rather than
just the SoC.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Simon Glass
44ffb6f0ec smbios: Allow properties to come from the device tree
Support a way to put SMBIOS properties in the device tree. These can be
placed in a 'board' device in an 'smbios' subnode.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Simon Glass
78227d4eda x86: Pass an ofnode into each SMBIOS function
As a first step to obtaining SMBIOS information from the devicetree, add
an ofnode parameter to the writing functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Simon Glass
49337238ef doc: Add a binding for sysinfo
Add a simple binding file for this, so that it is clear what this binding
directory is for.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Simon Glass
3a8ee3df83 board: Rename uclass to sysinfo
This uclass is intended to provide a way to obtain information about a
U-Boot board. But the concept of a U-Boot 'board' is the whole system,
not just one circuit board, meaning that 'board' is something of a
misnomer for this uclass.

In addition, the name 'board' is a bit overused in U-Boot and we want to
use the same uclass to provide SMBIOS information.

The obvious name is 'system' but that is so vague as to be meaningless.
Use 'sysinfo' instead, since this uclass is aimed at providing information
on the system.

Rename everything accordingly.

Note: Due to the patch delta caused by the symbol renames, this patch
shows some renamed files as being deleted in one place and created in
another.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Simon Glass
a40f890bdb x86: zimage: Quieten down the zimage boot process
Much of the output is not very useful. The bootm command is quite a bit
quieter. Convert some output to use log_debug().

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-11-06 09:51:34 +08:00
Simon Glass
7c79eddbec x86: zimage: Sanity-check the kernel version before printing it
With Chrome OS the kernel setup block is stored in a separate place from
the kernel, so it is not possible to access the kernel version string.
At present, garbage is printed.

Add a sanity check to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:34 +08:00
Simon Glass
b73d61a556 x86: zimage: Add a little more logging
Add logging for each part of the boot process, using a new

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-11-06 09:51:34 +08:00
Simon Glass
d46c0932a9 x86: fsp: Adjust calculations for MTRR range and DRAM top
At present the top of available DRAM is the same as the top of the range
of the low-memory MTRR.

In fact, U-Boot is allowed to use memory up until the start of the FSP
reserved memory. Use that value for low_end, since it makes more memory
available.

Keep the same calculation as before for mtrr_top, i.e. the top of
reserved memory.

A side-effect of this change is that the E820 tables have a single entry
that extends from the bottom of the memory used by U-Boot to the bottom
of the FSP reserved memory. This includes the bloblist, if ACPI tables
are placed there.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:33 +08:00
Simon Glass
dd27cd6dab x86: pinctrl: Silence the warning when a pin is not found
This does not necessarily indicate a problem, since some pins are
optional. Let the caller show an error if necessary.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-11-06 09:51:33 +08:00
Simon Glass
98bf740e7f x86: acpi: Don't show the UART address by default
This is useful when using Linux's earlycon since the MMIO address must be
provided on some platforms, e.g.:

   earlycon=uart8250,mmio32,0xddffc000,115200n8

However this is only for debugging, so don't show it by default.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:33 +08:00
Simon Glass
7f061e0d25 x86: acpi: Include the TPMv1 table only if needed
This table is not needed if a v2 TPM is in use. Add a condition to avoid
adding it when not needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:32 +08:00
Simon Glass
1da448bb9f x86: Silence some logging statements
Quite a few log_info() calls are included in the x86 code which should use
log_debug() instead. Convert them to reduce unwanted output.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:32 +08:00
Simon Glass
d0147fe8a2 x86: fsp: Convert fsp_dram to use log_debug()
Use log_debug() instead of debug() in this file, to enable the extra
features.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:32 +08:00
Simon Glass
e0028ab75a x86: Boot coral into Chrome OS by default
Add a script to boot Chrome OS from the internal MMC. This involved adding
a few commands and options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:32 +08:00
Simon Glass
9910fc183a x86: Set up Chrome OS to boot into developer mode
Set up a few fields necessarily to make Chrome OS boot without showing a
firmware error.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:31 +08:00
Simon Glass
96d0aa9143 x86: Use CONFIG_CHROMEOS_VBOOT for verified boot
At present CONFIG_CHROMEOS is used to determine whether verified boot is
in use. The code to implement that is not in U-Boot mainline.

However, it is useful to be able to boot a Chromebook in developer mode
in U-Boot mainline without needing the verified boot code.

To allow this, use CONFIG_CHROMEOS_VBOOT to indicate that verified boot
should be used, and CONFIG_CHROMEOS to indicate that the board supports
Chrome OS. That allows us to define CONFIG_CHROMEOS on coral.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:31 +08:00
Simon Glass
08059c9c02 x86: Define the Chrome OS GNVS region
It is not possible to boot Chrome OS properly without passing some basic
information from U-Boot. This applies even if verified boot is not being
used. Add a structure definition for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:31 +08:00
Simon Glass
18434aec1b acpi: Don't reset the tables with every new generation
At present if SSDT and DSDT code is created, only the latter is retained
for examination by the 'acpi items' command. Fix this by only resetting
the list when explicitly requested.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:31 +08:00
Simon Glass
01e3c9d2ec x86: acpi: Put the generated code first in DSDT
The current implementation for DSDT tables is not correct for the case
where there is generated code, as the length ends up being incorrect.
Also, we want the generated code to go first in the table.

Rewrite this piece to correct these problems.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:30 +08:00
Simon Glass
2de4744dae x86: acpi: Allow the SSDT to be empty
If there is nothing in the SSDT we should not include it in the tables.
Update the implementation to check this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:30 +08:00
Simon Glass
be1cee11b2 acpi: Correct reset handling in acpi_device_add_power_res()
If there is no reset line, this still emits ACPI code for the reset GPIO.
Fix it by updating the check.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:30 +08:00
Simon Glass
dd30c5bb57 x86: sound: Correct error handling
A few functions have changed to return pin numbers or I2C addresses. The
error checking for some of the callers is therefore wrong. Fix them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:29 +08:00
Simon Glass
a0ed800376 x86: Show the interrupt pointer with 'irqinfo'
It is useful for this command to show the address of the interrupt table.
Add support for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:29 +08:00
Simon Glass
8bcfb7917a x86: nhlt: Fix a few bugs in the table generation
At present these tables do not have the correct header, and there is an
occasional incorrect value due to uninited data. Fix these bugs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:29 +08:00