The driver is actually for the Designware DWC2 controller.
This patch renames struct s3c_ep to reflect this.
Signed-off-by: Marek Vasut <marex@denx.de>
The driver is actually for the Designware DWC2 controller.
This patch renames struct s3c_dev_*_ep to reflect this.
Signed-off-by: Marek Vasut <marex@denx.de>
The driver is actually for the Designware DWC2 controller.
This patch renames struct s3c_usbotg_phy to struct dwc2_usbotg_phy
to make things more obvious and clear.
Signed-off-by: Marek Vasut <marex@denx.de>
Most of the functions are local to the s3c_udc driver, remove them
from the s3c_udc.h header to stop those bits from propagating all
over the place. Instead, move all the private stuff into new private
s3c_udc_otg_priv.h header.
Signed-off-by: Marek Vasut <marex@denx.de>
The driver is actually for the Designware DWC2 controller.
This patch renames struct s3c_usbotg_reg to struct dwc2_usbotg_reg
to make things more obvious and clear.
Signed-off-by: Marek Vasut <marex@denx.de>
The driver is actually for the Designware DWC2 controller.
This patch renames struct s3c_udc to struct dwc2_udc to make
things more obvious and clear.
Signed-off-by: Marek Vasut <marex@denx.de>
For Setting and clearing the bits in SEC Block registers
sec_clrbits32() and sec_setbits32() are used which work as
per endianness of CAAM block.
So these must be used with SEC register address as argument.
If the value is read in a local variable, then the functions
will not behave correctly where endianness of CAAM and core is
different.
Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
CC: Alex Porosanu <alexandru.porosanu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
When reading a large blob. e.g. a linux kernel (several MiBs) a watchdog
timeout might occur meanwhile. So pet the watchdog while operating on
the flash.
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Reviewed-by: York Sun <yorksun@freescale.com>
As the errata A008336 and A008514 do not apply to all LS series SoCs
(such as LS1021A, LS1043A) we move them to an soc specific file
Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
With gcc-5.x we get a warning about the ambiguity of BUG_ON(!a != b) and
becomes BUG_ON((!a) != b). In this case reading of the function leads to
us wanting to rewrite this as BUG_ON(a != b).
Cc: Prabhakar Kushwaha <prabhakar@freescale.com>
Cc: Geoff Thorpe <Geoff.Thorpe@freescale.com>
Cc: Haiying Wang <Haiying.Wang@freescale.com>
Cc: Roy Pledge <Roy.Pledge@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <yorksun@freescale.com>
DDR errata-A008378 applies to LS1021-20-22A-R1.0, T1023-R1.0,
T1024-R1.0, T1040-42-20-22-R1.0/R1.1, it has been fixed on
LS102x Rev2.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
In case four chip-selects are all active, the turnaround times need to
increase to avoid overlapping under heavy load.
Signed-off-by: York Sun <yorksun@freescale.com>
The workaround requires different setting for range 1 vs 2.
Also adjust timeout value for waiting for controller to be idle.
Signed-off-by: York Sun <yorksun@freescale.com>
Add xlnx,xps-spi-2.00.a/b which is compatible string
listed in the Linux kernel.
Remove origin one which has no real background.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Since all spi-flash core operations are moved into
sf_ops.c then it's better to renamed as spi-flash.c
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Used static for file-scope functions in sf_probe.c
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Since spi_slave is a spi pointer in spi_flash{} then assign
spi_slave{} pointer to flash->spi and remove spi_slave
pointer argument to
- spi_flash_probe_slave
- spi_flash_scan
Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
For assigning read_bar commands in spansion case, break
is missing this patch add that break.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
SST parts added on sf_params.c supports both SST_WR which consits
of both BP and WP and there is a spi controller ich which supports
only BP so the relevent _write hook set based on "slave->op_mode_tx"
hence there is no respective change required from flash side hance
removed these.
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Removed unneeded header includes in sf_ops and sf_probe
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Using macro's for flash power up read-only access code
leads wrong behaviour hence use idcode0 for runtime
detection, hence the flash which require this functionality
gets detected at runtime.
Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Most of the register access function are static,
so used simple name to represent each.
Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
This patch removes unneeded ifdef and fixed accordingly.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Use static for file-scope functions and removed
them from header files.
Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
- Move bar read code below the bar write hance both
at once place, hence it easy for #ifdef macro only
once and readable.
- Move read_cmd_array at top
Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
read_id code is related to spi_flash stuff
hence moved to sf_ops.
Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Intension is that sf_ops should deals all spi_flash
related stuff and sf_probe (which should renamed future)
should be an interface layer for spi_flash versus spi drivers.
sf_ops => spi_flash interface
sf_probe => interface layer vs spi_flash(sf_probe) to spi drivers
Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Rename spi_flash_validate_params to spi_flash_scan
as this code not only deals with params setup but
also configure all spi_flash attributes.
And also moved all flash related code into
spi_flash_scan for future functionality addition.
Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Extend compatible list table for cdns,spi-r1p6 compatible string.
Reviewed-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
SPI_3WIRE is spi mode not spi flags, so this patch fixed
the spi-3wire checking throgh mode instead of flags.
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
spi-3wire is used when SI/SO signals shared so get
the same from dts node and assign to mode on slave
plat->mode.
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Fix incorrect comment alignments.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Add a remark about SPL to this Kconfig option. Otherwise its identitcal
to the non-SPL version, which is confusing.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
AXP818 is rsb based PMIC and used on Allwinner A83T H8 Homlet dev board.
It's registers are different and calculating reg config is different than
that of earlier axp power ICs.
DCDC1, DCDC2, DCDC3 and DCDC5 is implemented at the moment.
all other voltages can be added subsequently.
AXP datasheet is uploaded to wiki:
http://linux-sunxi.org/File:AXP818_datasheet_Revision1.0.pdf
Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
These are currently dead codes. Until we have complete ACPI support,
we don't know if it works or not. Remove to avoid confusion.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Right now i8254_init() is called from timer_init() in the tsc timer
driver. But actually i8254 and tsc are completely different things.
Since tsc timer has been converted to driver model, we should find
a new place that is appropriate for U-Boot to call i8254_init(),
which is now x86_cpu_init_f().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
This option is needed for all SoCs which have nodes on bus. Without
enabling this drivers are not found and probed.
Issue was found on Zynq MMC probe.
Enable this option by default.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
