Commit graph

68831 commits

Author SHA1 Message Date
Tom Rini
42378e3cd2 bloblist enhancement for alignment
Update ofnode/dev_read phandle function
 sandbox keyboard enhancements and fixes
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Merge tag 'dm-pull-6oct20' of git://git.denx.de/u-boot-dm

bloblist enhancement for alignment
Update ofnode/dev_read phandle function
sandbox keyboard enhancements and fixes
2020-10-06 13:59:01 -04:00
Heinrich Schuchardt
175e8322bc sandbox: avoid duplicate backslash input
When using SDL for input the SDL key codes are first converted to Linux key
codes and then to matrix entries of the cross wired keyboard.

We must not map any key code to two different places on the keyboard. So
comment out one backslash position.

Update the rest of the file from Linux 5.7.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-06 09:07:54 -06:00
Heinrich Schuchardt
c4216219ec sandbox: add missing SDL key scan codes
Add missing SDL key scan codes, e.g.

* shift, ctrl, meta, alt
* brace/bracket

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-06 09:07:54 -06:00
Patrick Delaunay
cc72f3e026 test: dm: add test for phandle access functions
Add unitary test for phandle access functions
- ofnode_count_phandle_with_args
- ofnode_parse_phandle_with_args
- dev_count_phandle_with_args
- dev_read_phandle_with_args

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-06 09:07:54 -06:00
Patrick Delaunay
cba487c7fc fdtdec: correct test on return of fdt_node_offset_by_phandle
The result of fdt_node_offset_by_phandle is negative for error,
so this patch corrects the check of this result in
fdtdec_parse_phandle_with_args.

This patch allows to have the same behavior with or without OF_LIVE
for the function dev_read_phandle_with_args with cell_name = NULL and
with invalid phandle.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-06 09:07:54 -06:00
Patrick Delaunay
89f68302ca dm: add cells_count parameter in *_count_phandle_with_args
The cell_count argument is required when cells_name is NULL.

This patch adds this parameter in live tree API
- of_count_phandle_with_args
- ofnode_count_phandle_with_args
- dev_count_phandle_with_args

This parameter solves issue when these API is used to count
the number of element of a cell without cell name. This parameter
allow to force the size cell.

For example:
  count = dev_count_phandle_with_args(dev, "array", NULL, 3);

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-06 09:07:54 -06:00
Patrick Delaunay
6d9949fe86 dm: update test on of_offset in ofnode_valid
Update the test for node.of_offset because an invalid offset is not
always set to -1 because the return value of the libfdt functions are:
+ an error with a value < 0
+ a valid offset with value >=0

For example, in ofnode_get_by_phandle() function, we have:
node.of_offset = fdt_node_offset_by_phandle(gd->fdt_blob, phandle);
and this function can return -FDT_ERR_BADPHANDLE (-6).

Without this patch, the added test dm_test_ofnode_get_by_phandle failed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-06 09:07:54 -06:00
Stefan Roese
45dbe75da6 dm: ofnode: Fix compile breakage with OF_CHECKS enabled
Include missing log.h and change _ofnode_to_np() to ofnode_to_np() so
that compiling with OF_CHECKS enabled does not break.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-06 09:07:54 -06:00
Simon Glass
e9b6b2c77d bloblist: Fix up a few comments
Adjust a few comments to make the meaning clearer.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-06 09:07:54 -06:00
Simon Glass
4c1497e776 bloblist: Allow custom alignment for blobs
Some blobs need a larger alignment than the default. For example, ACPI
tables often start at a 4KB boundary. Add support for this.

Update the size of the test blob to allow these larger records.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-06 09:07:54 -06:00
Simon Glass
751b7c7963 bloblist: Tidy up the data alignment
The intention which bloblists is that each blob's data is aligned in
memory. At present it is only the headers that are aligned.

Update the code to correct this and add a little more documentation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-06 09:07:54 -06:00
Simon Glass
cdd4e30dfc bloblist: Compare addresses rather than pointers in tests
When running these tests on sandbox any failures result in very large or
long pointer values which are a pain to work with. Map them to an address
so it is easier to diagnose failures.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-06 09:07:54 -06:00
Simon Glass
4aed227623 bloblist: Add a command
It is helpful to be able to see basic statistics about the bloblist and
also to list its contents. Add a 'bloblist' command to handle this.

Put the display functions in the bloblist modules rather than in the
command code itself. That allows showing a list from SPL, where commands
are not available.

Also make bloblist_first/next_blob() static as they are not used outside
this file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-06 09:07:54 -06:00
Heinrich Schuchardt
9c22adb8f9 doc/arch/sandbox.rst: reformat command line options
Reformat the command line options chapter so that the command line options
clearly stand out.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-06 09:07:54 -06:00
Heinrich Schuchardt
b0b3524d94 MAINTAINERS: assign doc/arch/sandbox.rst
Add doc/arch/sandbox.rst to the scope of SANDBOX.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-06 09:07:54 -06:00
Tom Rini
5dcf7cc590 Pull request for UEFI sub-system for efi-2021-01-rc1
The following bugs in the UEFI system are resolved:
 
 * illegal free in EFI_LOAD_FILE2_PROTOCOL implementation
 * incorrect documentation of EFI_LOAD_FILE2_PROTOCOL implementation
 * output of CRC32 as decimal instead hexadecimal in unit test
 * use EfiReservedMemoryType for no-map reserved memory
 * avoid unnecessary resets in UEFI unit tests
 * call EFI bootmgr even without having /EFI/boot
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Merge tag 'efi-2021-01-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2021-01-rc1

The following bugs in the UEFI system are resolved:

* illegal free in EFI_LOAD_FILE2_PROTOCOL implementation
* incorrect documentation of EFI_LOAD_FILE2_PROTOCOL implementation
* output of CRC32 as decimal instead hexadecimal in unit test
* use EfiReservedMemoryType for no-map reserved memory
* avoid unnecessary resets in UEFI unit tests
* call EFI bootmgr even without having /EFI/boot
2020-10-06 08:36:38 -04:00
Tom Rini
987ab49366 - generate unique mac address from SoC serial on S400 board
- Add USB support for GXL and AXG SoCs
 - Update Gadget code to use the new GXL and AXG USB glue driver
 - Add a VIM3 board support to add dynamic PCIe enable in OS DT
 - Fix AXG pinmux with requesting GPIOs
 - Add missing GPIOA_18 for AXG pinctrl
 - Add Amlogic PWM driver
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Merge tag 'u-boot-amlogic-20201005' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- generate unique mac address from SoC serial on S400 board
- Add USB support for GXL and AXG SoCs
- Update Gadget code to use the new GXL and AXG USB glue driver
- Add a VIM3 board support to add dynamic PCIe enable in OS DT
- Fix AXG pinmux with requesting GPIOs
- Add missing GPIOA_18 for AXG pinctrl
- Add Amlogic PWM driver
2020-10-06 08:36:10 -04:00
Heinrich Schuchardt
4cbb2930bd efi_loader: consider no-map property of reserved memory
The device tree may contain a /reserved-memory node. The no-map property
of the sub-nodes signals if the memory may be accessed by the UEFI payload
or not.

In the EBBR specification (https://github.com/arm-software/ebbr) the
modeling of the reserved memory has been clarified.

If a reserved memory node in the device tree has the no-map property map,
create a EfiReservedMemoryType memory map entry else use
EfiBootServicesData.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-10-06 07:43:56 +02:00
Heinrich Schuchardt
4b71f6dc4e efi_loader: QEMU CONFIG_EFI_GRUB_ARM32_WORKAROUND=n
CONFIG_EFI_GRUB_ARM32 is only needed for architectures with caches that are
not managed via CP15 (or for some outdated buggy versions of GRUB). It
makes more sense to disable the setting per architecture than per defconfig.

Move QEMU's CONFIG_EFI_GRUB_ARM32_WORKAROUND=n from defconfig to Kconfig.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-10-06 07:43:56 +02:00
Sean Anderson
493a37fe86 efi: Fix typo in documentation
There is an extra space.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-10-06 07:43:56 +02:00
Michael Walle
f3866909e3 distro_bootcmd: call EFI bootmgr even without having /EFI/boot
Currently, the EFI bootmgr is only called if there is a EFI binary
inside the path for removable media is found, i.e. /EFI/boot/. This
doesn't make sense. It is the duty of the bootmgr to find out the
path and name of the EFI binary to boot. It should be called even
if there is no /EFI/boot directory.

Thus, call the bootmgr before we try to boot the EFI binary inside
the removable media path.

Also remove the ${fdtcontroladdr} parameter because the fallback is
handled in cmd/bootefi.c and that already takes care of correct settings
if the board has ACPI and thus no device tree at all.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-10-06 07:43:56 +02:00
Heinrich Schuchardt
eb0d1d8399 efi_selftest: avoid unnecessary reset
When we do not execute a test requiring ExitBootServices do not reset the
system after testing.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-10-06 07:43:56 +02:00
Heinrich Schuchardt
dc374ab08f efi_selftest: print CRC32 of initrd as hexadecimal
Print the CRC32 loaded via the EFI_LOAD_FILE2_PROTOCOL as a hexadecimal
number.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2020-10-06 07:43:56 +02:00
Heinrich Schuchardt
9487683821 efi_selftest: enable printing hexadecimal numbers
Add code to use %x in efi_st_print().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-10-06 07:43:56 +02:00
Heinrich Schuchardt
e2aff337ed efi_loader: illegal free in EFI_LOAD_FILE2_PROTOCOL
strsep() changes the address that its first argument points to.
We cannot use the changed address as argument of free().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2020-10-06 07:43:56 +02:00
Heinrich Schuchardt
5cd28e1760 efi_loader: description EFI_LOAD_FILE2_PROTOCOL
U-Boot offers a EFI_LOAD_FILE2_PROTOCOL which the Linux EFI stub can use to
load an initial RAM disk. Update the function comments of the
implementation.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2020-10-06 07:43:56 +02:00
Tom Rini
b24550accd configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-10-05 14:11:16 -04:00
Tom Rini
b7e7831e5d Merge branch 'next'
Bring in the assorted changes that have been staged in the 'next' branch
prior to release.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-10-05 14:10:59 -04:00
Neil Armstrong
2d481b2e3e pwm: Add driver for Amlogic Meson PWM controller
This adds the driver for the PWM controller found in the Amlogic SoCs.

This PWM is only a set of Gates, Dividers and Counters:
PWM output is achieved by calculating a clock that permits calculating
two periods (low and high). The counter then has to be set to switch after
N cycles for the first half period.
The hardware has no "polarity" setting. This driver reverses the period
cycles (the low length is inverted with the high length) for
PWM_POLARITY_INVERSED.

Disabling the PWM stops the output immediately (without waiting for the
current period to complete first).

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05 18:02:16 +02:00
Neil Armstrong
38c1c6f816 pinctrl: meson-axg: add missing GPIOA_18
Add the missing GPIOA_18 from the missing EE gpio list.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05 18:01:40 +02:00
Neil Armstrong
0f6bef4a95 pinctrl: meson-axg-pmx: fix gpio request
The AXG pmx driver gpio request offset needs the pin base to have the
correct pin number.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2020-10-05 18:01:39 +02:00
Neil Armstrong
adbff64af7 board: amlogic: vim3: add support for dynamic PCIe enable
The VIM3 on-board  MCU can mux the PCIe/USB3.0 shared differential
lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
an USB3.0 Type A connector and a M.2 Key M slot.
The PHY driving these differential lines is shared between
the USB3.0 controller and the PCIe Controller, thus only
a single controller can use it.

This adds this dynamic switching right before booting Linux
and the configuration steps in the boards documentation.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
[narmstrong: fixed warning by replacing min() by min_t()]
2020-10-05 17:59:45 +02:00
Neil Armstrong
cb4a7feb54 configs: vim3: use the vim3 board support
Use the newly added VIM3 board support instead of the generic W400.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05 17:59:45 +02:00
Neil Armstrong
5aeecbcf81 board: amlogic: add a vim3 specific board support
The VIM3 will need a specific code to enable PCIe if enabled in the MCU,
thus add a specific board support for VIM3 & VIM3L.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05 17:59:45 +02:00
Neil Armstrong
1110e49e34 ARM: dts: sync amlogic G12A/SM1 DT from Linux 5.9-rc1
This imports the G12A & SM1 SoC and boards DT changes from the Linux
commit 9123e3a74ec7 ("Linux 5.9-rc1").

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05 17:59:45 +02:00
Neil Armstrong
7570ad6b6e configs: s400: enable USB
Enable USB Host & Gadget on the Amlogic S400 board.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05 17:59:45 +02:00
Neil Armstrong
85a034c275 ARM: dts: meson-axg: add USB nodes for S400
Add the correcly architectured USB Glue node for Meson AXG and the
S400 board in -u-boot.dtsi until support in upstream Linux then
backported.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05 17:59:45 +02:00
Neil Armstrong
e9d29b98e3 arm: meson-axg: add board_usb_init()/cleanup() for USB gadget
Add the board_usb_init()/cleanup() for USB gadget for AXG based
on the code for the G12A architecture.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05 17:59:45 +02:00
Neil Armstrong
0ae8724d7e phy: meson-gxl-usb: depend on Meson AXG aswell
Enable build of meson-gxl-usb PHY for the AXG architecture aswell.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05 17:59:45 +02:00
Neil Armstrong
66d9427403 phy: meson-gxl: remove invalid USB3 PHY driver
The registers which are managed by the meson-gxl-usb3 PHY driver are
actually "USB control" registers (which are "glue" registers which
manage OTG detection and routing of the OTG capable port between the
DWC2 peripheral-only controller and the DWC3 host-only controller).

Drop the meson-gxl-usb3 PHY driver now that the dwc3-meson-gxl-usb
driver supports the USB control registers on GXL and GXM SoCs (these
were previously managed by the meson-gxl-usb3 PHY driver).

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05 17:59:45 +02:00
Neil Armstrong
7ccc73773f ARM: mach-meson: use new DWC3 glue for GXL & GXM
Use the new Amlogic GXL/GXM USB Glue instead of the set of USB3 PHY
and Simple DWC3 wrapper.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05 17:59:45 +02:00
Neil Armstrong
46eddbc58f usb: dwc3: add Amlogic GXL & GXL DWC3 Glue
The USB support was initialy done with a set of PHYs and dwc3-of-simple
because the architecture of the USB complex was not understood correctly
at the time (and proper documentation was missing...).

But with the G12A family, the USB complex was correctly understood and
implemented correctly.

This adds a proper driver for the glue, based on the G12A one, but with
enough changes to require a different driver in U-Boot.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05 17:59:45 +02:00
Neil Armstrong
4e7b0a3f2a ARM: dts: sync amlogic AXG/GXL/GXM DT from Linux 5.8-rc1
This imports the AXG, GXL & GXM SoC and boards DT changes from the Linux
commit b3a9e3b9622a ("Linux 5.8-rc1").

This change also removes GXL & GXM u-boot.dtsi hacks for USB gadget.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05 17:59:45 +02:00
Neil Armstrong
394c6b0ff1 board: s400: generate unique mac address from SoC serial
Enable unique mac address generation from SoC serial on S400 board.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05 17:59:45 +02:00
Tom Rini
050acee119 Prepare v2020.10
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-10-05 11:15:32 -04:00
Tom Rini
caebff09ef First set of u-boot-atmel features for 2021.01 cycle
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Merge tag 'u-boot-atmel-2021.01-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel into next

First set of u-boot-atmel features for 2021.01 cycle:

This feature set includes a new CPU driver for at91 family, new driver
for PIT64B hardware timer, support for new at91 family SoC named sama7g5
which adds: clock support, including conversion of the clock tree to
CCF; SoC support in mach-at91, pinctrl and mmc drivers update.  The
feature set also includes updates for mmc driver and some other minor
fixes and features regarding building without the old Atmel PIT and the
possibility to read a secondary MAC address from a second i2c EEPROM.
2020-10-05 10:54:27 -04:00
Tom Rini
17e76b33cc - stm32mp: DT alignment with Linux 5.9-rc4
- stm32mp: convert drivers to APIs which support live DT
 - stm32mp: gpio: minor fixes
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Merge tag 'u-boot-stm32-20201003' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm into next

- stm32mp: DT alignment with Linux 5.9-rc4
- stm32mp: convert drivers to APIs which support live DT
- stm32mp: gpio: minor fixes
2020-10-05 10:54:10 -04:00
Claudiu Beznea
01c35f269f cpu: at91: add driver for CPU
Add basic CPU driver use to retrieve information about CPU itself.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2020-10-05 10:45:16 +03:00
Tom Rini
fee98a3ba9 Merge branch 'rpi-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi into next 2020-10-02 12:00:39 -04:00
Ovidiu Panait
0db912de15 pinctrl: bcm283x: Store the return value of dev_read_u32_default to int
Currently, the return value of dev_read_u32_default is stored in an u32,
causing the subsequent "if (function < 0)" to always be false:

u32 function;
...
function = dev_read_u32_default(config, "brcm,function", -1);
if (function < 0) {
        debug("Failed reading function for pinconfig %s (%d)\n",
                      config->name, function);
        return -EINVAL;
}

Make "function" variable an int to fix this.

Cc: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-10-02 17:32:28 +02:00