Commit graph

44438 commits

Author SHA1 Message Date
Sekhar Nori
39f0819125 configs: omapl138_lcdk: dont disable fat write
CONFIG_FAT_WRITE is imply'ed when CONFIG_CMD_FAT
is selected (see CONFIG_TI_COMMON_CMD_OPTIONS).

Dont disable it in defconfig so the imply takes
effect and 'fatwrite' is available for users.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-06-09 20:34:57 -04:00
Alison Wang
4ac0a32e24 armv8: Support loading 32-bit OS which is not in the form of FIT
As only FIT image is supported now, this patch is to support loading
32-bit uImage, dtb and rootfs separately.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-06-09 20:34:56 -04:00
Chakra Divi
57da153e88 board: mpl: pci: Fix checkpatch.pl
Fixed checkpatch.pl errors/warnings in board/mpl/common/pci.c

Signed-off-by: Chakra Divi <chakra@openedev.com>
2017-06-09 20:34:56 -04:00
Enric Balletbo i Serra
c310a9e7a0 igep0020: Enable DISTRO_DEFAULTS on IGEPv2 platforms
Like commit 3337e3af5d this enables suitable commands needed for booting
general purpose Linux distribution. This is required for example if we want
to use PXE or DHCP as default boot targets, symbols no longer enabled by
config_distro_defaults.h.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
2017-06-09 20:34:56 -04:00
Lokesh Vutla
d9e146712c board: ti: am572x-evm: Update pinmux using latest PMT
Update the board pinmux for AM572x-evm using latest PMT[1] and the
board files named am572x_gp_evm_A3a_sr2p0 and am572x_gp_evm_A2b_sr1p1
that were autogenerated on 30th January, 2017 by
"Ahmad Rashed <a-rashed@ti.com>" and "Tom Johnson <thjohnson@ti.com>".

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-06-09 20:34:55 -04:00
Lokesh Vutla
2d7e9e9d85 board: ti: am571x-idk: Update pinmux using latest PMT
Update the board pinmux for AM571x-IDK board using latest PMT[1] and the
board files named am571x_idk_v1p3b_sr2p0 that were autogenerated on
23rd March, 2017 by "Ahmad Rashed <a-rashed@ti.com>" and
"Tom Johnson <thjohnson@ti.com>".

[1] https://dev.ti.com/pinmux/app.html#/default/

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-06-09 20:34:55 -04:00
Lokesh Vutla
e79d2dc7fc board: ti: am572x-idk: Update pinmux using latest PMT
Update the board pinmux for AM572x-IDK board using latest PMT[1] and the
board files named am572x_idk_v1p3b_sr2p0 that were autogenerated on
30th January, 2017 by "Ahmad Rashed <a-rashed@ti.com>" and
"Tom Johnson <thjohnson@ti.com>".

[1] https://dev.ti.com/pinmux/app.html#/default/

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-06-09 20:34:55 -04:00
Michal Simek
e05d50584c Kconfig: Add description for CMD_POWEROFF
Add poweroff description to Kconfig to make it selectable
via menuconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-09 20:34:54 -04:00
tnishinaga.dev@gmail.com
8f079cccb3 armv7m: Disable D-cache when booting nommu(ARMv7M) Linux kernel
Disable D-Cache is required when booting nommu Linux kernel.
(please see Linux kernel source "arch/arm/kernel/head-nommu.S")

U-Boot is enabled D-cache and I-Cache at startup.
However, it does not disable D-Cache before
booting nommu Linux kernel.
Therefore, I call dcache_disable()
when the CPU is ARMv7M to fix this problem.

Signed-off-by: Toshifumi NISHINAGA <tnishinaga.dev@gmail.com>
2017-06-09 20:34:54 -04:00
Semen Protsenko
00bbe96eba arm: omap: Unify get_device_type() function
Refactor OMAP3/4/5 code so that we have only one get_device_type()
function for all platforms.

Details:
 - Add ctrl variable for AM33xx and OMAP3 platforms (like it's done for
   OMAP4/5), so we can obtain status register in common way
 - For now ctrl structure for AM33xx/OMAP3 contains only status register
   address
 - Run hw_data_init() in order to assign ctrl to proper structure
 - Remove DEVICE_MASK and DEVICE_GP definitions as they are not used
   (DEVICE_TYPE_MASK and GP_DEVICE are used instead)
 - Guard structs in omap_common.h with #ifdefs, because otherwise
   including omap_common.h on non-omap4/5 board files breaks compilation

Buildman script was run for all OMAP boards. Result output:
    arm: (for 38/616 boards)
        all +352.5
        bss -1.4
        data +3.5
        rodata +300.0
        spl/u-boot-spl:all +284.7
        spl/u-boot-spl:data +2.2
        spl/u-boot-spl:rodata +252.0
        spl/u-boot-spl:text +30.5
        text +50.4
    (no errors to report)

Tested on AM57x EVM and BeagleBoard xM.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Rework the guards as to not break TI81xx]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-09 20:34:53 -04:00
Tom Rini
f2d78c1ced am33xx: Finish migration of CONFIG_AM33XX/AM43XX
Almost all users of CONFIG_AM33XX/AM43XX have been migrated.  Finish
moving the last few over to Kconfig, and put all of the boards under the
appropriate Kconfig chocie now.  This board choice is non-optional, so
remove that keyword on am33xx.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-09 20:34:09 -04:00
Hannes Schmelzer
9620d87259 cmd/fdt: support single value replacement within an array
With this commit we can modify single values within an array of a dts
property.

This is useful if we have for example a pwm-backlight where we want to
modifiy the pwm frequency per u-boot script.

The pwm is described in dts like this:

backlight {
	pwms = <0x0000002b 0x00000000 0x004c4b40>;
};

For changing the frequency, here the 3rd parameter, we simply type:

fdt set /backlight pwms <? ? 0x1E8480>;

For doing all this we:
- backup the property content into our 'SCRATCHPAD'
- only modify the array-cell if the new content doesn't start with '?'

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:45:34 -06:00
Daniel Schwierzeck
aafbe82fb6 buildman: properly translate strings for log and err files to ASCII
The build output can still produce unicode encoded output. But in
the buildman's log and err files we only want plain ASCII characters.

To handle all situations with unicode and non-unicode output, encode
the stdout and stderr strings to UTF-8 and afterwards to ASCII with
replacing all special characters.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2017-06-09 13:45:34 -06:00
Daniel Schwierzeck
b0e994c29e buildman: disable localized and unicode output of all build tools
Build tools like Make, gcc or binutils support localized output
or unicode encoded output dependent on the default system locale.
This is not useful for buildman, where we want reproducible
warning or error messages or where the output of binutils is
further processed.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2017-06-09 13:45:34 -06:00
Simon Glass
fe67eaccd0 README: Add instructions for chain-loading U-Boot on jerry
Add instructions for chromebook_jerry.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:45:34 -06:00
Simon Glass
6b1bd076e8 rockchip: jerry: Disable CONFIG_CONSOLE_SCROLL_LINES
The display on jerry is so fast that this option is not needed. Drop it so
that the display scrolls more smoothly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:45:34 -06:00
Simon Glass
f8e468973b rockchip: Enable the video display banner
Show the U-Boot banner and board information on the video display during
boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:45:34 -06:00
Simon Glass
fe97471632 rockchip: rk3288: Allow setting up clocks in U-Boot proper
If U-Boot is chain-loaded from a previous boot loader we must set up the
clocks the way U-Boot wants them. Add code for this. It will do nothing if
SPL has already done the job.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:45:34 -06:00
Simon Glass
d3cb46aa8c rockchip: Init clocks again when chain-loading
Detect with a previous boot loader has already set up the clocks and set
them up again so that U-Boot gets what it expects.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:45:33 -06:00
Simon Glass
b223c1aead rockchip: rk3288: Convert clock driver to use shifted masks
Shifted masks are the standard approach with rockchip since it allows
use of the mask without shifting it each time. Update the definitions and
the driver to match.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:45:33 -06:00
Simon Glass
ed54b1918e rockchip: jerry: Add a .its file for chromium
Add a sample .its file for booting U-Boot on a jerry Chromebook.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:45:33 -06:00
Simon Glass
6b5a09aa38 rockchip: video: Take the vop device out of standby
On reset the standby bit is clear, but if U-Boot is chain-loaded from
another boot loader it may be set. Clear it before starting up video so
that it works correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Squashed in 'rockchip: video: fix taking the VOP device out of standby':
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-06-09 13:45:33 -06:00
Simon Glass
f418676e9a rockchip: video: Add remove() methods
Add remove() methods for EDP and VOP so that U-Boot can shut down the
video on exit. This avoids leaving DMA running while booting Linux which
can cause problems if Linux uses the frame buffer for something else.

It also makes it clear what is needed to shut down video.

While we are here, make rkvop_enable() static.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Squashed in 'rockchip: video: fix taking the VOP device out of standby':
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-06-09 13:45:28 -06:00
Simon Glass
6f06ef57bb rockchip: rk3288: Add error debugging to veyron_init()
Add a debug() statement so we can see when something goes wrong with the
regulator.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:39:34 -06:00
Simon Glass
3238474b8f rockchip: Fix regualtor typo in veyron
This typo doesn't actually cause any problems, but is wrong. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:39:34 -06:00
Simon Glass
385105983a rockchip: Setup default PWM flags
At present if the

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 874ee59 (rockchip: pwm: implement pwm_set_invert())
2017-06-09 13:39:34 -06:00
Simon Glass
c9af6673e8 README: Add instructions for chain-loading U-Boot
Most Chromebooks support chain-loading U-Boot but instructions are
somewhat scattered. Add a README to hold this information within the
U-Boot tree. Also add the standard developer keys to simplify the
instructions, since they are small.

For now this only supports nyan-big.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:39:34 -06:00
Simon Glass
13bdce8f8c tegra: nyan-big: Add a .its file for chromium
Add a sample .its file for booting U-Boot on a nyan-big Chromebook.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:39:34 -06:00
Simon Glass
1c6c7b6bd8 tegra: clock: Avoid a divide-by-zero error
The clock fix-up for tegra is still present in the code. It causes a
divide-by-zero bug after relocation when chain-loading U-Boot from
coreboot. Fix this by adding a check.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 7468676 (ARM: tegra: fix clock_get_periph_rate() for UART clocks)
2017-06-09 13:39:33 -06:00
Simon Glass
06cc85a29a tegra: Enable CP15 init
At present CP15 init is disabled on tegra. Use the correct option so that
this init is performed on boot. This enables the instruction cache, for
example, which is critical to the machine running at full speed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:39:33 -06:00
Simon Glass
505907a467 tegra: video: Don't power up the SOR twice
If U-Boot is the secondary boot loader, or has been run from itself, the
SOR may already be powered up. Powering it up again causes a hang, so
detect this situation and skip it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
2017-06-09 13:39:33 -06:00
Simon Glass
dab4728b3d tegra: nyan-big: Enable the dhrystone benchmark
Enable this so we can roughly measure CPU performance. Also enable the
cache command to allow for timing.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:39:33 -06:00
Simon Glass
4a7b9ee15e tegra: spi: Wait a little after setting the clocks
For devices that need a delay between SPI transactions we seem to need an
additional delay before the first one if the CPU is running at full speed.
Add this, under control of the existing setting. At present it will only
be enabled with the Chrome OS EC.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:39:33 -06:00
Simon Glass
c415dda8df tegra: dts: Add cros-ec SPI settings
At present the interrupt does not work and the SPI bus runs much less
quickly than it should. Add settings to fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:39:32 -06:00
Simon Glass
46864cc8e8 tegra: Init clocks even when SPL did not run
At present early clock init happens in SPL. If SPL did not run (because
for example U-Boot is chain-loaded from another boot loader) then the
clocks are not set as U-Boot expects.

Add a function to detect this and call the early clock init in U-Boot
proper.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:39:32 -06:00
Simon Glass
422f04b68f power: regulator: Add more debugging and fix a missing newline
This file does not report a few possible errors and one message is missing
a newline. Fix these.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-06-09 13:39:32 -06:00
Simon Glass
50a4886b3b arm: Disable LPAE if not enabled
If CONFIG_ARMV7_LPAE is not defined we should make sure that the feature
is disabled. This can happen if U-Boot is chain-loaded from another boot
loader which does enable LPAE.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:39:32 -06:00
Simon Glass
10d602ac8b arm: Don't try to support CONFIG_ARMV7_LPAE on ARMv4T
At present if CONFIG_ARMV7_LPAE is defined then mmu_setup() will use
instructions which are invalid on ARMv4T. This happens on Tegra since it
has an ARMv4T boot CPU. Add a check for the architecture version to allow
the code to be built. It will not actually be executed by the boot CPU,
but needs to compile.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:39:32 -06:00
Simon Glass
579dfca2ef arm: Rename HCTR to HTCR
This appears to be a typo. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:39:31 -06:00
Simon Glass
1c2d2727d1 arm: arm720t: Support CONFIG_SKIP_LOWLEVEL_INIT_ONLY
This option allows skipping the call to lowlevel() while still performing
CP15 init. Support this on ARM720T so it can be used with Tegra.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:39:31 -06:00
Sekhar Nori
264e420f36 davinci: omapl138_lcdk: fix tXSNR DDR2 timing value
As per the datasheet[1] available for DDR2 part on board
the OMAP-L138 LCDK, the tXSNR (exit self refresh to a
non-read command) is 137.5 ns. This corresponds to a
value of 20 to be written to T_XSNR register field of
OMAP-L138's DDR configuration. The DDR2 is at 150 MHz.

Fix this. The correct value also appears on the initialization
scripts (called CCS GEL files) available on TI's wiki pages[2]

[1] http://www.samsung.com/global/business/semiconductor/file/product/ds_k4t1gxx4qf_rev12-0.pdf
[2] http://processors.wiki.ti.com/index.php/L138/C6748_Development_Kit_(LCDK)#CCS_XML_.26_GEL_Files

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-06-09 11:24:01 -04:00
Siva Durga Prasad Paladugu
314f6362c4 cmd: jffs2: Rename command ls to fsls
Rename command ls to fsls as its conflicting with
generic file systesm command ls and this is causing
compilation failure as below, if both are enabled
and this patch fixes it.

cmd/jffs2.o:(.u_boot_list_2_cmd_2_ls+0x0):
multiple definition of `_u_boot_list_2_cmd_2_ls'
cmd/fs.o:(.u_boot_list_2_cmd_2_ls+0x0):first defined here
scripts/Makefile.build:359: recipe for target 'cmd/built-in.o'
failed
make[1]: *** [cmd/built-in.o] Error 1

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-09 11:24:01 -04:00
Chris Packham
2bd3cab335 rtc: ds1337: drop "SYS" from config variables
There is some inconsistency between uses of CONFIG_RTC_DS13xx and
CONFIG_SYS_RTC_DS13xx. Address this by dropping the "SYS" from
these variables.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-09 11:24:01 -04:00
Vikas Manocha
1a73bd842e spl: stm32f7: configure for xip booting
With xip booting configuration, we don't need to copy the next image
(U-Boot or linux xipimage) from flash to sdram area.

Flash memory organization is like this:
	spl-U-Boot:	u-boot-spl.bin 	: 0x0800_0000
	U-Boot :	u-boot-dtb.bin	: 0x0800_8000
	linux :		xipImage	: 0x0800_8000

It is also possible to have U-Boot binary & linux binaries configured at
different addresses of flash memory like U-Boot at 0x0800_8000 & linux
xipImage at 0x0800_4000. But in any case, spl-U-Boot needs to be compiled for
U-Boot as next binary with SPL_OS_BOOT option disabled.
By default, spl is configured to boot linux xipImage.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2017-06-09 11:24:00 -04:00
Vikas Manocha
55a3ef714f spl: stm32f7: add kernel boot support
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2017-06-09 11:24:00 -04:00
Vikas Manocha
6c0c3ce8aa serial: stm32f7: disable overrun
With overrun enabled, serial port console freezes & stops receiving data with
overun error if we keep sending data.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2017-06-09 11:23:59 -04:00
Vikas Manocha
c6d9e9dbc3 SPL: Add XIP booting support
Enable support for XIP (execute in place) of U-Boot or kernel image. There is
no need to copy image from flash to ram if flash supports execute in place.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Alexandru Gagniuc <alex.g@adaptrum.com>
2017-06-09 11:23:59 -04:00
Vikas Manocha
b97476965b stm32: stm32f7: add spl build support
This commit supports booting from stm32 internal nor flash. spl U-Boot
initializes the sdram memory, copies next image (e.g. standard U-Boot)
to sdram & then jumps to entry point.

Here are the flash memory addresses for U-Boot-spl & standard U-Boot:
	- spl U-Boot		: 0x0800_0000
	- standard U-Boot	: 0x0800_8000

To compile u-boot without spl: Remove SUPPORT_SPL configuration
(arch/arm/mach-stm32/Kconfig)

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
[trini: Rework Kconfig logic a bit]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-09 11:23:55 -04:00
Philipp Tomsich
76a5e1b715 rockchip: video: document externally visible functions for rk_vop
Documents the externally visible functions shared between the VOP
drivers for the RK3288 and RK3399.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-09 15:57:25 +02:00
Philipp Tomsich
56c7ba3462 rockchip: video: document externally visible functions for rk_hdmi
Documents the externally visible functions shared between the HDMI
drivers for the RK3288 and RK3399.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-09 15:53:48 +02:00