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3 commits

Author SHA1 Message Date
Hugo Villeneuve
1b4c3e6125 imx8mn-var-som: adjust PHY reset gpios according to hardware configuration
For SOM with the EC configuration, the ethernet PHY is located on the
SOM itself, and connected to the CPU ethernet controller. It has a
reset line controlled via GPIO1_IO9. In this configuration, the PHY
located on the carrier board is not connected to anything and is
therefore not used.

For SOM without EC configuration, the ethernet PHY on the carrier
board is connected to the CPU ethernet controller. It has a reset line
controlled via the GPIO expander PCA9534_IO5.

The hardware configuration (EC) is determined at runtime by
reading from the SOM EEPROM.

To support both hardware configurations (EC and non-EC), adjust/fix
the PHY reset gpios according to the hardware configuration
read at runtime from the SOM EEPROM. This adjustement is done in
U-Boot (OF_BOARD_FIXUP) and kernel (OF_BOARD_SETUP) device trees.

Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
2023-07-13 11:29:40 +02:00
Marcel Ziswiler
f067b59743 imx8mn: synchronise device tree with linux
Synchronise device tree with linux v6.1-rc3.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8m{m,n,p}-venice-*
2022-11-08 17:35:00 +01:00
Ariel D'Alessandro
c4c1ed68c1 imx8mn_var_som: Add support for Variscite VAR-SOM-MX8M-NANO board
Add support for iMX8MN VAR-SOM-MX8M-NANO board. Enables support for:

- 1GiB DDR4 RAM
- 16 GiB eMMC
- SD card
- Gigabit ethernet
- USBOTG1 peripheral - fastboot

Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-05 13:38:39 +01:00