Commit graph

71856 commits

Author SHA1 Message Date
Heiko Stuebner
5aefa4af29 rockchip: rk3368: sync main rk3368 dtsi from Linux
This is the state as of v5.10 + the recently added timer0 phandle
targetted at the 5.12 merge window.

With this the non-mainline nodes like the dmc move to a separate
rk3368-u-boot.dtsi that is included from the board-specific
-u-boot.dtsi files, similar to how rk3399 does this.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-03-30 16:53:00 +08:00
Heiko Stuebner
1ebf106f40 rockchip: rk3368: sync clock dt-binding header from Linux
This is the state as of v5.10 in Linux.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-03-30 16:53:00 +08:00
Heiko Stuebner
ca7bb9dde7 rockchip: rk3368: move STACK_R_ADDR address and into Kconfig
With the STACK_R_ADDR at 0x600000 (6MB) we're competing with
with the loading address of either u-boot or atf parts, so move
that away to 0x4000000 (64MB) similar to rk3399.

Only lion currently sets that at all but not sheep the second
rk3368 board, so just move that to the Kconfig for rk3368 similar
to rk3399 as well.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-03-30 16:53:00 +08:00
Heiko Stuebner
53e14aa734 rockchip: rk3368: increase SYS_MALLOC_F_LEN to 0x4000
To prevent running out of memory, increase SYS_MALLOC_F_LEN to 0x4000
similar to what rk3399 uses.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-03-30 16:53:00 +08:00
Heiko Stuebner
e436c499dc rockchip: rk3368: set CONFIG_SYS_BOOTM_LEN to 64MB
Mimicing for example the rk3399, set the SYS_BOOTM_LEN to 64MB so
that regular kernel images can get loaded without problems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-03-30 16:53:00 +08:00
Heiko Stuebner
a062144518 rockchip: rk3368: adjust CONFIG_SYS_LOAD_ADDR
CONFIG_SYS_LOAD_ADDR currently is at 0x00280000 which is only 512KB
behind the area where we load u-boot to, which depending on u-boot size
may overlap at some point.

So for safety just pick the same value rk3399 has and set
CONFIG_SYS_LOAD_ADDR to 0x00800800 on rk3368 as well.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-03-30 16:53:00 +08:00
Roger Pau Monné
19c6b8cf8b odroid-go2: remove setting SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
Using a non-default SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR setting makes the
resulting u-boot-rockchip.bin unbootable, as it gets stuck after SPL.
Removing the setting from the defconfig allows U-Boot to load
successfully.

Signed-off-by: Roger Pau Monné <royger@FreeBSD.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-03-30 16:52:59 +08:00
Tom Rini
4906238191 binman support for expanding entries, connections
misc fixes and improvements to sandbox, etc.
 x86 CBFS improvements
 x86 coreboot improvements
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Merge tag 'dm-pull-28mar21' of git://git.denx.de/u-boot-dm into next

binman support for expanding entries, connections
misc fixes and improvements to sandbox, etc.
x86 CBFS improvements
x86 coreboot improvements
2021-03-28 20:29:39 -04:00
Heinrich Schuchardt
e5021221db sandbox: define __dyn_sym_start, dyn_sym_end
On RISC-V the symbols __dyn_sym_start, dyn_sym_end are referenced in
efi_runtime_relocate().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-27 16:26:48 +13:00
T Karthik Reddy
346df7d4fa spi: spi-uclass: Add support to manually relocate spi memory ops
Add spi memory operations to relocate manually when
CONFIG_NEEDS_MANUAL_RELOC is enabled.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
2021-03-27 16:26:48 +13:00
Simon Glass
5d1bec30ef dtoc: Add new check that offsets are correct
Add a few more internal checks to make sure offsets are correct, before
updating the dtb.

To make this easier, update the functions which add a property to return
that property,.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 16:26:48 +13:00
Simon Glass
f6176651bc dtoc: Support adding subnodes alongside existing ones
So far we have only needed to add subnodes to empty notds, so have not
had to deal with ordering. However this feature is needed for binman's
expanded nodes, since there may be another node in the same section.

While libfdt adds new properties after existing properties, it adds new
subnodes before existing subnodes. This means that we must reorder the
nodes in the cached version, so that the ordering remains consistent.

Update the sync implementation to sync existing subnodes first, then
add new ones, then tidy up the ordering in the cached version. Update the
test to cover this behaviour.

Also improve the comment about property syncing while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 16:26:48 +13:00
Simon Glass
76677dd2b2 dtoc: Add a subnode test for multiple nodes
Add a new test that adds a subnode alongside an existing one, as well as
adding properties to a subnode. This will expand to adding multiple
subnodes in future patches. Put a node after the one we are adding to so
we can check that things sync correctly.

The testAddNode() test should be in the TestNode class since it is a node
test, so move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 16:26:48 +13:00
Simon Glass
71719e15e8 dtoc: Tweak ordering of fdt-offsets refreshing
Once the tree has been synced, thus potentially moving things around in the
fdt, we set _cached_offsets to False so that a refresh will happen next
time a property is accessed.

This 'lazy' refresh doesn't really save much time, since refresh is a very
fast operation, just a single walk of the tree. Also, having the refresh
happen in the bowels of property access it makes it harder to figure out
what is going on.

Simplify the code by always doing a refresh before and after a sync. Set
_cached_offsets to True immediately after this, in the Refresh() function,
since this makes more sense than doing it in the caller.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 16:26:48 +13:00
Simon Glass
37ba9844c2 dtoc: Tidy up property-offset handling
If a property does not yet have an offset, then that means it exists in
the cache'd fdt but has not yet been synced back to the flat tree. Use
the dirty flag for this so we don't need to check the offset too. Improve
the comments for Prop and Node to make it clear what an offset of None
means.

Also clear the dirty flag after the property is synced.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 16:26:48 +13:00
Simon Glass
acd98611c3 dtoc: Improve internal error for Refresh()
Add the node name too so it is easy to see which node failed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 16:26:48 +13:00
Simon Glass
5ff9fedc9b binman: Support default alignment for sections
Sometimes it is useful to specify the default alignment for all entries
in a section, such as when word-alignment is necessary, for example. It
is tedious and error-prone to specify this individually for each section.

Add a property to control this for a section.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 16:26:48 +13:00
Simon Glass
631f752de5 binman: Support obtaining section contents immediately
Generally the content of sections is not built until the final assembly
of the image. This is partly to avoid wasting time, since the entries
within sections may change multiple times as binman works through its
various stages. This works quite well since sections exist in a strict
hierarchy, so they can be processed in a depth-first manner.

However the 'collection' entry type does not have this luxury. If it
contains a section within its 'content' list, then it must produce the
section contents, if available. That section is typically a sibling
node, i.e. not part oc the collection's hierarchy.

Add a new 'required' argument to section.GetData() to support this. When
required is True, any referenced sections are immediately built. If this
is not possible (because one of the subentries does not have its data yet)
then an error is produced.

The test for this uses a 'collection' entry type, referencing a section as
its first member. This forces a call to _BuildSectionData() with required
set to False, at first, then True later, when the image is assembled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 16:26:48 +13:00
Simon Glass
189f291914 binman: Add support for a collection of entries
The vblock entry type includes code to collect the data from a number of
other entries (not necessarily subentries) and concatenating it. This is
a useful feature for other entry types.

Make it a base class, so that vblock can use it, along with other entry
types.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 16:26:48 +13:00
Simon Glass
3d43338293 binman: Allow disabling expanding an entry
At present there is a command-line flag to disable substitution of expanded
entries. Add an option to the entry node as well, so it can be controlled
at the node level.

Add a test to cover this. Fix up the comment to the checkSymbols() function
it uses, while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 16:26:48 +13:00
Simon Glass
e9e0db8894 binman: Use a unique number for the symbols test file
Two test devicetree files currently have 192 as their unique number. Fix
this by separating them out.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 16:26:48 +13:00
Simon Glass
80a4570c99 x86: coral: Show memory config and SKU ID on startup
Provide the model information through sysinfo so that it shows up on
boot. For memconfig 4 pins are provided, for 16 combinations. For SKU
ID there are two options:

   - two pins provided in a ternary arrangement, for 9 combinations.
   - reading from the EC

Add a binding doc and drop the unused #defines as well.

Example:

   U-Boot 2021.01-rc5

   CPU:   Intel(R) Celeron(R) CPU N3450 @ 1.10GHz
   DRAM:  3.9 GiB
   MMC:   sdmmc@1b,0: 1, emmc@1c,0: 2
   Video: 1024x768x32 @ b0000000
   Model: Google Coral (memconfig 5, SKU 3)

This depends on the GPIO series:

   http://patchwork.ozlabs.org/project/uboot/list/?series=228126

Signed-off-by: Simon Glass <sjg@chromium.org>

Acked-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-27 16:26:48 +13:00
Simon Glass
96dedb0da2 sysinfo: Allow showing model info from sysinfo
Some boards may want to show the SKU ID or other information obtained at
runtime. Allow this to come from sysinfo. The board can then provide a
sysinfo driver to provide it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-27 16:26:48 +13:00
Simon Glass
c119528a1d sandbox: Correct uninit conflict
It is not possible to remove the state before driver model is uninited,
since the devices are allocated in the memory buffer. Also it is not
possible to uninit driver model afterwards, since the RAM has been
freed.

Drop the uninit altogether, since it is not actually necessary.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:31 +13:00
Simon Glass
a8d696275a bootm: Skip command-line substitution if !CONFIG_CMDLINE
When there is no command line, we cannot enable this feature. Add a check
to avoid a build error.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:31 +13:00
Simon Glass
f2c1442e96 bloblist: Make BLOBLIST_TABLES depend on BLOBLIST
Add an extra condition here since we cannot put x86 tables in a bloblist
when bloblists are not supported.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:31 +13:00
Simon Glass
45cd2e5575 command: Fix operation of !CONFIG_CMDLINE
The U_BOOT_CMDREP_COMPLETE() macro produces a build error if CONFIG_CMDLINE
is not enabled. Fix this by updating the macro to provide the 'repeatable'
arugment in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:31 +13:00
Simon Glass
2d0423aff9 doc: Convert Chromium OS docs to rst
Move this documentation over to reST. Move the example files into a files/
directory so they are still separate.

Do a few minor updates while we are here:
- Tidy up sandbox build instructions
- Update my github account name
- Add some talks and links

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:31 +13:00
Simon Glass
c197f6e279 malloc: Export malloc_simple_info()
Export this function always so it can be used behind IS_ENABLED() instead
of requiring an #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:31 +13:00
Simon Glass
529d5f96cf cpu: Rename SPL_CPU_SUPPORT to SPL_CPU
The _SUPPORT suffix is from an earlier time and interferes with use of
the CONFIG_IS_ENABLED() macro. Rename the option to drop the suffix.

Tidy up the TODO that prompted this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:31 +13:00
Simon Glass
b3b60f5912 sf: Support querying write-protect
This feature was dropped from U-Boot some time ago:

   f12f96cfaf (sf: Drop spl_flash_get_sw_write_prot")

However, we do need a way to see if a flash device is write-protected,
since if it is, it may not be possible to write to do (i.e. failing to
write is expected).

I am not sure of the correct layer to implement this, so this patch is a
stab at it. If spi-flash makes sense then I will add to the 'sf' also.

Re the points mentioned in the removal commit:

    1) This kind of requirement can be achieved using existing
       flash operations and flash locking API calls instead of
       making a separate flash API.

Which uclass is this?

    2) Technically there is no real hardware user for this API to
       use in the source tree.

I do want coral (at least) to support this.

    3) Having a flash operations API for simple register read bits
       also make difficult to extend the flash operations.

This new patch only mentions write-protect being on or off, rather than
the actual mechanism.

    4) Instead of touching generic code, it is possible to have
       this functionality inside spinor operations in the form of
       flash hooks or fixups for associated flash chips.

That sounds to me like what drivers are for. But we still need some sort
of API for it to be accessible.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:31 +13:00
Simon Glass
eb26d88d55 bootstage: Warning if space is exhausted
At present bootstage silently ignores new records if it runs out of
space. It is sometimes obvious by looking at the report, but the IDs are
not contiguous, so it is easy to miss.

Aad a message so that action can be taken.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:31 +13:00
Simon Glass
05e3a0d648 spl: Split out bootstage ID into a function
We have two separate places that need to figure out the bootstage ID to
use. Put this code in a function so that the logic is in one place.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:31 +13:00
Simon Glass
dc2886b039 binman: Show a message when changing subnodes
This change seems important enough to warrant a visible message. Change
the log_debug() to log_info().

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:31 +13:00
Simon Glass
b6da559764 test: Silenece the echo and print tests
These tests current produce unwanted output on sandbox. Use the correct
functions to controller console output, to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:31 +13:00
Simon Glass
e2734d647e sandbox: image: Allow sandbox to load any image
Sandbox is special in that it is used for testing and it does not match
any particular target architecture. Allow it to load an image from any
architecture, so that 'bootm' can be used as needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:31 +13:00
Simon Glass
1758551ec9 sandbox: Provide a way to bind fixed/removeable devices
At present when a file is bound to a host device it is always marked as
removeable. Arguably the device is removeable, since it can be unbound at
will. However while it is bound, it is not considered removable by the
user. Also it is useful to be able to model both fixed and removeable
devices for code that distinguishes them.

Add a -r flag to the 'host bind' command and plumb it through to provide
this feature.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:31 +13:00
Simon Glass
803e9c1c94 sandbox: Update do_host_bind() argument counting
Remove the 'bind' subcommand before processing the arguments. This will
make it easier to add an optional flag.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:31 +13:00
Simon Glass
1503c2c790 sandbox: Disintangle declarations in do_host_bind()
This function has a strange mix of declarations and argument parsing
which is a bit hard to follow and harder to modify. Separate out the
declarations at the start of the function and adjust the ordering of
the code slightly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:31 +13:00
Simon Glass
a5bc9abcee sandbox: cros_ec: Only write EC state when the EC is probed
This can crash if the EC has not yet been probed. Add a check to prevent
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:31 +13:00
Simon Glass
5d8c37910d sandbox: Only delete the executable if requested
At present sandbox removes its executable after failing to run it,
since there is no other way that it would get cleaned up.

However, this is actually only wanted if the image was created within
sandbox. For the case where the image was generated by the build system,
such as u-boot-spl, we don't want to delete it.

Handle the two code paths accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:31 +13:00
Simon Glass
539db6ab09 sandbox: Only call timer_timebase_fallback() if present
This function only exists if CPU is enabled. Update the code to take
account of this, so that it does not have to be enabled on all sandbox
builds.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-03-27 15:04:31 +13:00
Simon Glass
70f5c99d60 x86: coreboot: Don't setup MTRR when booting from coreboot
This currently hangs and it is not necessary in any case. Drop the code
when booting from coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:31 +13:00
Simon Glass
9087e468c7 x86: fsp: Don't notify if booted from coreboot
When booting from coreboot there is no need to notify the FSP of anything,
since coreboot has already done it. Nor it is possible, since the FSP
details are not provided by coreboot.

Skip it in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:30 +13:00
Simon Glass
8657989f29 x86: coral: Fall back to coreboot video when FSP missing
When booting from coreboot the FSP video information is no-longer
available. Enable the coreboot driver so that we can get some sort of
display in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:30 +13:00
Simon Glass
51de94dfe4 x86: coral: Allow init of debug UART in U-Boot proper
At present the debug UART is only set up in SPL, on the assumption that
the boot flow will always pass through there. When booting from coreboot,
SPL is not used, so the debug UART is not available.

Move the code into a common place so that it can be used in U-Boot proper
also. Add the required init to start_from_spl.S as well.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:30 +13:00
Simon Glass
2018a33cb7 x86: coral: Avoid build error with !CONFIG_ACPIGEN
When CONFIG_ACPIGEN is not enabled the CPU code does not build. Fix this
by moving things around.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:30 +13:00
Simon Glass
b8bcccedac dm: core: Add CBFS support to flashmap
Allow referencing a CBFS file in the flashmap, so that it is possible to
boot from coreboot, where files are not available from binman.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:30 +13:00
Simon Glass
937175ee72 x86: fsp: Don't enable FSP graphics if booted from coreboot
This driver cannot work when booted from coreboot, since the FSP
information is not available. Disable it in that case, so that the
coreboot video driver can be used instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:30 +13:00
Simon Glass
19987c9834 x86: video: Allow coreboot video to be used on any x86 board
When booting from coreboot we need this driver for the video to work.
Update the driver to be usable on any board.

The driver disables itself if it sees that is not booted from coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:30 +13:00