Commit graph

31083 commits

Author SHA1 Message Date
Masahiro Yamada
9e57a1c3ad include/common.h: remove DIV_ROUND definition
All the references of DIV_ROUND have been replaced with
DIV_ROUND_CLOSEST.  Remove DIV_ROUND.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-11-20 11:28:25 -05:00
Masahiro Yamada
4515992fc7 replace DIV_ROUND with DIV_ROUND_CLOSEST
The Linux-compatible macro DIV_ROUND_CLOSEST is a bit more flexible
and safer than DIV_ROUND.

For example,
  foo = DIV_ROUND_CLOSEST(x, y++)
works expectedly, but
  foo = DIV_ROUND(x, y++)
does not. (y is incremented twice.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-11-20 11:28:25 -05:00
Masahiro Yamada
3fd968e931 ARM: remove CONFIG_ARM1136 defines
CONFIG_CPU_ARM1136 was introduced into Kconfig by commit 2e07c249a6
(kconfig: arm: introduce symbol for ARM CPUs).

This commit removes all the defines of CONFIG_ARM1136 and replaces
the only reference in arch/arm/lib/cache.c with CONFIG_CPU_ARM1136.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-11-20 11:28:25 -05:00
Masahiro Yamada
5d7b131d41 ARM: remove CONFIG_ARM926EJS defines
CONFIG_CPU_ARM926EJS was introduced into Kconfig by commit 2e07c249a6
(kconfig: arm: introduce symbol for ARM CPUs).

This commit removes all the defines of CONFIG_ARM926EJS and replaces
the only reference in arch/arm/lib/cache.c with CONFIG_CPU_ARM926EJS.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-11-20 11:28:25 -05:00
Masahiro Yamada
f2168440de ARM: remove CONFIG_ARM920T defines
CONFIG_CPU_ARM920T was introduced into Kconfig by commit 2e07c249a6
(kconfig: arm: introduce symbol for ARM CPUs).

This commit removes all the defines of CONFIG_ARM920T and replaces the
only reference in drivers/usb/host/ohci-hcd.c with CONFIG_CPU_ARM920T.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-11-20 11:28:25 -05:00
Masahiro Yamada
7c8f61f80c ARM: remove CONFIG_ARM1176 defines
CONFIG_ARM1176 is defined for some boards but not referenced at all.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-11-20 11:28:25 -05:00
Masahiro Yamada
3fcfe80377 ARM: remove CONFIG_ARMV7 defines
Some (not all) of ARMv7 boards define CONFIG_ARMV7, which is useless.
Besides, it is never referenced.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2014-11-20 11:28:24 -05:00
Ye.Li
593243d3a2 imx: imx6q/dlsabreauto: Add PMIC Pfuze100 support
Add the pfuze100 initialization in power_init_board for imx6q/dl
sabreauto board.

Signed-off-by: Ye.Li <B37916@freescale.com>
2014-11-20 10:52:32 +01:00
Ye.Li
1f98e31bc0 imx: mx6sxsabresd: Use the pfuze common init function
Modify the pfuze init for mx6sxsabresd to use the shared
"pfuze_common_init" function. And move this initialization to
power_init_board.

Signed-off-by: Ye.Li <B37916@freescale.com>
2014-11-20 10:51:45 +01:00
Ye.Li
f0fabb7945 imx: mx6sabresd: Use the pfuze common init function
Modify the pfuze init for mx6sabresd to use the shared
"pfuze_common_init" function. And move this initialization to
power_init_board.

Signed-off-by: Ye.Li <B37916@freescale.com>
2014-11-20 10:51:45 +01:00
Ye.Li
5051ff5fb0 imx: mx6sabre common: Factorize the Pfuze init function
Since the Pfuze initializations are similar on various mx6 SABRE
boards. Factorize the initialization to a common function in file
board/freescale/common/pfuze.c. So that all SABRE boards BSP can
share the function.

Signed-off-by: Ye.Li <B37916@freescale.com>
2014-11-20 10:50:20 +01:00
Ye.Li
36523e9b0a power: pfuze100: Update definitions for buck regulators
Add definitions for buck regulators (SW1A/B/C) registers and voltage
values.

Signed-off-by: Ye.Li <B37916@freescale.com>
Reviewed-by: Przemyslaw Marczak <p.marczak@samsung.com>
2014-11-20 10:50:20 +01:00
Ye.Li
d0fbca2a3a imx: mx6sxsabresd: Add board support for USDHC2 and USDHC3
Add full support for USDHC2, USDHC3, USDHC4 on mx6sx sabresd board.
The default boot socket is USDHC4, so the MMC environment device and
mmcdev variable are set to this device.

Signed-off-by: Ye.Li <B37916@freescale.com>
2014-11-20 10:45:14 +01:00
Ye.Li
a3d6e38617 mmc: fsl_esdhc: Update esdhc driver for iMX6SX
The reset value of "uSDHCx_INT_STATUS_EN" register is changed to 0
on iMX6SX. So the fsl_esdhc driver must update to set the register,
otherwise no state can be detected.

Signed-off-by: Ye.Li <B37916@freescale.com>
2014-11-20 10:44:42 +01:00
Fabio Estevam
ae80eecceb mx6sabresd: Access SRC_SBMR1 register via structure
In U-boot it is preferred to access the register via structure pointer, so
convert it such style.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-20 10:30:21 +01:00
Markus Niebel
b6d7810e5c tqma6: use imx_ddr_size
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
2014-11-20 10:30:21 +01:00
Markus Niebel
fd53ec5baf tqma6: add warning on failed setup_i2c
setup_i2c has a return value. Use it to give feedback
on error.

Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
2014-11-20 10:30:21 +01:00
Markus Niebel
8cc65d383e tqma6: add missing include
Add include needed to have prototype for board_spi_cs_gpio

Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
2014-11-20 10:30:21 +01:00
Markus Niebel
528354681a tqma6: (cosmetic) remove CONFIG_FLASH_SECTOR_SIZE
This is nowhere documented and only used
by two other boards. Replace it with
TQMA6_SPI_FLASH_SECTOR_SIZE.

Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
2014-11-20 10:30:20 +01:00
Fabio Estevam
31b9023d84 mx6sabresd: Add mx6sabresd_spl_defconfig to MAINTAINERS entry
Let's add mx6sabresd_spl_defconfig entry into MAINTAINERS, so that we avoid
getting a warning that the mx6sabresd_spl is not maintained.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-20 10:30:20 +01:00
Fabio Estevam
d7bc7e6031 mx6sxsabresd: Simplify the return value of setup_fec()
We can simply the return the value from enable_fec_anatop_clock() to make the
code smaller and simpler.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-20 10:30:20 +01:00
Fabio Estevam
da5019e2b3 mx6slevk: Simplify the return value of setup_fec()
We can simply the return the value from enable_fec_anatop_clock() to make the
code smaller and simpler.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-20 10:30:20 +01:00
Fabio Estevam
c9c41d0e2b mx6sabresd: State that only mx6q is supported in SPL
Make clear that current SPL code only supports the mx6q variant.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-20 10:30:20 +01:00
Fabio Estevam
1769502b53 mx53loco: Fix error handling in board_mmc_init()
When an invalid USDHC port is passed we should return -EINVAL instead of 0.

Also, return the error immediately on fsl_esdhc_initialize() failure.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-20 10:30:20 +01:00
Fabio Estevam
05beb8e012 wandboard: Fix error handling in board_mmc_init()
When an invalid USDHC port is passed we should return -EINVAL instead of 0.

Also, return the error immediately on fsl_esdhc_initialize() failure.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-20 10:30:19 +01:00
Albert ARIBAUD
3cb4b713e1 tools/msximage.c: fix warning about nptr possibly uninitialized
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2014-11-20 10:30:19 +01:00
Fabio Estevam
cdbdde3f56 mx6qsabreauto: Add parallel NOR flash support
mx6sabreauto boards come with 32 MiB of parallel NOR flash.

Add support for it:

U-Boot 2015.01-rc1-18107-g1543636-dirty (Nov 14 2014 - 11:11:04)

CPU:   Freescale i.MX6Q rev1.2 at 792 MHz
Reset cause: POR
Board: MX6Q-Sabreauto revA
I2C:   ready
DRAM:  2 GiB
Flash: 32 MiB
NAND:  0 MiB

Due to pin conflict with I2C3, only define configure I2C3 IOMUX when flash is
not used.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-20 10:30:19 +01:00
Fabio Estevam
573960aca5 mx6: add weim registers
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-20 10:30:19 +01:00
Fabio Estevam
32c81ea65c imx: consolidate set_chipselect_size function
Move MX5 specific set_chipselect_size function into generic i.MX part,
such that MX6 based boards are able to use this function as well.

While doing this the iomuxc gpr member needed to be consolidated between
MX5 and MX6.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-20 10:30:19 +01:00
Fabio Estevam
53b7f18044 mx6: Use a common SPL configuration file
Many boards use a minimal .cfg file in the SPL case.

Introduce spl_sd.cfg so that we can reuse it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2014-11-20 10:30:18 +01:00
Fabio Estevam
7d29acd9b7 novena: Move the DCD settings to spl code
mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR.

Move the configuration to the spl code.

CCM_CCOSR setting is no longer required to get audio functionality in the
kernel, so remove such setting.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2014-11-20 10:30:11 +01:00
Fabio Estevam
e25fbe3fe5 gw_ventana: Move the DCD settings to spl code
mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR.

Move the configuration to the spl code.

CCM_CCOSR setting is no longer required to get audio functionality in the
kernel, so remove such setting.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-20 10:13:54 +01:00
Fabio Estevam
6e9b6bb5a0 mx6sabresd: Move the DCD settings to spl code
mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR.

Move the configuration to the spl code.

CCM_CCOSR setting is no longer required to get audio functionality in the
kernel, so remove such setting.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-20 10:13:54 +01:00
Albert ARIBAUD
db544b9662 imx: fix exception vectors relocation in imx27
Commit 3ff46cc4 fixed exception vectors setting in
the general ARM case, by either copying the exception
and indirect vector tables to normal (0x00000000) or
high (0xFFFF0000) vectors address, or setting VBAR to
U-Boot's base if applicable.

i.MX27 SoC is ARM926E-JS, thus has only normal and
high options, but does not provide RAM at 0xFFFF0000
and has only ROM at 0x00000000; it is therefore not
possible to move or change its exception vectors.

Besides, i.MX27 ROM code does provide an indirect
vectors table but at a non-standard address and with
the reset and reserved vectors missing.

Turn the current vector relocation code into a weak
routine called after relocate_code from crt0, and add
strong version for i.MX27.

Series-Cc: Heiko Schocher <hs@denx.de>

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Tested-by: Stefano Babic <sbabic@denx.de>
Tested-by: Philippe Reynes <tremyfr@gmail.com>
Tested-by: Philippe Reynes <tremyfr@yahoo.fr>
2014-11-20 10:13:54 +01:00
Albert ARIBAUD
28970ef66d cosmetic: arm: fix whitespace in arch/arm/lib/relocate.S
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2014-11-20 10:13:54 +01:00
Ye.Li
adc5a667b8 imx: mx6slevk: Change default mmcdev to USDHC2 device
Since USDHC1 and USDHC3 added, the dev index for USDHC2 changed to
1. So modify the default mmcdev in environment variables to dev 1.

Signed-off-by: Ye.Li <B37916@freescale.com>
2014-11-20 10:13:54 +01:00
Peng Fan
05095535f6 imx:mx6sxsabresd fix pfuz probe failed
The PFUZ probe failed with the following msg:
" wait_for_sr_state: failed sr=81 cr=a0 state=2020
  i2c_init_transfer: failed for chip 0x8 retry=0
  wait_for_sr_state: failed sr=81 cr=a0 state=2020
  i2c_init_transfer: failed for chip 0x8 retry=1
  wait_for_sr_state: failed sr=81 cr=a0 state=2020
  i2c_init_transfer: failed for chip 0x8 retry=2
  i2c_init_transfer: give up i2c_regs=021a0000
  Can't find PMIC:PFUZE100 "

board_early_init_f is too early to call i2c related setting, because
init_func_i2c is called after board_early_init_f being invoked. Thus
move setup_i2c into board_init.

Also PFUZ is connected to I2C bus 0, so change "1" -> "0".

Using this patch PFUZ can be correctly probed:
"PMIC:  PFUZE100 ID=0x11"

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2014-11-20 10:13:53 +01:00
Alexey Ignatov
7a139959d0 ARM: mxs: tools: Add support for boot progress display flag
mkimage -T mxs now support new flag in config file:
DISPLAYPROGRESS - makes boot process print HTLLC characters for each BootROM
instruction.

Signed-off-by: Alexey Ignatov <lexszero@gmail.com>
2014-11-20 10:13:45 +01:00
Tom Rini
4d70b34d7f Merge branch 'master' of git://git.denx.de/u-boot-ubi 2014-11-19 23:18:29 -05:00
Tom Rini
c44d3cd1c4 Merge branch 'master' of git://git.denx.de/u-boot-i2c 2014-11-19 23:18:19 -05:00
Tom Rini
f10834e166 Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxx 2014-11-19 23:17:13 -05:00
Markus Niebel
3b4b9a3377 mmc: fsl_esdhc: fix f_max retrieval during init
for multi instance API we use struct fsl_esdhc_cfg to
pass the clock rate. Do not set f_max from global data,
since this is wrong for multi instance case.

Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-19 18:17:12 -08:00
Shengzhou Liu
c35f869394 net/fm: add 2.5G SGMII support
As auto-negotiation is not supported for 2.5G SGMII, we need
to add a new type PHY_INTERFACE_MODE_SGMII_2500 to differentiate
SGMII-1G and SGMII-2.5G with different setting for auto-negotiation.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-19 18:17:12 -08:00
Shaohui Xie
3ce21c87c1 powerpc/t2080qds: fix for 1000BASE-KX
1000BASE-KX(1G-KX) uses SGMII protocol but the serdes lane runs in 1G-KX
mode. By default, the lane runs in SGMII mode, when a MAC uses a lane
in 1G-KX mode, corresponding bit in PCCR1 for the lane needs to be set,
and needs to fixup dtb accordingly for kernel to do proper initialization.

Hwconfig "fsl_1gkx" is used to indicate a MAC runs in 1G-KX mode, FM1 MAC
1/2/5/6/9/10 are available for 1G-KX, MAC 3/4 run in RGMII mode. To set a
MAC runs in 1G-KX mode, set its' corresponding env in "fsl_1gkx",
'fm1_1g1' stands for FM1-MAC1, 'fm1_1g2' stands for FM1-MAC2, etc.

If all MAC 1/2/5/6/9/10 run in 1G-KX mode, the hwconfig should has below
setting:

fsl_1gkx:fm1_1g1,fm1_1g2,fm1_1g5,fm1_1g6,fm1_1g9,fm1_1g10

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
[York Sun: Fix compiling warning]
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-19 18:16:50 -08:00
Masahiro Yamada
0c6de8853b usb: ehci: do not set the LSB of Current qTD pointer
According to EHCI specification, the LSB of DWORD 3 of Queue Head
(Current qTD Pointer) is not T-bit, but always zero.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-11-19 23:31:54 +01:00
Zhao Qiang
5632d15cf4 u_qe: add u_qe_upload_firmware for u_qe
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-19 12:56:19 -08:00
Tang Yuantian
d8222dbe42 arm: ls102xa: Fixed a register definition error
There are 8 SCFG_SPARECR registers in SCFG memory block, not one.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-19 12:56:14 -08:00
Zhao Qiang
eaa859e7d2 qe: add qe support for ls1021a-twr board
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-19 12:56:09 -08:00
Zhao Qiang
63e75fd7a3 qe: add qe support to ls1021aqds
add qe support to ls1021aqds

Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-19 12:56:04 -08:00
Zhao Qiang
93d3320417 qe: add u-qe support to arm board
ls1021 is arm-core and support qe which is u-qe.
add u-qe init for arm board.

Signed-off-by: Zhao Qiang <B45475@freescale.com>
[York Sun: Fix compiling error caused by u_qe_init()]
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-19 12:55:45 -08:00