Commit graph

13833 commits

Author SHA1 Message Date
Manuel Reis
81d4c4e45c add check for ignored CONFIG_ENV_EXT4_DEVICE_AND_PART definition
Check whether user has explicitly defined device and partition where
environment file will be located before using 'auto' i.e. bootable
partition

Voids the need to set such partition as bootable to work with the
'dev:auto' tuple

Signed-off-by: Manuel Reis <mluis.reis@gmail.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Tested-by: Michael Opdenacker <michael.opdenacker@bootlin.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2020-12-09 10:57:50 +01:00
Tom Rini
ec79f5ce22 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Espressobin: Simplify DT handling of board variants (Pali)
- Add Luka Perkov to maintainers of Puzzle-M801 (Luka)
- Armada 38x: Enable board specific USB2 high-speed impedance
  threshold configuration (Joshua)
2020-12-07 11:46:12 -05:00
Pali Rohár
061c6d1b23 arm: mvebu: Espressobin: Detect presence of emmc at runtime
Try to initialize emmc in board_late_init() and if it fails then we know
that emmc device is not connected.

This allows to use in U-Boot just one DTS file for all Espressobin variants
and also to correctly set fdtfile env variable for Linux kernel.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Gérald Kerma <gerald@gk2.net>
Reviewed-by: Andre Heider <a.heider@gmail.com>
2020-12-07 07:11:37 +01:00
Luka Kovacic
5115de8d64 arm: mvebu: puzzle-m801: Add a maintainer
Add Luka Perkov to Puzzle-M801 BOARD MAINTAINERS.

Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-12-07 07:11:37 +01:00
Marcel Ziswiler
1b56cd868e colibri_t30: disable rs232 serial transceiver forceoff pins
Use gpio_early_init_uart() function to disable RS232 serial transceiver
ForceOFF# pins on Iris.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-12-04 13:21:15 -07:00
Marcel Ziswiler
4ba4bd0f87 apalis/colibri_t30: avoid uart input from floating pins
Avoid UART input from floating RX pins on UARTB and UARTC (Colibri T30)
and UARTB, UARTC and UARTD (Apalis T30).

Note: Floating pins may cause spurious break conditions potentially
interrupting U-Boot's autoboot.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-12-04 13:21:15 -07:00
Marcel Ziswiler
a6094e1b0a colibri_t30: fix spi1 and uart2/3 resp. uartb/c pinmuxing
Fix SPI1 and UART2/3 resp. UARTB/C pinmuxing.

Note: The former was illegally muxing multiple SoC balls onto the same
internal SoC signal which caused rather strange behaviour regarding
the RS232 serial transceiver ForceOFF# pins as available on Iris.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-12-04 13:21:15 -07:00
Marcel Ziswiler
bfe682e9dd apalis/colibri_t30: add comment about tristate and input vs. output pinmuxing
Add pinmuxing comment stating that TRISTATE means the output driver is
tri-stated and INPUT means the input driver is enabled vs. OUTPUT where
it is disabled.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-12-04 13:21:15 -07:00
Pragnesh Patel
f517e5fe98 riscv: sifive/fu540: kconfig: Enable support for Opencores I2C controller
Enable support for SiFive FU540 Opencores I2C master controller.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-11-28 08:30:41 +01:00
Patrick Delaunay
60a2dd6aa2 board: st: stm32mp1: update load address for FIT examples
Update kernel load address for FIT examples to avoid relocation:
- Kernel example uses Image.gz with U-Boot gzip decompression
  at final kernel location 0x0xC0008000.
- Copro example loads zImage at a correct location (0xC4000000),
  to avoid zImage relocation before decompression by kernel code.

An other solution to avoid zImage relocation is to align
the kernel load and entry address with the real location in FIT
(the relocation of zImage is skipped in U-Boot bootm command for
identical address) but it is less flexible because this offset
depends on FIT content:

For example:

## Loading kernel from FIT Image at c2000000 ...
   Using 'ev1' configuration
   Trying 'kernel' kernel subimage
     Description:  Linux kernel
     Created:      2020-10-22   9:08:32 UTC
     Type:         Kernel Image
     Compression:  uncompressed
     Data Start:   0xc20000cc

The kernel offset in FIT is 0xCC in FIT and zImage is decompressed at
0xC0008000 by kernel code:

kernel {
	description = "Linux kernel";
	data = /incbin/("zImage");
	type = "kernel";
	arch = "arm";
	os = "linux";
	compression = "none";
	load = <0xC20000cc>;
	entry = <0xC20000cc>;
	hash-1 {
		algo = "sha1";
	};
};

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-11-25 14:27:19 +01:00
Patrick Delaunay
29e5c02788 board: stm32mp1: no MTD partitions fixup for serial boot
Remove the update of the MTD partitions in kernel device tree
for serial boot (USB / UART), and the kernel will use the MTD
partitions define in the loaded DTB because U-Boot can't known the
expected flash layout in this case.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-11-25 10:58:15 +01:00
Marek Vasut
7d5164425b ARM: dts: stm32: Add DHCOM based PicoITX board
Add DT for DH PicoITX unit, which is a bare-bones carrier board for
the DHCOM. The board has ethernet port, USB, CAN, LEDs and a custom
board-to-board expansion connector.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-11-25 10:43:46 +01:00
Michal Simek
cd40b82655 fru: common: Record pcie/uuid fields in custom board area
Add additional fields. They will be just recorded and filled but not shown.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-20 10:42:54 +01:00
Michal Simek
b8771d0b1d fru: ops: Do not let parser to write data to not allocated space
If customs fields in board area are used it will likely go over allocated
space in struct fru_board_data. That's why calculate limit of this
structure to make sure that different data is not rewritten by accident.
When limit is reached stop to record fields.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-20 10:42:54 +01:00
Michal Simek
5fb093f471 fru: common: Switch capture variable with the rest
capture variable is bool which is just one byte and it is just causing
unaligned accesses. Better to have it as last entry in the structure.

It also simplify offset calculation for initial header copy.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-20 10:42:54 +01:00
Michal Simek
6c5828dc4b microblaze: Get rid of xparameters.h
There is no need to use this file anymore. Include it in main config file
and simplify logic based on it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-20 10:42:53 +01:00
Holger Brunck
c904a0b762 km/ppc: use Kconfig for MEMTEST configuration
Also change back SYS_MEMTEST_END to 0x00f00000. 0xe00000 was wrong and
introduced due to the global Kconfig migration of this option in u-boot.

CC: Heiko Schocher <hs@denx.de>
CC: Tom Rini <trini@konsulko.com>
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
2020-11-19 09:45:49 -05:00
Matteo Ghidoni
aef04a8aa1 km: replace hardcoded address for imported environment
Instead of using an hard coded address, make use of an
already defined address for importing the environment
for ramfs and nfs boot. This allows boards having different
mapping to use the same code.

CC: Heiko Schocher <hs@denx.de>
CC: Tom Rini <trini@konsulko.com>
Signed-off-by: Matteo Ghidoni <matteo.ghidoni@hitachi-powergrids.com>
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
2020-11-19 09:45:49 -05:00
Arnaud Aujon Chevallier
5a7885cca5 arm: vexpress: don't reset flags in board_init to avoid losing previous ones
Re-submitted because of missing description and signed-off.

flags reset in board_init caused bugs when executing command like editenv
because the reallocated flag was lost.

Tested-by: Michael Opdenacker <michael.opdenacker@bootlin.com>
Signed-off-by: Arnaud Aujon Chevallier <arnaud@intelibre.fr>
2020-11-19 09:45:49 -05:00
Tom Rini
e800d715e0 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Enable SATA disk on QEMU RISC-V and update doc.
- k210 pinctrl updates:
  - Fix inverted IE and OE for I2C.
  - Rename power domains to match datasheet.
2020-11-17 09:52:34 -05:00
Heinrich Schuchardt
2873ca2a78 riscv: enable SATA disk on QEMU RISC-V
Allow attaching a virtual SATA disk to QEMU RISC-V by implying
AHCI, AHCI_PCI, CMD_SCSI, DM_SCSI, PCI_INIT_R, SCSI, SCSI_AHCI.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-11-17 15:09:16 +08:00
Heinrich Schuchardt
19dd274b56 riscv: sort SPECIFIC_OPTIONS
Sort implied options in BOARD_SPECIFIC_OPTIONS in the same sequence as in
.config.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-11-17 15:09:16 +08:00
Icenowy Zheng
8c51c65273 sunxi: allow to use AXP20[39] attached to I2C0 on V3 series
The reference design of Allwinner V3 series uses an
AXP203 or AXP209 PMIC attached to the I2C0 bus of the SoC, although the
first community-available V3s board, Lichee Pi Zero, omitted it.

Allow to introduce support for the PMIC on boards with it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-11-17 00:42:21 +00:00
Samuel Holland
882fb905e0 sunxi: a64: Add a defconfig for the PinePhone
The PinePhone is a smartphone produced by Pine64, with an A64 SoC,
2 or 3 GiB LPDDR3 RAM, 16 or 32 GiB eMMC, 720x1440 MIPI-DSI panel,
and Quectel EG25-G modem.

There are two main board revisions: 1.1 for early adopters, and 1.2
for mass production. Since there is code to detect the board revision
at boot, one config/image can support both boards.

Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-11-17 00:42:21 +00:00
Samuel Holland
20f3ee31c3 sunxi: board: Set fdtfile to match the DT chosen by SPL
Previously, fdtfile was always the value in CONFIG_DEFAULT_DEVICE_TREE.
This meant that, regardless of the DT chosen by SPL (either by changing
the header in the image or by the selection code at runtime), Linux
always used the default DT.

By using the name from the SPL header (which, because of the previous
commit, always matches the DT used by U-Boot proper), Linux also sees
the same board as U-Boot/SPL, even if the boot script later loads a DT
from disk.

Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[Andre: remove no longer needed CONFIG_SPL_LOAD_FIT guards]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-11-17 00:42:20 +00:00
Samuel Holland
41530cf681 sunxi: board: Save the chosen DT name in the SPL header
This overwrites the name loaded from the SPL image. It will be different
if there was previously no name provided, or if a more accurate name was
determined by the board variant selection logic. This means that the DT
name in the SPL header now always matches the DT appended to U-Boot.

Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[Andre: move function under CONFIG_SPL_LOAD_FIT guard]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-11-17 00:42:20 +00:00
Samuel Holland
8a8b73b6d7 sunxi: board: Add PinePhone DT selection logic
There are two different publicly-released revisions of the PinePhone
hardware, versions 1.1 and 1.2; and they need different device trees.
Since some GPIO pins were rerouted, we can use that to distinguish
between them.

Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-11-17 00:42:20 +00:00
Samuel Holland
54ac5aa174 sunxi: board: Simplify Pine A64 DT selection logic
Instead of using an entirely separate matching algorithm, simply update
the name of the DT we want to match. Enabling this logic does not depend
on the FIT config name, only on the initial guess of the board name.

Importantly, the initial guess must be "sun50i-a64-pine64-plus", because
otherwise the logic would trigger when "sun50i-a64-pine64-lts" was
written to the SPL header.

Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-11-17 00:42:20 +00:00
Samuel Holland
467b7e52ec sunxi: board: Add a helper to get the SPL DT name
This moves the validity checking and typecasts all to one place away
from the string comparison logic, and it detangles the compile-time
and runtime control flow.

The new helper will also be used by U-Boot proper in a future commit.

Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[Andre: protect new function with CONFIG_SPL_LOAD_FIT]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-11-17 00:42:20 +00:00
Samuel Holland
2fcd74899c sunxi: board: Use a more descriptive variable name
The variable "cmp_str" always leaves me wondering if it is the DT name
of the current board (yes) or DT name in the FIT config entry (no).

In preparation for expanding the functionality here, rename it to
something that obviously means "this is the DT name we are looking for".

Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-11-17 00:42:20 +00:00
Tom Rini
9324c9a823 Merge tag 'ti-v2021.01-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- Fix Nokia RX-51 boot issues
- Fix CONFIG_LOGLEVEL on K3 devices
- Add phyBOARD REGOR support
2020-11-16 13:42:29 -05:00
Ivaylo Dimitrov
71c27dbaae Nokia RX-51: Make onenand working
set_gpmc_cs0() sets wrong timings and size for Nokia N900 onenand flash.
Fix that by setting the correct timings and size from the board code

Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Tested-by: Pali Rohár <pali@kernel.org>
2020-11-15 15:29:40 +05:30
Pali Rohár
b95ffd3051 Nokia RX-51: During init disable lp5523 led instead of resetting it
After commit d5243359e1 ("OMAP24xx I2C: Add support for set-speed")
U-Boot is unstable to reset lp5523 led. That commit added pooling for i2c
poll ARDY bit which apparently is never set. It is not known what is
happening here.

Purpose of resetting lp5523 led in Nokia RX-51 code is just to turn off
very bright led which is powered on by NOLO and expects next boot image
(kernel or U-Boot) to turn it off.

After testing we observed that just disabling lp5523 led is working fine.

So as a workaround to this ARDY bit i2c issue we disable lp5523 led instead
of resetting it.

Signed-off-by: Pali Rohár <pali@kernel.org>
Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
2020-11-15 15:29:40 +05:30
Pali Rohár
94f69f4c14 Nokia RX-51: Fix crashing in U-Boot mmc function omap_hsmmc_stop_clock()
After commit 04a2ea248f ("mmc: disable UHS modes if Vcc cannot be
switched on and off") U-Boot started crashing on Nokia RX-51 while
initializing mmc and caused reboot loop.

It looks like that some clocks were not enabled and this patch fixes U-Boot
mmc crash.

Signed-off-by: Pali Rohár <pali@kernel.org>
Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
2020-11-15 15:29:40 +05:30
Pali Rohár
8d8c181703 Nokia RX-51: Convert to CONFIG_DM_I2C
Use twl4030_i2c_read(), i2c_get_chip_for_busnum() and remove
CONFIG_SYS_I2C.

Signed-off-by: Pali Rohár <pali@kernel.org>
2020-11-15 15:26:25 +05:30
Parthiban Nallathambi
a1337e3581 ARM: am335x: Add phyBOARD REGOR support
phyBOARD-REGOR is based on phyCORE AM335x R2 SoM (PCL060).

CPU  : AM335X-GP rev 2.1
Model: Phytec AM335x phyBOARD-REGOR
DRAM:  512 MiB
NAND:  512 MiB
MMC:   OMAP SD/MMC: 0
eth0: ethernet@4a100000

Working:
 - Eth0
 - i2C
 - MMC/SD
 - NAND
 - UART
 - USB (host)

Device trees were taken from Linux mainline:
commit c4d6fe731176 ("Linux 5.9.0")

Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-11-15 15:14:04 +05:30
Alper Nebi Yasak
13634bb658 rockchip: gru: Allow setting up clocks in U-Boot proper
Commit fe97471632 ("rockchip: rk3288: Allow setting up clocks in
U-Boot proper") fixes some clock issues when chainloading U-Boot on
rk3288 chromebooks. Part of that change is still available in veyron's
board_early_init_r() function. Since chain-loading U-Boot proper from
vendor firmware is possible on gru boards as well, do the same thing for
them too.

On rk3399, this needs to detect whether SPL was run via handoff, so
enable that and bloblist kconfigs it needs for chromebook_bob.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-11-13 18:15:08 +08:00
Simon Glass
6486eaa024 x86: coral: Correct max98357 file
This somehow ended up as an empty file. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-10 09:35:57 +08:00
Tom Rini
d062c1344c Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Add a new SMBIOS parser and enable it when booting from coreboot
- Fix up various driver names to avoid dtoc warnings
- Fully enable ACPI support on Google Chromebook Coral
- Add a way to set SMBIOS properties using the devicetree
- Update existing boards to use devicetree for SMBIOS using a new
  default sysinfo driver
2020-11-06 09:46:43 -05:00
Simon Glass
8f1f374f63 x86: galileo: Use devicetree for SMBIOS settings
Add settings and enable the default sysinfo driver so that these can come
from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Simon Glass
3a8ee3df83 board: Rename uclass to sysinfo
This uclass is intended to provide a way to obtain information about a
U-Boot board. But the concept of a U-Boot 'board' is the whole system,
not just one circuit board, meaning that 'board' is something of a
misnomer for this uclass.

In addition, the name 'board' is a bit overused in U-Boot and we want to
use the same uclass to provide SMBIOS information.

The obvious name is 'system' but that is so vague as to be meaningless.
Use 'sysinfo' instead, since this uclass is aimed at providing information
on the system.

Rename everything accordingly.

Note: Due to the patch delta caused by the symbol renames, this patch
shows some renamed files as being deleted in one place and created in
another.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Christian Gmeiner
43a218b653 coreboot: make use of smbios parser
If u-boot gets used as coreboot payload it might be nice to get
vendor, model and bios version from smbios. I am not sure about
the output of all the read information.

With qemu target for coreboot this could look this:

CBFS: Found @ offset 14f40 size 3b188
Checking segment from ROM address 0xffc15178
Checking segment from ROM address 0xffc15194
Loading segment from ROM address 0xffc15178
  code (compression=1)
  New segment dstaddr 0x01110000 memsize 0x889ef srcaddr 0xffc151b0 filesize 0x3b150
Loading Segment: addr: 0x01110000 memsz: 0x00000000000889ef filesz: 0x000000000003b150
using LZMA
Loading segment from ROM address 0xffc15194
  Entry Point 0x01110000
BS: BS_PAYLOAD_LOAD run times (exec / console): 77 / 1 ms
Jumping to boot code at 0x01110000(0x07fa7000)

U-Boot 2020.10-00536-g5dcf7cc590-dirty (Oct 07 2020 - 14:21:51 +0200)

CPU: x86_64, vendor AMD, device 663h
DRAM:  127.1 MiB
MMC:
Video: No video mode configured in coreboot!
Video: No video mode configured in coreboot!
Vendor: QEMU
Model: Standard PC (i440FX + PIIX, 1996)
Bios Version: 4.12-3152-g326a499f6f-dirty
Net:   e1000: 52:54:00:12:34:56
       eth0: e1000#0
No working controllers found
Finalizing coreboot
Hit any key to stop autoboot:  0

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05 14:58:45 +08:00
Sebastian Reichel
b431970e7f board: ge: b1x5v2: Add MAINTAINERS
Introduce maintainers file for the GE B1x5 board.

Cc: Huan 'Kitty' Wang <HuanWang@ge.com>
Cc: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-04 19:47:30 +01:00
Sebastian Reichel
3bbc763de6 board: ge: ppd: Update MAINTAINERS
This updates the PPD MAINTAINERS file doing a couple of changes:

 * Replace Martyn with myself, since he no longer has the hardware
   available and add Ian Ray as maintainer
 * Fix the board directory path, which was still listing freescale/
   instead of ge/
 * Order the list of files alphabetically
 * Add board specific device tree files to the file list

Cc: Martyn Welch <martyn.welch@collabora.com>
Cc: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-04 19:47:14 +01:00
Sebastian Reichel
dc438fb6e6 board: ge: bx50v3: Update MAINTAINERS
This updates the Bx50v3 MAINTAINERS file, so that it also catches
changes to the related device tree files. Additionally the list of
files has been sorted alphabetically and I added myself as maintainer.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-04 19:47:01 +01:00
Sebastian Reichel
64272efdaf board: ge: b1x5v2: Add GE B1x5v2 and B1x5Pv2
GE B1x5v2 patient monitor series is similar to the CARESCAPE Monitor
series (GE Bx50). It consists of a carrier PCB used in combination
with a Congatec QMX6 SoM. This adds U-Boot support using device model
everywhere and SPL for memory initialization.

Proper configuration is provided as 'ge_b1x5v2_defconfig' and the
combined image u-boot-with-spi.imx can be flashed directly to 1024
byte offset to /dev/mtdblock0. Alternatively SPL and u-boot.imx can
be loaded separately via USB-OTG using e.g. imx_usb.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-11-01 16:01:40 +01:00
Sebastian Reichel
def6f53d21 board: ge: common: vpd: separate I2C specific code
This separates the I2C specific code from the generic
GE vital product data code, so that the generic parts
can be used on hardware with VPD stored in SPI flash
memory.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-01 15:58:47 +01:00
Sebastian Reichel
987b8f614c board: ge: common: add config option for RTC and VPD feature
While this code is being used by all GE platforms its useful
to have it behind a config option for hardware bringup of
new platforms.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-01 15:58:47 +01:00
Sebastian Reichel
36e3e7deb2 board: ge: common: rename ge_common.c to ge_rtc.c
The file only contains RTC related code, so let's name
it accordingly.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-01 15:58:47 +01:00
Teresa Remmet
0cc2a07879 board: phytec: imx8mm: Add PHYTEC phyCORE-i.MX8MM support
Add support PHYTEC phyCORE-i.MX8MM SOM.

Supported features:
 - 2GB LPDDR4 RAM
 - 1x 1Gbit Ethernet
 - eMMC
 - external SD
 - debug UART3
 - watchdog
 - i2c eeprom

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
2020-11-01 15:58:19 +01:00