Commit graph

74432 commits

Author SHA1 Message Date
Aswath Govindraju
4f2c79e42c dt-bindings: phy: Add definitions for additional phy types
Add definitions for additional phy types that's used specifically for
Torrent SERDES.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210721155849.20994-4-kishon@ti.com
2021-07-27 10:56:53 +05:30
Kishon Vijay Abraham I
9f6ae6dec2 dm: test: Add test case to check node name ignoring unit address
Add test to check node name ignoring unit address.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20210721155849.20994-3-kishon@ti.com
2021-07-27 10:56:53 +05:30
Kishon Vijay Abraham I
77cbaf8837 dm: core: Add helper to compare node names
Add helper to compare node names.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20210721155849.20994-2-kishon@ti.com
2021-07-27 10:56:53 +05:30
Paul Barker
e8ad4cb01c configs: am335x_evm: Support GbE PHYs
The SanCloud BeagleBone Enhanced (BBE) includes a Gigabit Ethernet PHY.

Signed-off-by: Paul Barker <paul.barker@sancloud.com>
2021-07-27 10:56:09 +05:30
Paul Barker
124b3030f5 arm: dts: Import am335x-sancloud-bbe devicetree
This device tree is imported from Linux 5.13.1 and enabled via the
am335x board file and the am335x evm defconfig.

Signed-off-by: Paul Barker <paul.barker@sancloud.com>
2021-07-27 10:56:09 +05:30
Paul Barker
942853dd96 arm: dts: Resync BeagleBone device trees
These device trees are updated to match the versions in Linux 5.13.1.
The tick-timer entry in am335x-bone-common.dtsi is preserved.

Signed-off-by: Paul Barker <paul.barker@sancloud.com>
2021-07-27 10:56:09 +05:30
Paul Barker
33e9021a9a dt-bindings: Resync omap & am33xx pinctrl bindings
These headers are updated to match the versions in Linux 5.13.1.

Signed-off-by: Paul Barker <paul.barker@sancloud.com>
2021-07-27 10:56:09 +05:30
Aswath Govindraju
f490d359d7 configs: j7200_evm_*_defconfig: Enable configs for HS400 support
Enable configs to add support for HS400 speed mode.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210525093826.10390-4-a-govindraju@ti.com
2021-07-27 10:56:09 +05:30
Aswath Govindraju
455f9dddc8 arm: dts: k3-j7200-main: Add support for HS400 and update delay select values for MMCSD subsystems
HS400 speed mode is now supported in J7200 SoC[1]. Therefore add
mmc-hs400-1_8v tag in sdhci0 device tree node.

Also update the delay values for various speed modes supported, based on
the revised january 2021 J7200 datasheet[2].

[1] - section 12.3.6.1.1 MMCSD Features, in
      https://www.ti.com/lit/ug/spruiu1a/spruiu1a.pdf,
      (SPRUIU1A – JULY 2020 – REVISED JANUARY 2021)

[2] - https://www.ti.com/lit/ds/symlink/dra821u.pdf,
      (SPRSP57B – APRIL 2020 – REVISED JANUARY 2021)

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210525093826.10390-3-a-govindraju@ti.com
2021-07-27 10:56:09 +05:30
Aswath Govindraju
46077ef251 mmc: sdhci_am654: Read ti, strobe-sel property from device tree
Read the strobe select value from the device tree property ti,strobe-sel,
required for HS400 speed mode

Fixes: a20008eabd ("mmc: am654_sdhci: Add Support for configuring PHY in J721e")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Link: https://lore.kernel.org/r/20210525093826.10390-2-a-govindraju@ti.com
2021-07-27 10:56:09 +05:30
Faiz Abbas
bda47bef7c mmc: sdhci: Write to HOST_CONTROL2 register for HS400 speed mode
Enable HS400 speed mode by writing to HOST_CONTROL2 register.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Link: https://lore.kernel.org/r/20210405144428.12159-1-a-govindraju@ti.com
2021-07-27 10:56:09 +05:30
Tom Rini
df59b7d23b configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-26 21:10:37 -04:00
Tom Rini
b70b9b0746 Prepare v2021.10-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-26 20:57:18 -04:00
Tom Rini
e013b72701 Xilinx changes for v2021.10-rc1
xilinx:
 - Use default ENVL_NOWHERE configuration
 - Add support for handling compressed kernels
 
 zynqmp:
 - SPL malloc size extension
 - USB2.0 for zc1751 dc2
 - Fix USB3.0 nodes
 - Handle lpd_lsbus clock
 - Cleanup macros around SYSRESET
 
 versal:
 - Remove PBSIZE macro
 
 zynq_sdhci:
 - Tap delay fixups
 
 net:
 - Add support for MRMAC
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Merge tag 'xilinx-for-v2021.10-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2021.10-rc1

xilinx:
- Use default ENVL_NOWHERE configuration
- Add support for handling compressed kernels

zynqmp:
- SPL malloc size extension
- USB2.0 for zc1751 dc2
- Fix USB3.0 nodes
- Handle lpd_lsbus clock
- Cleanup macros around SYSRESET

versal:
- Remove PBSIZE macro

zynq_sdhci:
- Tap delay fixups

net:
- Add support for MRMAC
2021-07-26 12:09:32 -04:00
Manish Narani
15ca9ebb07 arm64: zynqmp: Move USB3 PHY properties from DWC3 node to USB node
Move the PHY properties from DWC3 node to USB node in ZynqMP DTs as here
the USB3 PHY used is PSGTR, which is connected to Xilinx USB core. This
PHY initialization should be handled from Xilinx USB core as the
prerequisite register configurations are done here only.

Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26 09:26:41 +02:00
Raju Kumar Pothuraju
3965d13f93 xilinx: Define kernel_comp_addr_r,kernel_comp_size env variables
Add kernel_comp_addr_r, kernel_comp_size env variables for zynqmp and
versal to be able to use the compressed kernel Image(.gz,.bz2,.lzma,.lzo)
using booti command.

Signed-off-by: Raju Kumar Pothuraju <raju.kumar-pothuraju@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26 09:18:45 +02:00
Michal Simek
9ca0962176 arm64: versal: Drop default definitions of CONFIG_SYS_PBSIZE
It is default value which had been converted by commit 432e398068
("include/configs: drop default definitions of CONFIG_SYS_PBSIZE"). That's
why also remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26 09:18:45 +02:00
Michal Simek
a9558b45a4 arm64: zynqmp: Enable reset and poweroff via sysreset framework
reset and poweroff are called via hooks in psci driver which is going
around sysreset framework that's why enable sysreset drivers and do reset
and poweroff via this framework. Using this flow will allow us to call
SYSTEM_WARM_RESET based on psci 1.1 spec which can be calles with reset -w
command.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26 09:18:45 +02:00
Michal Simek
f1bc214b00 arm64: zynqmp: Do not define do_reset() if sysreset is enabled
The SPL can also be compiled with sysreset drivers just fine, so
update the condition to cater for that option.
The same change was done by commit efa1a62ad2 ("ARM: imx8m: Do not define
do_reset() if sysreset is enabled").

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26 09:18:45 +02:00
Michal Simek
bfc05d7e2a psci: Do not define do_poweroff() if CONFIG_SYSRESET_CMD_POWEROFF is enabled
CONFIG_SYSRESET_CMD_POWEROFF defines do_poweroff() in sysreset-uclass.c
that's why don't define it twice when both CONFIG_SYSRESET_CMD_POWEROFF and
CONFIG_CMD_POWEROFF are enabled. CONFIG_SYSRESET_CMD_POWEROFF depends on
CONFIG_CMD_POWEROFF.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26 09:18:45 +02:00
Ashok Reddy Soma
bc579291e2 xilinx: versal: Enable Xilinx AXI MRMAC
Enable Xilinx AXI MRMAC for Versal platforms.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26 09:18:45 +02:00
Ashok Reddy Soma
258ce79cfc net: xilinx: axi_mrmac: Add MRMAC driver
Add support for xilinx multirate(MRMAC) ethernet driver.
This driver uses multichannel DMA(MCDMA) for data transfers of MRMAC.
Added support for 4 ports of MRMAC for speeds 10G and 25G.
MCDMA supports upto 16 channels but in this driver we have setup only
one channel which is enough.

Tested 10G and 25G on all 4 ports.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26 09:18:45 +02:00
Ashok Reddy Soma
d20cf6b6c3 net: ethtool: Add ethernet speed macros for higher speeds
Add speed macro's for higher ethernet speeds to be used in u-boot
networking drivers. Added Macros for speeds 14G, 20G, 25G, 40G, 50G,
56G, 100G and 200G inline with linux.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26 09:18:45 +02:00
Michal Simek
0c383a7957 clk: zynqmp: Add support for enabling clock on lpd_lsbus
lpd_lsbus is clock which is used by many IPs like dmas, gems, gpio, sdhcis,
spis, ttcs, uarts, watchdog that's why make sense to also enable access to
change this clock. For this clock you already get the rate.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26 09:18:45 +02:00
Piyush Mehta
d036f4f2c6 arm64: dts: zynqmp: Enable USB2.0 for zc1751-xm016-dc2
The board zynqmp-zc1751-xm016-dc2 support only USB2.0.
This patch removes USB3.0 DT configuration for DC2 board.

Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26 09:18:45 +02:00
Mike Looijmans
50918d0df5 xilinx: Return ENVL_NOWHERE instead of ENVL_UNKNOWN
The system refuses to boot without any environment, so return ENVL_NOWHERE when
there's nowhere to store the environment instead of ENVL_UNKNOWN.

This fixes that the board won't boot from eMMC when CONFIG_ENV_IS_IN_FAT is not
defined, for example. Similar for other combinations.

Fixes: 1025bd098a "xilinx: zynqmp: Add support for saving variables"

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26 09:18:45 +02:00
Michal Simek
419b4a86f7 mmc: zynq_sdhci: Make variables/structure static
All these variables/structure are local and should be static.

Issues are reported by sparse:
drivers/mmc/zynq_sdhci.c:49:11: warning: symbol 'zynqmp_iclk_phases' was not declared. Should it be static?
drivers/mmc/zynq_sdhci.c:50:11: warning: symbol 'zynqmp_oclk_phases' was not declared. Should it be static?
drivers/mmc/zynq_sdhci.c:53:11: warning: symbol 'versal_iclk_phases' was not declared. Should it be static?
drivers/mmc/zynq_sdhci.c:54:11: warning: symbol 'versal_oclk_phases' was not declared. Should it be static?
drivers/mmc/zynq_sdhci.c:546:24: warning: symbol 'arasan_ops' was not declared. Should it be static?

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-26 09:18:45 +02:00
Michal Simek
c0436fcf1a mmc: zynq_sdhci: Fix kernel doc warnings
Fix these kernel doc warnings:
drivers/mmc/zynq_sdhci.c:181: warning: contents before sections
drivers/mmc/zynq_sdhci.c:236: warning: contents before sections
drivers/mmc/zynq_sdhci.c:291: warning: contents before sections
drivers/mmc/zynq_sdhci.c:297: warning: Function parameter or member 'degrees' not described in                   'sdhci_versal_sdcardclk_set_phase'
drivers/mmc/zynq_sdhci.c:354: warning: contents before sections
drivers/mmc/zynq_sdhci.c:360: warning: Function parameter or member 'degrees' not described in                   'sdhci_versal_sampleclk_set_phase'
drivers/mmc/zynq_sdhci.c:467: warning: contents before sections

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-26 09:18:45 +02:00
Ashok Reddy Soma
a70bdafd67 mmc: zynq_sdhci: Split set_tapdelay function to in and out
Split arasan_zynqmp_set_tapdelay() to handle input and output tapdelays
separately. This is required to handle zero values for ITAP and OTAP
values. If we dont split, we will have to remove the if() in the
function, which makes ITAP values to be overwritten when OTAP values are
called to set and vice-versa.

Restrict tap_delay value calculated to max allowed 8 bits for ITAP and 6
bits for OTAP for ZynqMP.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26 09:18:45 +02:00
Ashok Reddy Soma
ee9ae005dc mmc: zynq_sdhci: Use Mask writes for Tap delays
Restrict tap_delay value to the allowed size(8bits for itap and 6 bits
for otap) before writing to the tap delay register.

Clear ITAP and OTAP delay bits before updating with the new tap value
for Versal platform.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26 09:18:45 +02:00
Ashok Reddy Soma
affcba728b mmc: zynq_sdhci: Allow configuring zero Tap values
Allow configuring ITAP and OTAP values with zero to avoid failures in
some cases (one of them is SD boot mode). Legacy, SDR12 modes require
to program the ITAP and OTAP values as zero, whereas for SDR50 and SDR104
modes ITAP value is zero.

In SD boot mode firmware configures the SD ITAP and OTAP values and
in this case u-boot has to re-configure required tap values(including zero)
based on the operating mode.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26 09:18:45 +02:00
Ashok Reddy Soma
8e34aa00e9 mmc: zynq_sdhci: Resolve uninitialized return value
set_phase() functions are not modifying the ret value and returning
the same uninitialized ret, return 0 instead.

Keep the return type as int to return errors when the tapdelay's are
set via xilinx_pm_request() in future.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26 09:18:45 +02:00
Ricardo Salveti
677a24cbc3 xilinx: zynqmp: increase CONFIG_SYS_SPL_MALLOC_SIZE to 16MB
commit 03f1f78a9b ("spl: fit: Prefer a malloc()'d buffer for loading
images")' changed the way buffer allocation worked for SPL to a more
flexible method.

For xilinx zynqmp the 1MB buffer is not necessarily enough when dealing
with complex fit images (e.g. containing FPGA/TF-A/OP-TEE/U-Boot
proper), which can easily reach up to 10MB, so increase the default
CONFIG_SYS_SPL_MALLOC_SIZE size to 16MB to cover more advanced
scenarios.

Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26 09:18:44 +02:00
Tom Rini
ec22c365e3 Pull request for efi-2021-10-rc1-3
Documentation:
 	provide Makefile documentation
 
 SMBIOS:
 	generate BIOS release date based on UEFI version
 	improve error handling in SMBIOS table generation
 
 UEFI:
 	correct handling of signed capsule if authentication if off
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Merge tag 'efi-2021-10-rc1-3' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2021-10-rc1-3

Documentation:
	provide Makefile documentation

SMBIOS:
	generate BIOS release date based on UEFI version
	improve error handling in SMBIOS table generation

UEFI:
	correct handling of signed capsule if authentication if off
2021-07-24 16:41:25 -04:00
Tom Rini
7d4ce5ea53 Merge branch '2021-07-24-arm-and-platform-updates'
- dragonboard410c, synquacer, aspeed fixes / updates
- pl011 serial driver fixes
- Two generic arm bugfixes
2021-07-24 16:39:36 -04:00
Chen Baozi
91a043896d serial: pl011: Enable DEBUG_UART_PL011 in SPL
Commit b81406db51 ("arm: serial: Add debug UART capability to the
pl01x driver") add supports to use pl01x as a debug UART. However,
due to CONFIG_IS_ENABLED macro requires CONFIG_SPL_* prefix, the
_debug_uart_init() would not choose TYPE_PL011 in SPL build. This
patch fixes the bug by judging CONFIG_DEBUG_UART_PL011 explicitly.

Signed-off-by: Chen Baozi <chenbaozi@phytium.com.cn>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-24 08:57:53 -04:00
Chia-Wei Wang
bc7b38450b reset: ast2600: Fix missing reference operator
Fix missing reference operator '&' to correctly get
HW register addresses for writel().

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2021-07-24 08:57:53 -04:00
AKASHI Takahiro
d75f48a83d MAINTAINERS: correct the path of UEFI docs
Change the path from doc/uefi to doc/develop/uefi.

Fixes: commit d1ceeeff6c ("doc: Move UEFI under develop/")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-07-24 10:49:51 +02:00
AKASHI Takahiro
67778ff83a test/py: efi_capsule: align with efidebug syntax changes
After the commit c70f44817d ("efi_loader: simplify 'printenv -e'"),
"-all" option is no longer necessary.
Just remove them in the test script.

Fixes: c70f44817d ("efi_loader: simplify 'printenv -e'")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-07-24 10:49:51 +02:00
AKASHI Takahiro
86a3d43bff efi_loader: remove asm/setjmp.h from efi_api.h
In the commit c982874e93 ("efi_loader: refactor
efi_setup_loaded_image()"), setjmp-related definitions were moved to
efi_loaded_image_obj in efi_loader.h. So setjmp.h is no longer
refererenced in efi_api.h.

This also fixes some error when efi_api.h will be included in
mkeficapsule.c.

Fixes: c982874e93 ("efi_loader: refactor efi_setup_loaded_image()")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-07-24 10:49:51 +02:00
AKASHI Takahiro
c2cc60c1f9 efi_loader: capsule: remove authentication data
If capsule authentication is disabled and yet a capsule file is signed,
its signature must be removed from image data to flush.
Otherwise, the firmware will be corrupted after update.

Fixes: 04be98bd6b ("efi: capsule: Add support for uefi capsule
	authentication")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2021-07-24 10:49:51 +02:00
AKASHI Takahiro
ef890f6331 efi_loader: capsule: remove unused guid
efi_guid_capsule_root_cert_guid is never used.
Just remove it.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-07-24 10:49:51 +02:00
Heinrich Schuchardt
c193d9bd28 smbios: error handling for invalid addresses
SMBIOS tables only support 32bit addresses. If we don't have memory here
handle the error gracefully:

* on x86_64 fail to start U-Boot
* during UEFI booting ignore the missing table

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-24 10:49:51 +02:00
Pali Rohár
11275e4f72 smbios: Fix calculating BIOS Release Date
BIOS Release Date must be in format mm/dd/yyyy and must be release date.
U-Boot currently sets BIOS Release Date from U_BOOT_DMI_DATE macro which is
generated from current build timestamp.

Fix this issue by setting U_BOOT_DMI_DATE macro to U-Boot version which is
better approximation of U-Boot release date than current build timestamp.
Current U-Boot versioning is in format yyyy.mm so as a day choose 01.

Some operating systems are using BIOS Release Date for detecting when was
SMBIOS table filled or if it could support some feature (e.g. BIOS from
1990 cannot support features invented in 2000). So this change also ensures
that recompiling U-Boot from same sources but in different year does not
change behavior of some operating systems.

Macro U_BOOT_DMI_DATE is not used in other file than lib/smbios.c
so remove it from global autogenerated files and also from Makefile.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-24 10:49:51 +02:00
Heinrich Schuchardt
1364029263 doc: fix board/openpiton/riscv64.rst
* remove duplicate heading to avoid build error with 'make htmldocs'
* length of underlines must match header
* use appropriate header levels
* fix type %s/linux/Linux/

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-07-24 10:49:51 +02:00
Heinrich Schuchardt
30c5cbf31b doc: remove qemu_capsule_update from index
Commit 316ab801c0 ("doc: Update CapsuleUpdate READMEs") deleted file
doc/board/emulation/qemu_capsule_update.rst. Update the index. this avoids

    doc/board/emulation/index.rst:6: WARNING:
    toctree contains reference to nonexisting document
    'board/emulation/qemu_capsule_update'

Fixes: 316ab801c0 ("doc: Update CapsuleUpdate READMEs")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-07-24 10:49:51 +02:00
Simon Glass
00ac4b414f doc: Bring in Makefile documentation
U-Boot uses the Linux Kbuild build system. Add the associated
documentation so that people can understand the Makefiles better.

This is taken from Linux v5.12

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-24 10:49:51 +02:00
Chen Baozi
198201509a serial: pl011: Resend the character if FIFO is full in debug uart
pl01x_putc() might return -EAGAIN if there was no space in FIFO. In that
case, high-level caller should wait until there is space and resend the
character.

Signed-off-by: Chen Baozi <chenbaozi@phytium.com.cn>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-23 18:53:46 -04:00
Siew Chin Lim
8f20c48079 command: Fix SMC and HVC maximum number of arguments
smc and hvc commands take upto 8 user input arguments, the maximum
number of arguments of the U_BOOT_CMD macro should set to 9.

Besides, fix the typo (arg7 -> arg6) in hvc command's help message.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-23 18:53:46 -04:00
Peter Hoyes
c48fec6e7c armv8: Initialize CNTFRQ if at highest exception level
CNTFRQ_EL0 is only writable from the highest supported exception
level on the platform. For Armv8-A, this is typically EL3, but
technically EL2 and EL3 are optional so it may need to be
initialized at EL2 or EL1. For Armv8-R, the highest exception
level is always EL2.

This patch moves the initialization outside of the switch_el
block and uses a new macro branch_if_not_highest_el which
dynamically detects whether it is at the highest supported
exception level.

Linux's docs state that CNTFRQ_EL0 should be initialized by the
bootloader. If not set, the the U-Boot prompt countdown hangs.

Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
2021-07-23 18:53:46 -04:00