- rk3399 lpddr4 support
- rk3399-rock960 board support improvement
- Eliminate pyelftools dependency by make_fit_atf.py
- clean up rockchip dts to use -u-boot.dtsi
- use ARM arch/generic timer instead of rk_timer
- clean up Kconfig options for board support
make_fit_atf.py no longer requires pyelftools, and nothing else in the
rockchip build requires it either, so remove references to installing it
from the documentation.
Signed-off-by: Chris Webb <chris@arachsys.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
This patch removes SiFive SPI driver and MMC SPI drive from the TODO
list in SiFive FU540 README.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Due changes in DT bindings, we now embed DTB from Linux-5.3 (or
higher) in OpenSBI FW_PAYLOAD along with payload u-boot.bin. This
patch updates SiFive FU540 README to reflect the changes in build
and boot steps.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <Alistair.Francis@wdc.com>
Adds a short bindings document describing the expected structure of a MDIO
MUX dts node. This is based on Linux binding and the example is in fact
copied from there.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We don't need a full checkout of Chrome OS to build U-Boot with
Chromium OS verified boot. Update the instructions accordingly and fix a
typo which joins the output directory and defconfig.
Signed-off-by: Simon Glass <sjg@chromium.org>
There are multiple other openssl engines used by HSMs that can be used to
sign FIT images instead of forcing users to use pkcs11 type of service.
Relax engine selection so that other openssl engines can be specified and
use generic key id definition formula.
Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Cc: Tom Rini <trini@konsulko.com>
add gpio-hog support. GPIO hogging is a mechanism
providing automatic GPIO request and configuration
as part of the gpio-controller's driver probe function.
for more infos see:
doc/device-tree-bindings/gpio/gpio.txt
Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Michal Simek <michal.simek@xilinx.com> (zcu102)
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
Add "st,package" entry. Possibles values are:
-STM32MP_PKG_AA for LFBGA448 (18*18) package
-STM32MP_PKG_AB for LFBGA354 (16*16) package
-STM32MP_PKG_AC for TFBGA361 (12*12) package
-STM32MP_PKG_AD for TFBGA257 (10*10) package
see Linux commit 966d9b928f626a54a0c27c0fdae1e3dfe9bab416
for v5.2-rc1
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
- Minor tracing and PCI improvements
- Various other minor fixes
- Conversion of patman, dtoc and binman to support Python 3
-----BEGIN PGP SIGNATURE-----
iQFFBAABCgAvFiEEslwAIq+Gp8wWVbYnfxc6PpAIreYFAl0nbDoRHHNqZ0BjaHJv
bWl1bS5vcmcACgkQfxc6PpAIreZcBQgAn+ojgq/hD89bihuhz2oEe6rhzHB9OkcC
sHrVL8Jbmby/BuzISGe4oeeM5yVygBVtUiN/72JiiAHLmykqc4CpRjNvgOOAgKCy
Ml8UyiBNNVNfrD6f9PxAKvPZf6S0gfLnomGOQ/psdEojpY5AvQxQ36D+QFZ0AMP5
67/xjSfN9bNPw8UbgE/VhJ+WFbU948BP2EBt6+NBAtv7HW4AX9vT0famJfWEjwq8
ftmcFOSNGgYcDQ5BwQWX1sFhnwb9XSfurlQsVYBsFA4cx4gj0DfUm1Ugr4wDD+lo
91P+76hSBQ+mHp1HJ90WMd2vAaElG7/SoaicXo9pW6Rc7WIgTjk7gg==
=SdZy
-----END PGP SIGNATURE-----
Merge tag 'dm-pull-9jul19-take2' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm
- Sandbox improvements including .dts refactor
- Minor tracing and PCI improvements
- Various other minor fixes
- Conversion of patman, dtoc and binman to support Python 3
Rename:
- doc/{README.avb2 => android/avb2.txt}
- doc/{README.android-fastboot => android/fastboot.txt}
Add a new file documenting the 'bcb' command:
- doc/android/bcb.txt
The new directory structure has been reviewed by Simon in
https://patchwork.ozlabs.org/patch/1101107/#2176031 .
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The name CONFIG_LEGACY_IMAGE_FORMAT reads slightly better along with
allowing us to avoid a rather nasty Kbuild/Kconfig issue down the line
with CONFIG_IS_ENABLED(IMAGE_FORMAT_LEGACY). In a few places outside of
cmd/ switch to using CONFIG_IS_ENABLED() to test what is set.
Signed-off-by: Tom Rini <trini@konsulko.com>
Add Cadence PCIe endpoint driver supporting configuration
of header, bars and MSI for device.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add documentation for the pre-reloc property in SPL and TPL device-tree:
- u-boot,dm-pre-proper
- u-boot,dm-pre-reloc
- u-boot,dm-spl
- u-boot,dm-tpl
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add u-boot.itb BUILD_TARGET for Rockchip platform when SPL_LOAD_FIT
is being used.
This can get rid of building itb explicitly with 'make u-boot.itb'
so, from now all required images will build just by make.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Right now puma rk3399 board need to copy bl31-rk3399.bin and
rk3399m0.bin into u-boot source directory to make use of building
u-boot.itb.
So, add environment variable
- BL31 for bl31.bin (instead of bl31-rk3399.bin to compatible with other
platform BL31 env)
- PMUM0 for rk3399m0.bin
If the builds are not exporting BL31, PMUM0 env, the fit_spl_atf.sh will
notify with warning about which document to refer for more information
like this:
WARNING: BL31 file bl31.bin NOT found, resulting binary is non-functional
Please read Building section in doc/README.rockchip
WARNING: PMUM0 file rk3399m0.bin NOT found, resulting binary is non-functional
Please read Building section in doc/README.rockchip
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Right now rockchip platform need to copy bl31.elf into u-boot
source directory to make use of building u-boot.itb.
So, add environment variable BL31 like Allwinner SoC so-that the
bl31.elf would available via BL31.
If the builds are not exporting BL31 env, the make_fit_atf.py
explicitly create dummy bl31.elf in u-boot root directory to
satisfy travis builds and it will show the warning on console as
WARNING: BL31 file bl31.elf NOT found, resulting binary is non-functional
WARNING: Please read Building section in doc/README.rockchip
Note, that the dummy bl31 files were created during not exporting
BL31 case would be removed via clean target in Makefile.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Commit ad7061ed74 ("doc: Move device tree bindings documentation to
doc/device-tree-bindings") moved all device tree binding documentation
to doc/device-tree-bindings directory.
The current U-Boot project still have two documentation directories:
- doc/
- Documentation/
Move all documentation and sphinx files to doc directory so all content
can be in a common place.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Now, we have few driver are fully converted into dm and few
are partially converted.
So, update the migration status accordingly.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
This patch add documentation for TPL build and flashing steps
for rk3399 boards.
Add full boot log for future reference.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Compiling the display command leads to an error
undefined reference to `display_set'
No implementation of display_set() exists in U-Boot.
Eliminate the `display` command as well as the accompanying files.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Add STM32MP1 DDR driver update:
These update introduce the DDR interactive mode described in:
https://wiki.st.com/stm32mpu/index.php/U-Boot_SPL:_DDR_interactive_mode
This mode is used by the CubeMX: DDR tuning tool.
https://wiki.st.com/stm32mpu/index.php/STM32CubeMX
The DDR interactive mode is NOT activated by default because
it increase the SPL size and slow down the boot time
(200ms wait added).
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJc5rdIAAoJEMrHeC97M/+mw64P/0jD3C1jvtwkzFQ2DPvnSQEk
iTZHMb91/9GncSY0S2Cgn8a2+m24F7YFLqibKSdduLLr/w98Zfi7kmO+ju/Kn+qE
aG6iomyour8+Pr+1LMPolsKKM8lULSgrd4ALRA5CegNsXijvYEE7N8mPrBpdIQem
BaM4HnQpbtxXU9J/rGHAVagLuHbJmwBvZBQTBAWfQdNR5+vGfplH2sF0cxJF5UTW
06yBXrwjLW6PEVYZbzYiRQ5Gn7BnBe4nXrl4ReDtS5e4ueRKM166TZljvNCd60KI
B49eLxd0wT2Zutsz1rT5c/LChXo3cr8FXM3csJ6J6cIBdfFF3frHbIEDM2jZTxJf
jN7pAHpxbRdYS/GbWS5mSuUyKmxDPt6Kfd7LQUYX9qktqeLG9LfkrmLfGdCSiwkB
64Z15DoHAuDMab+LlV+rz8ns3YAV0ruFryWfZ8udLWuX3G6NDmivafLR3dgNRdNB
otkyCdIlq8GQUm3w+5r9wm7aGvHB3UtNYK870AnYA20vmn/WVuUBZ6yE+lce/QpV
zFS4dgsdbn41EXO/O9TtwMyKT+/s138u2+L7CEegXiNneJmwzbJg3YPeMuaiF8Y2
oYqlUmfVO/ZuoVvr5dwo4TY96nEhRf2Ul36spRdrx8wBZ0YdL+ByDO5Pcc2B9A+P
M80QqlT64BJDJ1CqhW5m
=meeB
-----END PGP SIGNATURE-----
Merge tag 'u-boot-stm32-20190523' of https://github.com/pchotard/u-boot
- Add various STM32MP1 fixes for serial, env, clk, board, i2c ...
- Add STM32MP1 DDR driver update:
These update introduce the DDR interactive mode described in:
https://wiki.st.com/stm32mpu/index.php/U-Boot_SPL:_DDR_interactive_mode
This mode is used by the CubeMX: DDR tuning tool.
https://wiki.st.com/stm32mpu/index.php/STM32CubeMX
The DDR interactive mode is NOT activated by default because
it increase the SPL size and slow down the boot time
(200ms wait added).
This patch adds a basic group of devicetrees, one for each
cpu family, including actually just uart and dspi devices,
since these are the drivers supporting devicetree (support
added in this patch-set).
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Force alignment of the size of parameters array with
the expected value in the binding, that allows compilation
error when the array size change.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
The splash image could be loaded from different sources (e.g. sf, mmc)
with different formats (e.g. raw, file-system). These sources are
structured by a board dependent object 'splash_location'. To decide
where is the splash image loaded, following environment variables are
used to select the splash source and file:
- 'splashsource' is used to select the splash source by setting its
value to specified name of splash location.
- 'splashfile' specify the name of splash image file
But, when loads the splash image from FIT, the name of splash image
within FIT is specified by splash location name. Due to the splash
location name is already used for the splash source, its name may
conflicts with the name of splash image.
To solve the conflict, the environment variable 'splashfile' is used
to specify the splash image in FIT, and keeps the splash location
name for the splash source.
Signed-off-by: Leo Ruan <tingquan.ruan@cn.bosch.com>
Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Tomas Melin <tomas.melin@vaisala.com>
This patch adds description on properties about file name used for both
peripheral bitstream and core bitstream.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
This CPU core is old, no boards using the CPU are left in mainline,
it has no prospects of ever being converted to DM, drop it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie
Since rockchip have an individual doc/README.rockchip, it would
be better to update the same instead of maintaining it separately
in board files.
So, add the documentation for rk3399
- procedure to build for Rockchip miniloader and
U-Boot SPL options
- procedure to boot from SD for Rockchip miniloader and
U-Boot SPL options
- procedure to build ATF, PMU M0 firmware for puma boards
- add boot logs of each option, so-that it would help for future
boards porting
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Commit ff7bd212cb ("net: phy: micrel: fix divisor value for KSZ9031
phy skew") fixed the skew value divisor for the KSZ9031, but left the
code using the same divisor for the KSZ9021, which is incorrect.
The preceding commit c16e69f702 ("net: phy: micrel: add documentation
for Micrel KSZ90x1 binding") added the DTS documentation for the
KSZ90x1, changing it from the equivalent file in the Linux kernel to
correctly state that for this part the skew value is set in 120ps steps,
whereas the Linux documentation and driver continue to this day to use
the incorrect value of 200 that came from the original KSZ9021 datasheet
before it was corrected in revision 1.2 (Feb 2014).
This commit sorts out the resulting confusion in a consistent way by
making the following changes:
- Update the documentation to be clear about what the skew values mean,
in the same was as for the KSZ9031.
- Update the Micrel PHY driver to select the appropriate divisor for
both parts.
- Adjust all the device trees that state skew values for KSZ9021 PHYs to
use values based on 120ps steps instead of 200ps steps. This will result
in the same values being programmed into the skew registers as the
equivalent device trees in the Linux kernel do, where it incorrectly
uses 200ps steps (since that's where all these device trees were copied
from).
Signed-off-by: James Byrne <james.byrne@origamienergy.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
There are quite a few variables which control where things appear in the
final ROM image. Add a flashmap in the documentation to make this easier
to figure out.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: squashed "x86: Update the memory map a little" in]
[bmeng: fixed typo of 'documentation' in the commit title]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
There are no more boards using this CPU and there is no prospect
of any boards showing up soon, remove it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
The DM* family of SOCs is no longer supported. We now support the
omap-l138 lcdk board and Lego EV3 platform. Reflect those changes
in the README.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Sekhar Nori <nsekhar@ti.com>
Update the mmc maintainer from Jaehoon to me.
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Marek Vasut <marex@denx.de>
This updates MAINTAINERS and git-mailrc to add me as a
co-custodian for rockchip
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Tom Rini <trini@konsulko.com>
As far back as 2011, "_armboot_start" was being described as "no
longer defined":
commit 297f18ac0f
Author: Greg Ungerer <greg.ungerer@opengear.com>
Date: Fri Sep 9 22:23:34 2011 +1000
CM4000: fix broken flash base for OpenGear boards
Use _bss_start_ofs as the size of the boot loader code+data that we want
to protect in the flash. This replaces use of the no longer defined
_armboot_start.
