Commit graph

77971 commits

Author SHA1 Message Date
Bin Meng
f77549fe74 riscv: sifive: Fix OF_BOARD boot failure
When using QEMU to have a quick test of booting U-Boot S-mode payload
directly without the needs of preparing the SPI flash or SD card images
for SiFive Unleashed board, as per the instructions [1], it currently
does not boot any more.

This was caused by the OF_PRIOR_STAGE removal, as gd->fdt_blob no longer
points to a valid DTB. OF_BOARD is supposed to replace OF_PRIOR_STAGE,
hence we need to add the OF_BOARD logic in board_fdt_blob_setup().

[1] https://qemu.readthedocs.io/en/latest/system/riscv/sifive_u.html#running-u-boot

Fixes: 2e8d2f8843 ("riscv: Remove OF_PRIOR_STAGE from RISC-V boards")
Fixes: d6f8ab30a2 ("treewide: Remove OF_PRIOR_STAGE")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-07 09:30:44 -05:00
Quentin Schulz
dae0829c6e rockchip: puma/lion: update MAINTAINERS file
Philipp does not work at Theobroma Systems anymore so let's swap
Philipp's address with mine.

Cc: Philipp Tomsich <philipp.tomsich@vrull.eu>
Cc: Quentin Schulz <foss+u-boot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
2022-01-07 09:30:44 -05:00
Mattijs Korpershoek
4c8d067bc5 configs: khadas-vim3{l}_android_ab: enable A/B support
meson64_android.h also relies on CMD_AB_SELECT so enable that as well.

Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20211122152207.219023-5-mkorpershoek@baylibre.com
2022-01-07 10:12:43 +01:00
Mattijs Korpershoek
425f06f86e configs: prepare khadas-vim3{l}_ab_android for AOSP support
In AOSP, both VIM3 and VIM3L have 2 bootloader flavors,
depending on A/B enablement.

For example, for vim3l, the naming is:
- u-boot_kvim3l_noab.bin : legacy support
- u-boot_kvim3l_ab.bin   : A/B support

Prepare a defconfig to support u-boot_kvim3_ab.bin and
u-boot_kvim3l_ab.bin.

This is identical to khadas-vim3{l}_ab_android but will be updated in
the next commit.

Also update partitioning tables for A/B support.

Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20211122152207.219023-4-mkorpershoek@baylibre.com
2022-01-07 10:12:43 +01:00
Mattijs Korpershoek
f89b90d2d9 configs: add khadas-vim3{l}_android for AOSP support
The Khadas VIM3 and VIM3L board are well supported in AOSP[1].
However, there is no mainline U-Boot support for it.
The U-Boot used in AOSP is based on a vendor tree [2]

Add all the necessary bits to flash and boot Android for both Khadas
VIM3 and VIM3L boards.

For Android instructions, refer to [1]

[1] https://source.android.com/setup/build/devices#vim3_and_vim3l_boards
[2] https://gitlab.com/baylibre/amlogic/atv/u-boot

Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20211122152207.219023-3-mkorpershoek@baylibre.com
2022-01-07 10:12:43 +01:00
Mattijs Korpershoek
4eff7426c9 configs: meson64_android: add board specific env settings
This allows us to define extra board variables, such as "board" and
"board_name".

Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20211122152207.219023-2-mkorpershoek@baylibre.com
2022-01-07 10:12:43 +01:00
Neil Armstrong
ede1f4f297 configs: amlogic: Disable CONFIG_NET_RANDOM_ETHADDR when unnecessary
On Meson GXL, GXM, AXG, G12A, G12B & SM1 SoCs, we can generate an unique
MAC address if none valid found in the eFuses storage.

Only the GXBB based boards doesn't have a fallback way to generate an
unique MAC address, so we rely on CONFIG_NET_RANDOM_ETHADDR to have
a valid one.

An exception is the Radxa Zero board who doesn't have Ethernet on board
so depends on an (or multiple) eventual USB adapters, so leaving the
CONFIG_NET_RANDOM_ETHADDR configs seems safer.

Suggested-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Vyacheslav Bocharov <adeep@lexina.in>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20211122110710.1038893-1-narmstrong@baylibre.com
2022-01-07 10:11:12 +01:00
Tom Rini
c00c147dae Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- kwbimage: Fix checksum calculation for v1 images (Pierre)
2022-01-05 13:08:45 -05:00
Pierre Bourdon
9203c73895 tools: kwbimage: Fix checksum calculation for v1 images
Recent changes caused fields in the image main header to be modified
after the header checksum had already been computed. Move the checksum
computation to once again be the last operation performed on the header.

Fixes: 2b0980c240 ("tools: kwbimage: Fill the real header size into the main header")

Signed-off-by: Pierre Bourdon <delroth@gmail.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-05 16:31:58 +01:00
Ashok Reddy Soma
2a9caba1ce net: gem: Reduce timeout of mdio phy idle status check
Timeout for checking mdio phy idle status is 20seconds. In case of errors
this timeout will be too much. Reduce it to 100ms.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Link: https://lore.kernel.org/r/1b73aa57b77587391e1bcd6d9f0480163367ed1b.1637237121.git.michal.simek@xilinx.com
2022-01-05 11:16:21 +01:00
Michal Simek
10c50b1fac net: zynq: Add support for PHY configuration in SGMII mode
SGMII configuration depends on proper GT setting that's why when node has
phys property call PSGTR driver to configure it properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/bbc8d7ed9d308199168e4455c7a3e3a5ac0890e7.1639562397.git.michal.simek@xilinx.com
2022-01-05 11:16:21 +01:00
Michal Simek
b5ffc9f758 net: zynq: Add support for GEM reset
Perform reset before core initialization.
Standard flow which close to 99% users are using getting all IPs out of
reset that there is no need to reset IP again. This is because of all low
level initialization is done in previous bootloader stage.
In SOM case these IPs are not touched by previous bootloader stage that's
why reset needs to be called before IP is accessed to make sure that it is
in correct state.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Link: https://lore.kernel.org/r/5ae1c85b282d632bb62030f1f24a0065661b9153.1638804318.git.michal.simek@xilinx.com
2022-01-05 11:16:21 +01:00
Michal Simek
12133b11a7 net: zynq: Add support for mdio bus address decoding
Xilinx DTS files are using two way how to describe ethernet phy.

The first (already supported) has phy as subnode of gem node.
eth {
        phy-handle = <&phy0>;
         phy0: ethernet-phy@21 {
                ...
        };
};

The second has mdio subnode (with mdio name) which has phy subnode. This
structure allow hadling MDIO reset signal (based on Linux mdio.yaml)
eth {
        phy-handle = <&phy0>;
        mdio {
                phy0: ethernet-phy@21 {
                        ...
                };
        };
};

This patch adds support for the second case where mdio subnode
is found driver will look at its parent to find out which gem is handling
MDIO bus.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/6748007f0b6db9554d7a4b52352dce23ca403f9d.1638798796.git.michal.simek@xilinx.com
2022-01-05 11:16:21 +01:00
Sandeep Gundlupet Raju
ac64f536af dt-bindings: versal: Add new PM_DEV_I2C_PMC macro
Add new macro for PMC I2C power domain.

Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/0bf164f937df551d689dda2a35f9489c2e46b4ab.1638277017.git.michal.simek@xilinx.com
2022-01-05 11:16:21 +01:00
T Karthik Reddy
bf97c460a4 versal: Return ENVL_NOWHERE instead of ENVL_UNKNOWN
The system fails to boot without any environment location, so return
ENVL_NOWHERE when there's nowhere to store the environment instead
of ENVL_UNKNOWN.

The same change was also done by commit 50918d0df5 ("xilinx: Return
ENVL_NOWHERE instead of ENVL_UNKNOWN") for zynq and zynqmp.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/e4ed36408f10159677ed8060bfd5289f3e0691fa.1637752614.git.michal.simek@xilinx.com
2022-01-05 11:16:21 +01:00
Ovidiu Panait
bb113ce313 xilinx: Kconfig: add XILINX_OF_BOARD_DTB_ADDR default value for microblaze
The xilinx board_fdt_blob_setup() implementation makes use of
XILINX_OF_BOARD_DTB_ADDR, but no default value is currently defined for
microblaze. Add one so that microblaze could also work with
CONFIG_OF_SEPARATE.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20211202195657.246723-1-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-01-05 10:22:03 +01:00
Ovidiu Panait
fc7220f0c4 microblaze: branch to base vector address on reset
Current code assumes that the vector base address is always at 0x0.
However, this value is configurable for MicroBlaze using the
CONFIG_XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option. Update the
reset routines to branch to this location instead.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20211130163358.2531677-10-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-01-05 10:22:03 +01:00
Ovidiu Panait
f149ee4c36 microblaze: start.S: add support for configurable vector base address
Current code assumes that the vector base address is always at 0x0.
However, this value is configurable for MicroBlaze, so update the
__setup_exceptions routine to work with any vector base address.

The r4 register is reserved for the vector base address inside
__setup_exceptions and the function prologe/epilogue are also updated to
save and restore r4.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20211130163358.2531677-9-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-01-05 10:22:03 +01:00
Ovidiu Panait
b6aef10979 microblaze: add Kconfig symbol for the vector base address
MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS
configuration parameter). Current code assumes that the reset vector
location is always 0x0.

Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user
can adjust the reset vector address.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-01-05 10:22:03 +01:00
Ovidiu Panait
83b175be16 microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig
Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to
XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of
microblaze-generic Kconfig options.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-01-05 10:22:03 +01:00
Ovidiu Panait
70c68712ef microblaze: drop CONFIG_SYS_RESET_ADDRESS macro
Microblaze is one the last two users of the CONFIG_SYS_RESET_ADDRESS
macro (the other is arch/powerpc/cpu/mpc8xx/cpu.c, but the macro is not
defined anywhere in powerpc code, so it should be removed there too).

Replace CONFIG_SYS_RESET_ADDRESS usage in start.S with
CONFIG_SYS_TEXT_BASE. If the reset address should really be
user-configurable, a new Kconfig option could be added.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20211130163358.2531677-6-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-01-05 10:22:03 +01:00
Ovidiu Panait
48039c333f microblaze: start.S: use stack space as scratch memory for endian offset
To simpify the code, use stack space as scratch memory for endian offset
calculation, rather than saving/restoring the first unused MB vector.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20211130163358.2531677-5-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-01-05 10:22:03 +01:00
Ovidiu Panait
7a971dfbeb microblaze: Kconfig: SPL dependencies fixup
Enable SPL_LIBCOMMON_SUPPORT and SPL_LIBGENERIC_SUPPORT if CONFIG_SPL=y, in
order to fix the following link failures:
common/spl/spl.o: in function `board_init_r':
common/spl/spl.c:755: undefined reference to `puts'
...
common/spl/spl.o: in function `board_init_r':
common/spl/spl.c:756: undefined reference to `hang'
common/spl/spl.c:740: undefined reference to `memset'

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20211130163358.2531677-4-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-01-05 10:22:03 +01:00
Ovidiu Panait
b3fe1e8ff3 microblaze: spl: add board_boot_order() implementation
Microblaze has three boot modes defined in microblaze/include/asm/spl.h,
but only booting from NOR flash is currently useable. Add a custom
board_boot_order() implementation so that RAM and SPI boot modes can also
be selected if the corresponding load-image support is present.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20211130163358.2531677-3-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-01-05 10:22:02 +01:00
Ovidiu Panait
edf0f9b15e microblaze: u-boot.lds: replace __end symbol with _end
board_fdt_blob_setup() uses the _end symbol to find the dtb in the non-spl
case. In order to allow microblaze builds to compile successfully with
CONFIG_OF_SEPARATE, the _end symbol must be defined. Align microblaze with
the other architectures and use _end symbol rather than __end to mark the
end of the u-boot binary.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20211130163358.2531677-2-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-01-05 10:22:02 +01:00
Michal Simek
380bd08370 xilinx: firmware: Move dcache handling directly to pmufw load config
Core function should make sure that data is stored properly that's why move
cache operations directly to zynqmp_pmufw_load_config_object() to be able
to call it from other functions.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/8c92edd3650ce34a3cfd1c1e4e9103980830b1fa.1637236800.git.michal.simek@xilinx.com
2022-01-05 10:22:02 +01:00
Michal Simek
67bf888850 arm64: zynqmp: Switch SOM to shared psu configuration
Previous psu init was targeting SOM + KV260 carrier card and also contain
configurations for other devices on carrier card. This config is removing
all expected configurations for CC and let U-Boot to handle all of it self.
This configuration is designed for SOM itself (and I would bet without
eMMC).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/5782131058dc372befd3fdb4dceabeea5ba56606.1637236693.git.michal.simek@xilinx.com
2022-01-05 10:22:02 +01:00
T Karthik Reddy
5f4e1ff7f9 xilinx: versal: Fix sdhci node name as per DT
Fix the sdhci node name in versal board file as per the name in
device tree and also check for sdhci node as part of backward
compatibility.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/9110ecdabcabcef63fffd4719095acf4326a26e4.1637236638.git.michal.simek@xilinx.com
2022-01-05 10:22:02 +01:00
Michal Simek
ca44216941 arm64: zynqmp: Remove clock-names from GEM in zynqmp-clk-ccf.dtsi
Remove clock-names from GEM nodes from clk-ccf because they should be only
present in zynqmp.dtsi. And as is visible both clock-names defined didn't
really match.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/d6045d81b3e7e97df0ba3eeacb9f3f75ed7cff18.1637239345.git.michal.simek@xilinx.com
2022-01-05 10:22:02 +01:00
Michal Simek
87b50f9aea arm64: zynqmp: Add resets to all GEMs
There is a need to get IP out of reset to operate properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/041362197e8de8e9c696da64429107505bdc0c73.1637239345.git.michal.simek@xilinx.com
2022-01-05 10:22:02 +01:00
Michal Simek
19645a11de arm64: zynqmp: Add u-boot,dm-pre-reloc to dpsub node
u-boot,dm-pre-reloc is necessary for DP driver to allocate enough space for
framebuffer before relocation.
Power domain driver is called when video console is used for example by
loading BMP image.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/5e93acee1746913a6e42741e5e797f0b4ab98d44.1637239230.git.michal.simek@xilinx.com
2022-01-05 10:22:02 +01:00
Michal Simek
0e789d26b7 clk: zynqmp: Fix gem tx/rx/ref clock handling
gemX_ref clock IDs starts at number 104. Till now it was at gemX_tx
location which wasn't correct.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/d073e159b6316707306092a62bccb876cd89a602.1635506016.git.michal.simek@xilinx.com
2022-01-05 10:22:02 +01:00
Michal Simek
e959ade02c clk: zynqmp: Add support for setting up clock for USB
USB range is not enabled but for setting up frequency it is needed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/c55c423f48ca8f953a2dfbdcb25068278d8e5ad6.1635506016.git.michal.simek@xilinx.com
2022-01-05 10:22:02 +01:00
T Karthik Reddy
3b441cf4e4 zynqmp: gpio: Add support for zynqmp gpio modepin driver
ZynqMP modepin driver has capability to get/set/check status of modepin
gpios. These modepins are accessed using xilinx firmware. In modepin
register, [3:0] bits set direction, [7:4] bits read IO, [11:8] bits
set/clear IO.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/2d802d98fd56d95d764532a33e844d935e0cebb3.1635505900.git.michal.simek@xilinx.com
2022-01-05 10:22:02 +01:00
Jan Kiszka
0cc183025f configs: iot2050: Drop unused CONFIG_OF_LIST from defconfig
DTBs are explicitly listed in the image source file for this board, and
this list already became outdated.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2022-01-04 22:48:49 -05:00
Mark Kettenis
3bbd6c0152 arm: apple: Remove CONFIG_SYS_SDRAM_BASE
The memory layout is taken from the device tree passed to us by
m1n1, so there is no need to define this.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2022-01-04 22:48:49 -05:00
Peter Hoyes
439581dca4 vexpress64: Enable VIRTIO_NET network driver
The SMSC driver is using the old driver model.

Init the virtio system in vexpress64.c so that the network device is
discovered.

Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2022-01-04 22:48:48 -05:00
Peter Hoyes
2661397464 vexpress64: Enable OF_CONTROL and OF_BOARD for VExpress64
Capture x0 in lowlevel_init.S as potential fdt address. Modify
board_fdt_blob_setup to use fdt address from either vexpress_aemv8.h
or lowlevel_init.S.

Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2022-01-04 22:48:48 -05:00
Peter Hoyes
90f262a695 vexpress64: Clean up BASE_FVP boot configuration
Move env var address values to #defines so they can be reused elsewhere.

Rename env var names to those recommended in the README and modify
addresses to allow more space for the kernel.

Fix issue where fdt is called with invalid arguments when booting
without a ramdisk.

Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2022-01-04 22:48:48 -05:00
Peter Hoyes
17fe55fd6f vexpress64: Refactor header file to make it easier to add new FVPs
Rename from vexpress_aemv8a.h -> vepxress_aemv8.h as new FVPs may not be
v8-A. No change in behavior.

This is towards future work to enable support for the FVP_BaseR.

Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2022-01-04 22:48:48 -05:00
Peter Hoyes
6c2f16b3c9 doc: Add documentation for the Arm VExpress64 board configs
Create a new documentation section for Arm Ltd boards with a sub-page
for the VExpress64 boards (FVP-A and Juno).

Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2022-01-04 22:48:48 -05:00
Linus Walleij
cc4dcd488c board: stemmy: Increase boot image to 64 MB
When using a recent kernel with a bunch of compiled-in
stuff the kernel image easily becomes bigger than 8 MB
yielding this error:

  Loading Kernel Image
  Image too large: increase CONFIG_SYS_BOOTM_LEN
  Must RESET board to recover

Fix this by bumping to SZ_64MB.

Cc: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
2022-01-04 16:58:23 -05:00
Tom Rini
5fec3c853d Pull request of efi-next
Documentation:
 
 * Add Sunxi board description
 
 UEFI:
 
 * Improvements to U-Boot running on top of UEFI
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Merge tag 'efi-next' of https://source.denx.de/u-boot/custodians/u-boot-efi into next

Pull request of efi-next

Documentation:

* Add Sunxi board description

UEFI:

* Improvements to U-Boot running on top of UEFI
2021-12-31 07:28:36 -05:00
Simon Glass
86bb48880d x86: efi: Don't set up global_data again with EFI
Since EFI does not relocate and uses the same global_data pointer
throughout the board-init process, drop this unnecessary setup, to avoid
a hang.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-31 07:37:48 +01:00
Simon Glass
40b172314b x86: efi: Show the system-table revision
Show the revision of this table as it can be important.

Also update the 'efi table' entry to show the actual address of the EFI
table rather than our table that points to it. This saves a step and the
intermediate table has nothing else in it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-31 07:34:34 +01:00
Simon Glass
13bfaab3da efi: Allow easy selection of serial-only operation
Add info about how to select vidconsole or serial.

Also set up a demo boot command.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-31 07:18:56 +01:00
Simon Glass
62725e661a efi: Show when allocated pages are used
Add a message here so that both paths of memory allocation are reported.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-31 07:02:06 +01:00
Simon Glass
cf376037e2 efi: Mention that efi_info_get() is only used in the stub
This provides access to EFI tables after U-Boot has exited boot services.
It is not needed in the app since boot services remain alive and we can
just call them whenever needed.

Add a comment to explain this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-31 06:59:37 +01:00
Simon Glass
bc53a35ac5 efi: Check for failure when initing the app
The stub checks for failure with efi_init(). Add this for the app as well.
It is unlikely that anything can be done, but we may as well stop.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-31 06:50:40 +01:00
Simon Glass
2a1cf03ea4 efi: Share struct efi_priv between the app and stub code
At present each of these has its own static variable and helper functions.
Move them into a shared file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-31 06:45:01 +01:00