Commit graph

15 commits

Author SHA1 Message Date
Tom Rini
518d438537 MIPS: mips64: fix typos in copyright text of start.S
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

Conflicts:

	arch/mips/cpu/mips64/start.S

Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:50:52 -04:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Gabor Juhos
04380c651a MIPS: add dynamic relocation support
The code handles relocation entries with the
following relocation types only:
  mips32: R_MIPS_REL32
  mips64: R_MIPS_REL+R_MIPS_64
  xburst: R_MIPS_REL32

Other relocation entries are skipped without
processing. The code must be extended if other
relocation types must be supported.

Add -pie to LDFLAGS_FINAL to generate the .rel.dyn
fixup table, which will be applied to the relocated
image before transferring control to it.

The CONFIG_NEEDS_MANUAL_RELOC is not needed
after the patch, so remove that as well.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-02-12 22:22:13 +01:00
Daniel Schwierzeck
28875e2c47 MIPS: start.S: use symbol __image_copy_end for U-Boot image relocation
Use the newly introduced symbol __image_copy_end as end address for
relocation of U-Boot image. This is needed for dynamic relocation added
in later patches. This patch obsoletes the symbols uboot_end and
uboot_end_data which are removed.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-02-12 22:22:13 +01:00
Daniel Schwierzeck
696a3b2a53 MIPS: start.S: optimize BSS initialization
Get the start and end address for clearing BSS from the newly
introduced symbols __bss_start and __bss_end. After GOT is
relocated, those symbols are already pointing to the correct
addresses.

Also optimize the loop by moving the address incrementation
to the delay slot to avoid the initial sub instruction.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-02-12 22:22:13 +01:00
Daniel Schwierzeck
8b1c7345c6 MIPS: start.S: unify and simplify reset vector handling
Adopt reset vector handling from Yamon.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-02-12 22:22:12 +01:00
Gabor Juhos
025f2b3380 MIPS: simplify relocated _G_O_T_ address calculation
The difference between the address of the original
and the relocated _GLOBAL_OFFSET_TABLE_ is always
the same as the relocation offset.

The relocation offset is already computed and it is
available in the 's1/t6' register. Use that to adjust
the relocated _G_O_T_ address, instead of calculating
the offset again from the _gp value.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
2013-01-30 23:32:52 +01:00
Gabor Juhos
67d80c9f97 MIPS: start.S: don't save flush_cache parameters in advance
Saving the parameters in advance unnecessarily complicates
the code. The destination address is already saved in the
's2' register, and that register is not clobbered by the
copy loop. The size of the copied data can be computed
after the copy loop is done.

Change the code to compute the size parameter right
before calling flush_cache, and set the destination
address parameter in the delay slot of the actuall
call.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-27 16:40:15 +01:00
Gabor Juhos
248fe03f53 MIPS: start.S: simplify relocation offset calculation
The current code uses four instructions and a
temporary register to calculate the relocation
offset and to adjust the gp register.

The relocation offset can be calculated directly
from the CONFIG_SYS_MONITOR_BASE constant and from
the destination address. The resulting offset can
be used to adjust the gp pointer.

This approach makes the code a bit simpler because
it needs two instructions only.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-27 16:40:07 +01:00
Gabor Juhos
b2fe86f887 MIPS: start.S: save reused arguments earlier in relocate_code
Save the reused parameters at the beginning
of the 'relocate_code' function. This makes
the function a bit more readable.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-27 16:39:59 +01:00
Gabor Juhos
f321b0f99f MIPS: start.S: set sp register directly
The current code uses two instructions to load
the stack pointer into the 'sp' register.

This results in the following assembly code:

    468:   3c088040        lui     t0,0x8040
    46c:   251d0000        addiu   sp,t0,0

The first instuction loads the stack pointer into
the 't0' register then the value of the 'sp' register
is computed by adding zero to the value of the 't0'
register. The same issue present on the 64-bit version
as well:

    56c:   3c0c8040        lui     t0,0x8040
    570:   659d0000        daddiu  sp,t0,0

Change the code to load the stack pointer directly
into the 'sp' register. The generated code is functionally
equivalent to the previous version but it is simpler.

  32-bit:
    468:   3c1d8040        lui     sp,0x8040

  64-bit:
    56c:   3c1d8040        lui     sp,0x8040

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-27 16:39:51 +01:00
Gabor Juhos
5b7dd8163d MIPS: start.S: fix boundary check in relocate_code
The loop code copies more data with one than
necessary due to the 'ble' instuction. Use the
'blt' instruction instead to fix that.

Due to the lack of suitable hardware the Xburst
specific code is compile tested only. However the
change is quite obvious.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-27 16:39:43 +01:00
Gabor Juhos
14fdd1a8bf MIPS: start{, 64}.S: fill branch delay slots with NOP instructions
The romReserved and romExcHandle handlers are
accessed by a branch instruction however the
delay slots of those instructions are not filled.

Because the start.S uses the 'noreorder' directive,
the assembler will not fill the delay slots either,
and leads to the following assembly code:

  0000056c <romReserved>:
   56c:   1000ffff        b       56c <romReserved>

  00000570 <romExcHandle>:
   570:   1000ffff        b       570 <romExcHandle>

In the resulting code, the second branch instruction
is placed into the delay slot of the first branch
instruction, which is not allowed on the MIPS
architecture.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-22 21:09:34 +01:00
Zhi-zhou Zhang
0d69d918ab MIPS: fix a latent bug on initialize $gp
If bal is 8 bytes aligned, the _gp will not be 8 bytes aligned.
then the following ld insntrustion generates a Adel exception.
So here make _gp be always aligned in 8 bytes.

Signed-off-by: Zhi-zhou Zhang <zhizhou.zh@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-12-08 21:33:07 +01:00
Zhi-zhou Zhang
32afad783e MIPS: add board qemu-mips64 support
Both big-endian and little-endian are tested with below commands:
Rom version: (Default, Now we config it as rom version)
qemu-system-mips64el -M mips -bios u-boot.bin -cpu MIPS64R2-generic -nographic
qemu-system-mips64 -M mips -bios u-boot.bin -cpu MIPS64R2-generic -nographic
Ram version:
qemu-system-mips64el -M mips -cpu MIPS64R2-generic -kernel u-boot -nographic
qemu-system-mips64 -M mips -cpu MIPS64R2-generic -kernel u-boot -nographic

Signed-off-by: Zhizhou Zhang <etou.zh@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-10-16 15:02:08 +02:00