Commit graph

6176 commits

Author SHA1 Message Date
Jean-Christophe PLAGNIOL-VILLARD
55195773ea miiphybb: move to drivers/net/phy
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-29 12:25:02 +02:00
Jean-Christophe PLAGNIOL-VILLARD
e831403599 soft_spi: move to drivers/spi
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-29 12:25:02 +02:00
Jean-Christophe PLAGNIOL-VILLARD
4d75e0aa9c soft_i2c: move to drivers/i2c
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-29 12:25:02 +02:00
Jean-Christophe PLAGNIOL-VILLARD
717a222229 gunzip: move to lib_generic
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-29 12:25:01 +02:00
Wolfgang Ocker
52aef8f9ba ppc4xx: NAND configuration
Made NAND bank configuration setting a config variable.

Signed-off-by: Wolfgang Ocker <weo@reccoware.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-08-29 10:21:31 +02:00
Victor Gallardo
5bc542a593 ppc4xx: fix UIC external_interrupt hang on UIC0
This patch fixes a UIC external_interrupt hang if critical or non-critical
interrupt is set at the same time as a normal interrupt is set on UIC0.

Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-08-29 10:13:59 +02:00
Prodyut Hazarika
04737d5ffd ppc4xx: Optimizations/Cleanups for IBM DDR2 Memory Controller
Removed Magic numbers from Initialization preload registers
Tested with Kilauea, Glacier, Canyonlands and Katmai boards
About 5-7% improvement seen for LMBench memtests

Signed-off-by: Prodyut Hazarika <phazarika@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-08-29 10:01:36 +02:00
John Rigby
8a490422be ADS5121: Fix NOR and CPLD ALE timing for rev 2 silicon
MPC5121 rev 2 silicon has a new register for controlling how long
CS is asserted after deassertion of ALE in multiplexed mode.

The default is to assert CS together with ALE.  The alternative
is to assert CS (ALEN+1)*LPC_CLK clocks after deassertion of ALE.

The default is wrong for the NOR flash and CPLD on the ADS5121.

This patch turns on the alternative for CS0 (NOR) and CS2 (CPLD)
it does so conditionally based on silicon rev 2.0 or greater.

Signed-off-by: Martha J Marx <mmarx@silicontkx.com>
Signed-off-by: John Rigby <jrigby@freescale.com>
2008-08-28 13:36:43 -06:00
TsiChung Liew
5d9a5efa4b Add I2C frequency dividers for ColdFire
The existing I2C freqency dividers for FDR does not apply
to ColdFire platforms; thus, a seperate table is added
based on MCF5xxx Reference Manual

Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: Tabi Timur <timur@freescale.com>
2008-08-28 09:16:54 -06:00
TsiChung Liew
eec567a67e ColdFire: I2C fix for multiple platforms
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-28 09:16:54 -06:00
TsiChung Liew
d53cf6a9c7 ColdFire: Add CONFIG_MII_INIT for M5272C3
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-28 09:16:54 -06:00
TsiChung Liew
f78ced3028 ColdFire: Multiple fixes for MCF5445x platforms
Add FEC pin set and mii reset in __mii_init(). Change
legacy flash vendor from 2 to AMD LEGACY (0xFFF0),
change cfi_offset to 0, and change CFG_FLASH_CFI to
CONFIG_FLASH_CFI_LEGACY. Correct M54451EVB and
M54455EVB env settings in configuration file.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-28 09:16:54 -06:00
TsiChung Liew
454e725b3a ColdFire: Change the SDRAM BRD2WT timing from 3 to 7
The user manuals recommend 7.

Signed-off-by: Kurt Mahan <kmahan@freescale.com>
Acked-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-28 09:16:53 -06:00
TsiChung Liew
79e0799cf6 ColdFire: Raise uart baudrate to 115200 bps
M5249EVB, M5271EVB, M5272C3, M5275EVB and M5282EVB platforms
uart baudrate increase from 19200 to 115200 bps

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-28 09:16:53 -06:00
TsiChung Liew
ab6ba84268 ColdFire: Fix board.c warning message
Implicit declaration of nand_init() warning message

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-28 09:16:53 -06:00
Wolfgang Denk
33aa4eac66 Merge branch 'master' of /home/wd/git/u-boot/custodians 2008-08-28 00:39:43 +02:00
Wolfgang Denk
ae9e1b579e Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxx 2008-08-28 00:39:27 +02:00
Kumar Gala
5798b1c465 FSL DDR: Remove duplicate setting of cs0_bnds register on 86xx.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-28 00:35:56 +02:00
Wolfgang Denk
0ba6bfef06 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2008-08-28 00:26:52 +02:00
Heiko Schocher
258c37b147 mpc52xx: added support for the MPC5200 based MUC.MC52 board from MAN.
Signed-off-by: Heiko Schocher <hs@denx.de>
2008-08-27 16:03:48 -06:00
Kumar Gala
9cff4448a9 mpc85xx: remove redudant code with lib_ppc/interrupts.c
For some reason we duplicated the majority of code in lib_ppc/interrupts.c
not show how that happened, but there is no good reason for it.

Use the interrupt_init_cpu() and timer_interrupt_cpu() since its why
they exist.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:44:10 -05:00
Kumar Gala
9490a7f1a9 mpc85xx: Add support for the MPC8536DS reference board
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Dejan Minic <minic@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:54 -05:00
Kumar Gala
ef50d6c06e mpc85xx: Add support for the MPC8536
The MPC8536 Adds SDHC and SATA controllers to the PQ3 family.  We
also have SERDES init code for the 8536.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Dejan Minic <minic@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-08-27 11:43:54 -05:00
Kumar Gala
129ba616b3 mpc85xx: Add support for the MPC8572DS reference board
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:53 -05:00
Kumar Gala
457caecdbc FSL DDR: Remove old SPD support from cpu/mpc85xx
All 85xx boards have been converted to the new code so we can
remove the old SPD DDR setup code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:53 -05:00
Kumar Gala
0e7927db13 FSL DDR: Convert STXSSA to new DDR code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:53 -05:00
Kumar Gala
c360d9b970 FSL DDR: Convert STXGP3 to new DDR code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:52 -05:00
Kumar Gala
8e55313b7a FSL DDR: Convert SBC8560 to new DDR code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:52 -05:00
Kumar Gala
9658bec2e8 FSL DDR: Convert MPC8540EVAL to new DDR code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:52 -05:00
Kumar Gala
6bfa8f723c FSL DDR: Convert PM856 to new DDR code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:51 -05:00
Kumar Gala
d53bd3e17b FSL DDR: Convert PM854 to new DDR code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:51 -05:00
Kumar Gala
33b9079ba2 FSL DDR: Convert sbc8548 to new DDR code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:51 -05:00
Kumar Gala
a947e4c7eb FSL DDR: Convert atum8548 to new DDR code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:51 -05:00
Kumar Gala
be0bd8234b FSL DDR: Convert socrates to new DDR code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:51 -05:00
Kumar Gala
1167a2fd56 FSL DDR: Convert MPC8544DS to new DDR code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:50 -05:00
Jon Loeliger
e6f5b35b41 FSL DDR: Convert MPC8568MDS to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:50 -05:00
Jon Loeliger
e31d2c1e2b FSL DDR: Convert MPC8548CDS to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:50 -05:00
Jon Loeliger
aa11d85cf3 FSL DDR: Convert MPC8541CDS to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:50 -05:00
Jon Loeliger
2b40edb10d FSL DDR: Convert MPC8555ADS to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:49 -05:00
Jon Loeliger
8b625114e8 FSL DDR: Convert MPC8560ADS to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:49 -05:00
Kumar Gala
9617c8d49a FSL DDR: Convert MPC8540ADS to new DDR code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:48 -05:00
Kumar Gala
2a6c2d7ab2 FSL DDR: Add 85xx specific register setting
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:48 -05:00
Kumar Gala
6fb1b73468 FSL DDR: Add e500 TLB helper for DDR code
Provide a helper function that board code can call to map TLBs when
setting up DDR.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:48 -05:00
Andrew Dyer
d26b739afe dm9000 remove dead external phy support, gpio fix
dm9000 has code to detect and initialize external phy parts, but later
on in the code the part is forced to use the internal phy
unconditionally.  Remove the unused/untested code.

change the GPIO initialization so that only the GPIO used as an
internal phy reset (hardwired in the chip) is set as an output.  The
remaining GPIO need to be handled by board specific code to prevent
possible drive conflicts.  Set as inputs for safety.

replace a few magic numbers with defines

Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-08-26 23:08:19 -07:00
Peter Tyser
a1573db0c0 Standardize bootp, tftpboot, rarpboot, dhcp, and nfs command descriptions
cmd_net.c command descriptions were updated to describe the optional
hostIPaddr argument.  The dhcp command help message was also updated
to more closely reflect the other commands in cmd_net.c

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-08-26 22:46:23 -07:00
Remy Bohmer
51dfe1382e Fix bogus error message in the DHCP handler
The DHCP handler has 1 state that is not listed in this case, causing a
failure message when there is actually no failure.

Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-08-26 22:44:27 -07:00
Remy Bohmer
61365501a0 Fix compile error when CONFIG_BOOTP_RANDOM_DELAY is set.
The option CONFIG_BOOTP_RANDOM_DELAY does not compile, because of a
missing extern inside the net/bootp.h header

Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-08-26 22:44:27 -07:00
TsiChung Liew
1803f7f91f ColdFire: Add FEC Buffer descriptors in SRAM
Add FEC Buffer descriptors and data buffer in SRAM for
faster execution and access.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-08-26 22:41:51 -07:00
TsiChung Liew
429be27ce1 Fix ColdFire FEC warning messages
Types mismatch and implicit declaration of icache_invalid()
warning messages

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-08-26 22:40:02 -07:00
Ben Warren
6a00217109 Moved initialization of SKGE Ethernet driver to board code.
The only board using this driver is the SL8245 board.
Removed initialization for the driver from net/eth.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-08-26 22:18:08 -07:00