Commit graph

34 commits

Author SHA1 Message Date
Jon Loeliger
25eedb2c19 FSL: Clean up board/freescale/common/Makefile
Each file that can be built here now follows some
CONFIG_ option so that they are appropriately built
or not, as needed.  And CONFIG_ defines were added
to various board config files to make sure that happens.

The other board/freescale/*/Makefiles no longer need
to reach up and over into ../common to build their
individually needed files any more.

Boards that are CDS specific were renamed with cds_ prefix.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-03-26 11:43:04 -05:00
Kumar Gala
f69766e4b5 85xx: Add the concept of CFG_CCSRBAR_PHYS
When we go to 36-bit physical addresses we need to keep the concept of
the physical CCSRBAR address seperate from the virtual one.

For the majority of boards CFG_CCSBAR_PHYS == CFG_CCSRBAR

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-26 11:43:03 -05:00
Kumar Gala
7dc358bb0d 85xx: Get ride of old TLB setup code
Now that all boards have been converted, remove old config code and the
config option for the new style.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-17 02:19:18 -06:00
Kumar Gala
0db37dc2ee 85xx: Convert MPC8541/MPC8555/MPC8548 CDS to new TLB setup
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-17 02:08:24 -06:00
Kumar Gala
2cfaa1aa1a 85xx: convert MPC8541/MPC8555/MPC8548 CDS over to use new LAW init code
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-16 23:21:55 -06:00
Kumar Gala
b009f3eca9 85xx: Remove cache config from configs.h
Either use the standard defines in asm/cache.h or grab the information
at runtime from the L1CFG SPR.

Also, minor cleanup in cache.h to make the code a bit more readable.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-09 16:25:04 -06:00
Kumar Gala
8ff3de61fc Handle MPC85xx PCIe reset errata (PCI-Ex 38)
On the MPC85xx boards that have PCIe enable the PCIe errata fix.
(MPC8544DS, MPC8548CDS, MPC8568MDS).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11 22:34:20 -06:00
Kumar Gala
82ac8c9714 Update Freescale MPC85xx ADS/CDS/MDS board config
* Enabled CONFIG_CMD_ELF

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11 22:34:20 -06:00
Kumar Gala
22abb2d2ea Update Freescale MPC85xx ADS/CDS/MDS board config
* Removed some misc environment setup
* Enabled CONFIG_CMDLINE_EDITING

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11 22:34:20 -06:00
Kumar Gala
b90d254976 Update MPC85xx CDS to use libfdt
Updated the MPC85xx CDS config to use libfdt and assume use of aliases for
ethernet, pci, and serial for the various fixups that are done.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11 22:34:19 -06:00
Kumar Gala
7600d47b8f Improve handling of PCI interrupt device tree fixup on MPC85xx CDS
On the MPC85xx CDS we have two issues:

1. The device tree fixup code did not check to see if the property we are
trying to update is actually found.  Its possible that it would update
random memory starting at 0.

2. Newer Linux kernel's have moved the location of the PCI nodes to be
sibilings of the soc node and not children.  The explicit PATH to the PCI
node would not be found for these device trees.  Add the ability to handle
both paths.  In the future we shouldn't handle such fixups by explicit path.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-19 11:25:01 -05:00
Ed Swarthout
4bf4abb8a4 8548cds fixes
Restore CONFIG_EXTRA_ENV_SETTINGS definition which contains the
correct consoledev needed for linux boot.
Standardize on fdt{file,addr} var to hold dtb file name.

Set PCI inbound memory region from CFG_MEMORY_{BUS,PHYS}.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
2007-08-29 00:11:59 -05:00
Kim Phillips
3bb342fc85 fdt: remove unused OF_FLAT_TREE_MAX_SIZE references
and make some minor corrections to the FDT part of the README.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-29 01:46:25 +02:00
Andy Fleming
10327dc554 Add CONFIG_HAS_ETH0 to all boards with TSEC
The 85xx code now relies on CONFIG_HAS_ETH0 to determine whether
to update TSEC1's device-tree node, so we need to add it
to all the boards with TSECs.  Do this for 83xx and 86xx, too,
since they will eventually do something similar.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-08-16 16:35:02 -05:00
Andy Fleming
3a79013e2a Define tsec flag values in config files
The tsec_info structure and array has a "flags" field for each
ethernet controller.  This field is the only reason there are
settings.  Switch to defining TSECn_FLAGS for each controller
in the config header, and we can greatly simplify the array, and
also simplify the addition of future boards.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-08-16 12:12:49 +02:00
Randy Vinson
7f3f2bd2dc 85xxCDS: Add make targets for legacy systems.
The PCI ID select values on the Arcadia main board differ depending
on the version of the hardware. The standard configuration supports
Rev 3.1. The legacy target supports Rev 2.x.

Signed-off-by Randy Vinson <rvinson@mvista.com>
2007-08-14 01:51:39 -05:00
Andy Fleming
6c543597bb Fix minor 85xx warnings
Some patches had inserted warnings into the build:
* mpc8560ads declared data without using it
* cpu_init declared ecm and immap without using it in all CONFIGs
* MPC8548CDS.h had its default filenames changed so that they contained
  "\m" in the paths.  Made the defaults not Windows-specific (or
  anything-specific)

Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-08-14 01:39:14 -05:00
Ed Swarthout
f2cff6b104 8548cds PCIE support.
Make the early L1 cache stack region guarded to prevent speculative
fetches outside the locked range.

Use _PHYS defines, not _MEM for cpu-side PCI memory mapped regions.
init.S whitespace cleanup.

Allow TEXT_BASE value to be specified on command line.  This allows it
to be set to 0xfffc0000 which cuts the uboot binary in half.

Clear and enable lbc and ecm errors.

Update last_busno in device-tree for pci and pcie.

Remove load of obsolete cpu/mpc85xx/pci.0

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2007-08-14 01:39:00 -05:00
Jon Loeliger
659e2f6736 include/configs/[J-O]*: Cleanup BOOTP and lingering CFG_CMD_*.
Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
used to be included but CONFIG_BOOTP_MASK was not defined.

Remove lingering references to CFG_CMD_* symbols.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-07-10 09:10:49 -05:00
Jon Loeliger
2835e518c9 include/configs: Use new CONFIG_CMD_* in 85xx board config files.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-07-05 03:41:29 +02:00
Kim Phillips
255a3577c8 Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx
For all practical u-boot purposes, TSECs don't differ throughout the
mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-05-17 00:07:21 +02:00
Andy Fleming
ffa621a0d1 Cleaned up some 85xx PCI bugs
* Cleaned up the CDS PCI Config Tables and added NULL entries to
  the end
* Fixed PCIe LAWBAR assignemt to use the cpu-relative address
* Fixed 85xx PCI code to assign powar region sizes based on the
  config values (rather than hard-coding them)
* Fixed the 8548 CDS PCI2 IO to once again have 0 as the base address

Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-05-02 15:50:13 -05:00
Sergei Shtylyov
362dd83077 Fix PCI I/O space mapping on Freescale MPC85x0ADS
The PCI I/O space mapping for Freescale MPC8540ADS board was broken by commit
52c7a68b8d which failed to update the #define's
describing the local address window used for the PCI I/O space accesses -- fix
this and carry over the necessary changes into the MPC8560ADS code since the
PCI I/O space mapping was also broken for this board (by the earlier commit
087454609e).  Add the comments clarifying how
the PCI I/O space must be mapped to all the MPC85xx board config. headers.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>

 board/mpc8540ads/init.S      |    4 ++--
 board/mpc8560ads/init.S      |    4 ++--
 include/configs/MPC8540ADS.h |    5 ++---
 include/configs/MPC8541CDS.h |    2 +-
 include/configs/MPC8548CDS.h |    2 +-
 include/configs/MPC8560ADS.h |    8 ++++----
 6 files changed, 12 insertions(+), 13 deletions(-)
2007-04-23 19:58:28 -05:00
ebony.zhu@freescale.com
39b18c4f3e u-boot: Disables MPC8548CDS 2T_TIMING for DDR by default
This patch disables MPC8548CDS 2T_TIMING for DDR by default.

Signed-off-by:Ebony Zhu <ebony.zhu@freescale.com>
2007-04-23 19:58:27 -05:00
Zang Roy-r61911
41fb7e0f1e u-boot: Enable PCI function and add PEX & rapidio memory map on MPC8548CDS board
Enable PCI function and add PEX & rapidio memory map on MPC8548CDS
board.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
2007-04-23 19:58:27 -05:00
Wolfgang Denk
d97370feca Merge with /home/wd/git/u-boot/master
(Conflicts between Jon Loeliger's and Matthew McClintock's tree
 were resolved by in favour of Jon's version.)
2006-10-24 17:08:31 +02:00
Jon Loeliger
2047672684 Converted all 85xx boards to use a common FSL I2C driver.
Introduced COFIG_FSL_I2C to select the common FSL I2C driver.
And removed hard i2c path from a few u-boot.lds scipts too.
Minor whitespace cleanups along the way.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-10-20 15:50:15 -05:00
Andy Fleming
8272dc2f58 Updated config headers to add default FDT-based booting 2006-09-19 09:42:18 -05:00
Andy Fleming
09f3e09e9e Add support for eTSEC 3 & 4 on 8548 CDS
* Added support for using eTSEC 3 and eTSEC 4 on the 8548 CDS.
  This will only work on rev 1.3 boards (but doesn't break older boards)
* Cleaned up some comments to reflect the expanded role of tsec
  in other systems
2006-09-19 09:41:48 -05:00
Matthew McClintock
bf1dfffd8c * Added VIA configuration table
* Added support for PCI2 on CDS
  Patch by Andy Fleming 17-Mar-2006

Signed-off-by: Andy Fleming <afleming@freescale.com>
2006-08-09 13:50:56 -05:00
Matthew McClintock
0e16387db1 * Add Flat Dev Tree construction for MPC85xx ADS and CDS boards Patch by Jon Loeliger 17-Jan-2006
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-08-09 13:50:30 -05:00
Matthew McClintock
cbfc7ce756 * Added VIA configuration table
* Added support for PCI2 on CDS
  Patch by Andy Fleming 17-Mar-2006

Signed-off-by: Andy Fleming <afleming@freescale.com>
2006-06-28 10:46:13 -05:00
Matthew McClintock
40d5fa35d0 * Add Flat Dev Tree construction for MPC85xx ADS and CDS boards
Patch by Jon Loeliger 17-Jan-2006

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-06-28 10:43:36 -05:00
Jon Loeliger
d9b94f28a4 * Patch by Jon Loeliger, 2005-05-05
Implemented support for MPC8548CDS board.
  Added DDR II support based on SPD values for MPC85xx boards.
  This roll-up patch also includes bugfies for the previously
  published patches:
    DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O
2005-07-25 14:05:07 -05:00