Commit graph

75774 commits

Author SHA1 Message Date
Michal Simek
53f5d1688e firmware: zynqmp: fix write to an uninitialised pointer in ipi_req()
When a caller is not interested in the returned message, the ret_payload
pointer is set to NULL in the u-boot-sources. In this case, under EL3, the
memory from address 0x0 would be overwritten by ipi_req() with the returned
IPI message, damaging the original data under this address. The patch, in
case ret_payload is NULL, assigns the pointer to the array holding the IPI
message being sent.

Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Adrian Fiergolski <Adrian.Fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/3178ff7651948270b714daa4adad48b94eaca9ba.1634309856.git.michal.simek@xilinx.com
2021-10-21 08:54:50 +02:00
Michal Simek
b05cc389ba firmware: zynqmp: Handle errors from ipi_req properly
There are multiple errors what can happen in ipi_req but they are not
propagated properly. That's why propage all error properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Adrian Fiergolski <Adrian.Fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/7ac4f3b2104f04c72d287c46d1ccbce20f138fd4.1634309856.git.michal.simek@xilinx.com
2021-10-21 08:54:49 +02:00
Michal Simek
eafdcda4a8 net: gem: Disable broadcast setting
There is no need for GEM to accepts broadcast packets because they are not
handled by u-boot anyway. That's why use HW IP feature and don't waste time
on these packats which will be dropped anyway.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Link: https://lore.kernel.org/r/0e236c3a6514a2a633ef3a5b71a967c46f7fbae7.1634303007.git.michal.simek@xilinx.com
2021-10-21 08:53:55 +02:00
Michal Simek
599becb0ae arm64: zynqmp: Fix sgmii clock input freq for p-a2197
Input frequency for sgmii is 125MHz on all Xilinx designs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/87153c59cc526f5955b3bff3db11027b5848c042.1634302099.git.michal.simek@xilinx.com
2021-10-21 08:52:30 +02:00
Michal Simek
d2d14383ba arm64: zynqmp: Add support for DLC21 (Smartlynq+) board
DLC21 is used as fast jtag cable. The patch adds support for this board
from PS perspective. The most interesting part on the board is seps525 oled
display. Also i2c, gpio, ethernet, uart, SD and eMMC are tested.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/3d35cd6a11cffc7456e21a88b214cc965734e852.1634231268.git.michal.simek@xilinx.com
2021-10-21 08:51:33 +02:00
Liam Beguin
181419446a arm64: zynqmp: allow overriding board name
There is no need to use zynqmp name as SYS_BOARD for all boards.
The patch is adding an option to change it.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Link: https://lore.kernel.org/r/20211020152518.3511912-1-liambeguin@gmail.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-10-21 08:51:00 +02:00
Jorge Ramirez-Ortiz
398a74ae33 zynqmp: restore the jtag interface
When boot.bin is configured for secure boot the CSU will disable the
JTAG interface on all cases.

Some boards might rely on this interface for flashing to QSPI in which
case those systems might end up bricked during development.

This commit will restore the interface under CSU control

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Link: https://lore.kernel.org/r/20211013134800.19452-1-jorge@foundries.io
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-10-21 08:51:00 +02:00
T Karthik Reddy
a3e3d4698e mmc: zynq_sdhci: Add xilinx_pm_request weak function
Mini emmc does not use any pmufw and ZYNQMP_FIRMWARE is disabled.
xilinx_pm_request() will not be compiled and causes undefined reference to
`xilinx_pm_request' error. So add a weak function in zynq_sdhci.c file.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1633086518-32636-1-git-send-email-t.karthik.reddy@xilinx.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-10-21 08:50:59 +02:00
Tom Rini
fb1018106a Merge branch '2021-10-19-assorted-changes'
- Assorted minor fixes and a new GPIO driver
2021-10-19 20:45:12 -04:00
Samuel Holland
17864406a4 clk: fixed_rate: add dummy disable() function
commit 6bf6d81c11 ("clk: fixed_rate: add dummy enable() function")
implemented .enable, so fixed rate clocks can be used where drivers
might call clk_enable(). Implement the .disable op for the same reason;
some drivers, e.g. USB PHYs, may attempt to disable clocks at runtime.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-10-19 11:25:25 -04:00
Usama Arif
b20b16a794 arm: total_compute: increase DRAM to 8GB
The extra 6GB start at 0x8080000000.

Signed-off-by: Usama Arif <usama.arif@arm.com>
2021-10-19 11:25:25 -04:00
Tom Rini
4f03a4c766 tools: Stop re-defining -std= when building tools
While we intentionally set -std=gnu11 for building host tools, and have
for quite some time, we never dropped -std=gnu99 from tools/Makefile.
This resulted in passing -std=gnu11 ... -std=gnu99 when building, and
gnu99 would win.  This in turn would result now in warnings such as:
tools/mkeficapsule.c:25:15: warning: redefinition of typedef 'u32' is a C11 feature [-Wtypedef-redefinition]
typedef __u32 u32;
              ^

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-19 11:25:25 -04:00
Amjad Ouled-Ameur
1860bdca6a configs: am335x_evm: enable CONFIG_CLK_TI_CTRL
This enables the clock controller driver support on TI's SoCs. This will
fix this GPIO issue at boot time:
request_and_set_gpio: Unable to request GPIO_PR1_MII_CTRL
request_and_set_gpio: Unable to request GPIO_MUX_MII_CTRL
request_and_set_gpio: Unable to request GPIO_FET_SWITCH_CTRL
request_and_set_gpio: Unable to request GPIO_PHY_RESET

This issue comes from the fact that the clock controller is not probed.

Enable the TI's clock controller driver support to solve this.

Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
2021-10-19 11:25:24 -04:00
Hannes Schmelzer
bba76a17bd drivers/gpio: add support for MAX7320 i2c i/o expander
This commit adds support for the MAX7320 (and clones) gpio expander.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2021-10-19 11:25:24 -04:00
Simon Glass
93b1965322 Makefile: Only build dtc if needed
At present U-Boot always builds dtc if CONFIG_OF_CONTROL is defined, even
when DTC is provided. The built dtc is not actually used, so this is a
waste of time.

Update the Makefile logic to build dtc only if one is not provided to the
build with the DTC variable. Add documentation to explain this.

This saves about 3.5 seconds of elapsed time on a clean build of
sandbox_spl for me.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-19 11:23:07 -04:00
Simon Glass
d7faa082a5 Revert "kbuild: remove unused dtc-version.sh script"
We need this to make building dtc optional. It makes no sense to build our
own dtc if the system one works correctly.

This reverts commit ddb87a0b40.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-19 11:23:07 -04:00
Tom Rini
9c79815c5c Merge branch '2021-10-18-OF_xxx-cleanup'
- Clean things up and rework such that we can drop OF_PRIOR_STAGE
2021-10-19 09:07:07 -04:00
Ilias Apalodimas
d6f8ab30a2 treewide: Remove OF_PRIOR_STAGE
The previous patches removed OF_PRIOR_STAGE from the last consumers of the
Kconfig option.  Cleanup any references to it in documentation,  code and
configuration options.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-18 13:19:50 -04:00
Ilias Apalodimas
2ea63271e5 board: arm: Remove OF_PRIOR_STAGE from the remaining Arm boards
At some point back in 2018 prior_stage_fdt_address and OF_PRIOR_STAGE got
introduced,  in order to support a DTB handed over by an earlier stage boo
loader.  However we have another option in the Kconfig (OF_BOARD) which has
identical semantics.

So let's remove the option in an effort to simplify U-Boot's config and DTB
management,  and use OF_BOARD instead.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-18 13:19:50 -04:00
Ilias Apalodimas
2e8d2f8843 riscv: Remove OF_PRIOR_STAGE from RISC-V boards
At some point back in 2018 prior_stage_fdt_address and OF_PRIOR_STAGE got
introduced,  in order to support a DTB handed over by an earlier stage boo
loader.  However we have another option in the Kconfig (OF_BOARD) which has
identical semantics.

On RISC-V some of the boards pick up the DTB from a1 and copy it in their
private gd_t.  Apart from that they copy it to prior_stage_fdt_address,  if
the Kconfig option is selected, which is unnecessary.

So let's switch the config option for those boards to OF_BOARD and define
the required board_fdt_blob_setup() for them.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-18 13:19:50 -04:00
Tom Rini
d990f7d75d Merge tag 'u-boot-rockchip-20211015' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Fix for Rockchip mmc HS400 mode;
- Fix for px30 board Odroid Go;
- rockchip_sfc update;
- rk3568 clk update;
- doc fix;
2021-10-17 21:13:49 -04:00
Tom Rini
6a86f12126 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-tegra
On merge, fixup order of fdtdec_add_reserved_memory parameters in
arch/arm/cpu/armv8/fsl-layerscape/soc.c

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-15 18:30:33 -04:00
Tom Rini
86acfc9664 Merge branch '2021-10-15-Kconfig-migrations'
- Assorted Kconfig migration patches
2021-10-15 13:45:15 -04:00
Tom Rini
cdcbd593ad configs: Resync with savedefconfig
Resync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-15 09:42:22 -04:00
Marek Behún
56882dc4cb Convert CONFIG_USB_EHCI_IS_TDI to Kconfig
On mvebu this is defined if and only if !ARM64.

Otherwise it is defined for boards with ARCH_MX23, ARCH_TEGRA and
ARCH_ZYNQ, and also for SOC_AR934X (tplink_wdr4300).

Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-15 09:42:22 -04:00
Marek Behún
645a0afb32 Drop CONFIG_USB_EHCI_KIRKWOOD
This config option doesn't do anything.

nas220 uses USB_EHCI_MARVELL.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-15 09:42:22 -04:00
Marek Behún
7b805009fa Convert CONFIG_USB_EHCI_MXS to Kconfig
This option is only used for
  mx23evk_defconfig
  mx23_olinuxino_defconfig
which are the only i.MX23 boards.

Add depend on ARCH_MX23 and default to y.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-15 09:42:22 -04:00
Marek Behún
92832045c5 Rename CONFIG_EHCI_IS_TDI to CONFIG_USB_EHCI_IS_TDI
In preparation for moving this option to Kconfig, rename it to be
consistent with other USB EHCI Kconfig options.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-15 09:42:22 -04:00
Yifeng Zhao
022f552704 mmc: rockchip_sdhci: enable strobe line for HS400
The default configuration of rk3399 EMMC PHY does not enable the
strobe line, and EMMC controller will got data transmission error
at HS400 mode.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:57:41 +08:00
Elaine Zhang
f2cdd44adb clk: rockchip: rk3568: update clks
fix up ppll init freq.
support tclk_emmc.
add freq (26M) for mmc device.
fix up the sfc clk rate unit error.

Change in V2:
remove change id.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:57:31 +08:00
Jon Lin
24c627b57a spi: rockchip_sfc: Using read_poll
Using read_poll logic.

Tested-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:57:11 +08:00
Jon Lin
51f29239b7 spi: rockchip_sfc: Implement set_speed logic
Set clock related processing into set_speed logic. And Optimize
printing format.

Tested-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:57:11 +08:00
Chris Morgan
193ab22797 rockchip: px30: sync serial flash controller bindings with mainline
The devicetree submitted and approved for the mainline linux kernel is
slightly different than the one present here. This syncs both
devicetrees (for the Rockchip SFC node at least) present on the PX30
and the Odroid Go Advance. Changes include renaming the flash node,
reordering the values in the SFC node for the rk3326-odroid-go2,
changing the name of the cs pinctrl node to cs0, and updating the
u-boot specific tree to utilize the new flash node value.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:56:55 +08:00
Johan Jonker
3ad88ecc6b doc: rockchip: write all brand names with a capital
Brand names are supposed to be written with a capital,
so change them all.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:56:43 +08:00
Johan Jonker
734dcdcbf2 doc: rockchip: sort rockchip support list for rk3188
In the list of mainline U-boot supported Rockchip boards
rk3188 is placed below under the name rv3188. Give back it's
original name and sort the list in alphabetical order.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:56:43 +08:00
Peter Robinson
63e13530fc rockchip: rk33xx: Drop ROCKCHIP_USB2_PHY on boards without it
The 64 bit rk33xx chips don't have the ROCKCHIP_USB2_PHY IP so
drop the configs as they were likely copied over from other
boards during enablement.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:56:30 +08:00
Chris Morgan
8d43e2412a rockchip: board: remove SCLK_GPU from U-Boot DT
Starting with commit 92f1e9a4b3 ("clk: Detect failure to set
defaults") the clk driver for the PX30 would fail to probe for the
Odroid Go Advance. This patch is to remove the clock for the GPU from
the U-Boot specific devicetree, as that clock is not supported by the
U-Boot clk_px30 driver.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:56:09 +08:00
Chris Morgan
ef120e0b30 rockchip: px30: add support for setting cpll clock
Starting with commit 92f1e9a4b3 ("clk: Detect failure to set
defaults") the clk driver for the PX30 for the Odroid Go Advance would
no longer probe correctly, because setting the cpll and gpu clocks are
not supported with the clk_px30 U-Boot driver. This adds support for
setting the cpll clock to the clk_px30 driver. Another patch will
update the U-Boot specific device-tree to remove the GPU clock which is
not used by U-Boot.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:56:09 +08:00
Patrick Delaunay
42d32c3552 Remove unused CONFIG_CONS_NONE
Remove the latest reference of CONFIG_CONS_NONE in code

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-15 07:55:52 -04:00
Patrick Delaunay
0d76e4ec8d Remove unused CONFIG_SYS_FLASH_AMD_CHECK_DQ7
Remove the latest reference of CONFIG_SYS_FLASH_AMD_CHECK_DQ7 in code

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-15 07:55:52 -04:00
Patrick Delaunay
155fb86e2c Remove unused CONFIG_NO_RELOCATION
Remove the latest reference of CONFIG_NO_RELOCATION in code

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-15 07:55:17 -04:00
Patrick Delaunay
e7421b0e41 am33x: Remove unused define CONFIG_MUSB_HOST
This define was left over from a previous revision, and was never used.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-15 07:55:17 -04:00
Patrick Delaunay
ff07cc9ed1 scripts: remove some configs in config_whitelist.txt
Remove some config finishing by _ badly added by
scripts/build-whitelist.sh when joker is used in comments.

for example:
  doc/uImage.FIT/command_syntax_extensions.txt:
     ... #ifdef CONFIG_OF_*  |	...

  cmd/nvedit.c:# error Define one of CONFIG_ENV_IS_IN_{EEPROM| \
     FLASH|MMC|FAT|EXT4|\

Remove also configs only used in comments:
- CONFIG_BOOGER in include/linux/kconfig.h
- CONFIG_COMMANDS
- CONFIG_INIT_IGNORE_ERROR
- CONFIG_REG_*
- CONFIG_HOTPLUG : drivers/watchdog/omap_wdt.c:18

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2021-10-15 07:55:17 -04:00
Tom Rini
2d34be0a9e Merge branch '2021-10-14-assorted-updates'
- Update to LLVM-13 in CI, assorted PCI fixes and pytest in CI
  improvements
2021-10-15 07:50:59 -04:00
Holger Brunck
35b2b5f04c board/km: update MAINTAINERS files
Update the e-mail addresses and person responsible.

Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
CC: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
CC: Rainer Boschung <rainer.boschung@hitachienergy.com>
2021-10-14 19:45:07 -04:00
Simon Glass
35839eda8b pytest: Show a message when sandbox crashes
When a test hands on a real board there is no way on the console to obtain
any information about why it hung.

With sandbox we can actually find out that it died and get a signal or
exit code. Add this to make it easier to figure out what happened.

So instead of:

test/py/u_boot_spawn.py:171: in expect
    c = os.read(self.fd, 1024).decode(errors='replace')
E   OSError: [Errno 5] Input/output error

We get:

test/py/u_boot_spawn.py:171: in expect
    c = os.read(self.fd, 1024).decode(errors='replace')
E   ValueError: U-Boot exited with signal 11 (Signals.SIGSEGV)

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-14 19:45:07 -04:00
Pali Rohár
c3aea68705 pci: Fix printf format for regions
Correct printf format for unsigned long long is %llx and not %llxx.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-14 19:45:07 -04:00
Pali Rohár
43dad07cd4 pci: Fix showing registers
Header type is 7-bit number so use all 7 bits when detecting header type
and not only 2 bits.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-14 19:45:07 -04:00
Pali Rohár
e6335d3eaa pci: Fix showing bars
Header type is 7-bit number so properly clear upper 8th bit which
indicates multifunction device.

And do not try to show bars for unsupported header types.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-14 19:45:07 -04:00
Pali Rohár
c7cd6f734b pci: Fix configuring BARs
Number of BARs is defined by header type, not by class code.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-14 19:45:07 -04:00