Commit graph

77020 commits

Author SHA1 Message Date
Pali Rohár
537b0142b0 pci: pci_mvebu: Fix PCIe MEM and IO resources assignment and mbus mapping
Do not call pci_set_region() for resources which were not properly mapped.
This prevents U-Boot to access unmapped memory space.

Update MBUS_PCI_MEM_SIZE and MBUS_PCI_IO_SIZE macros to cover all PCIe MEM
and IO ranges. Previously these macros covered only address ranges for the
first PCIe port. Between MBUS_PCI_IO_BASE and MBUS_PCI_MEM_BASE there is
space for six 128 MB long address ranges. So set MBUS_PCI_MEM_SIZE to value
of 6*128 MB. Similarly set MBUS_PCI_IO_SIZE to 6*64 KB.

Function resource_size() returns zero when start address is 0 and end
address is -1. So set invalid resources to these values to indicate that
resource has no mapping.

Split global PCIe MEM and IO resources (defined by MBUS_PCI_*_* macros)
into PCIe ports in mvebu_pcie_bind() function which allocates per-port
based struct mvebu_pcie, instead of using global state variables
mvebu_pcie_membase and mvebu_pcie_iobase. This makes pci_mvebu.c driver
independent of global static variables (which store the state of
allocation) and allows to bind and unbind the driver more times.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
2022-01-14 07:47:57 +01:00
Pali Rohár
2ac06f3e66 board: gdsys: a38x: Enable PCIe link 2 in spl_board_init()
A385 controlcenterdc board does not use PCI DM properly and touches some
PCIe devices directly in its board code.

This controlcenterdc spl_board_init() function expects that PCIe link is
already initialized. Link itself is initialized in a38x serdes code but
this will change in future and link initialization will be postponed from
U-Boot SPL to proper U-Boot.

So explicitly enable PCIe link 2 in spl_board_init() function via
SoC Control Register 1 to not break this code by future changes. This board
has PCIe link 2 just x1, so no additional initialization (except enabling
PCIe port) is needed.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-01-14 07:47:57 +01:00
Pali Rohár
8f9e0f4d20 arm: mvebu: Convert board_pex_config() to CONFIG_SPL_BOARD_INIT
The only user of board_pex_config() weak function is A385 controlcenterdc
board. It looks like that code in its board_pex_config() function needs to
be executed after PCIe link is up. Therefore put this code into
spl_board_init() function which is called after a38x serdes initialization,
and therefore it is after the serdes hws_pex_config() function finishes
(which is the state before this change).

With this change completely remove board_pex_config() function as it is not
used anymore.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-01-14 07:47:57 +01:00
Tom Rini
25711b07ca bloblist prep for standard passage
switch order of pinctrl and power domain calls
 various minor fixes
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Merge tag 'dm-pull-13jan22' of https://source.denx.de/u-boot/custodians/u-boot-dm

bloblist prep for standard passage
switch order of pinctrl and power domain calls
various minor fixes
2022-01-13 14:33:02 -05:00
Simon Glass
6c9e3d1fc0 bloblist: Relicense to allow BSD-3-Clause
This implementation is intended to be copied to other projects and
modified, to as to foster a standard means of communcating runtime
information between firmware projects.

The GPL-2 license is too restrictive for some projects, e.g. those
intended as reference implementations rather than designed for
collaborative open-source development.

Update the license to make this easier to share.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-13 09:13:41 -07:00
Simon Glass
20a1493530 bloblist: doc: Bring in the API documentation
FIx up various minor errors and add the API documentation to the bloblist
docs, since it is quite useful to see it in the same place.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-13 09:13:41 -07:00
Simon Glass
e50a24a045 bloblist: Add functions to obtain base address and size
Add a few convenience functions to obtain useful information about the
bloblist.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-13 09:13:41 -07:00
Simon Glass
99047f5d7f bloblist: Refactor Kconfig to support alloc or fixed
At present we do support allocating the bloblist but the Kconfig is a bit
strange, since we still have to specify an address in that case. Partly
this is because it is a pain to have CONFIG options that disappears when
its dependency is enabled. It means that we must have #ifdefs in the code,
either in the C code or header file.

Make use of IF_ENABLED_INT() and its friend to solve that problem, so we
can separate out the location of bloblist into a choice. Put the address
and size into variables so we can log the result.

Add the options for SPL as well, so we can use CONFIG_IS_ENABLED().

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-13 09:13:41 -07:00
Simon Glass
5938d654de bloblist: Use 'phase' consistently for bloblists
We typically refer to the different U-Boot builds that a board runs
through as phases. This avoids confusion with the word 'stage' which is
used with bootstage, for example. Fix up some bloblist Kconfig help
which uses the wrong term.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-13 09:13:41 -07:00
Simon Glass
1d8bbd76f0 bloblist: Use LOG_CATEGORY to simply logging
Use the convenience functions to improve readability.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-13 09:13:41 -07:00
Simon Glass
f16ec77784 bloblist: Use explicit numbering for the tags
At present if someone adds a tag in the middle of the list it works well
enough within a U-Boot build. But if these tags are used in another
project, or with an older version of SPL, the numbers make become
inconsistent.

Use explicit tag numbers that never change, to resolve this problem.
Allocate areas for existing U-Boot tags and set up an area for use by
projects and vendors, as well as for private use. Keep tags above
0x10000 unallocated for now.

Update bloblist_tag_name() and the tests to work with this new setup.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-13 09:13:41 -07:00
Simon Glass
f9abc1cac1 bloblist: Drop unused tags
The EC event log tag is no-longer used. The vboot handoff is now handled
by the vboot context instead.

Drop these unused tags.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-13 09:13:41 -07:00
Simon Glass
7f3b79af54 bloblist: Rename the SPL tag
Add a U_BOOT prefix to this tag since it is specific to the U-Boot
project.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-13 09:13:41 -07:00
Simon Glass
ff3bd4983c bloblist: Put the magic number first
It seems best to put the magic number right at the start of the bloblist
header, so it is easier to check. This is how devicetree works.

Make this change now, before other projects make use of bloblist. Other
changes may be needed / discussed, but that is TBD.

Add a checker function as well.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-13 09:13:41 -07:00
Simon Glass
f350f67764 fdt: Drop SPL_BUILD macro
This old macro is not needed anymore since we can use IS_ENABLED() now.
Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-13 09:13:41 -07:00
Simon Glass
78aac05eb1 stddef: Avoid warning with clang with offsetof()
Some bright sparks have decided that a cast on a constant cannot be a
constant, so offsetof() produces this warning on clang-10:

include/intel_gnvs.h:113:1: error: static_assert expression is not an
	integral constant expression
check_member(acpi_global_nvs, unused2, GNVS_CHROMEOS_ACPI_OFFSET);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/kernel.h:284:2: note: expanded from macro 'check_member'
        offsetof(struct structure, member) == (offset), \
        ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/stddef.h:20:32: note: expanded from macro 'offsetof'
                                ^
include/intel_gnvs.h:113:1: note: cast that performs the conversions of
	a reinterpret_cast is ot allowed in a constant expression
include/linux/stddef.h:20:33: note: expanded from macro 'offsetof'

Fix it by using the compiler built-in version, if available. This syncs
the function to the same implementation as Linux v5.16 in this header
file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-13 09:13:41 -07:00
Andre Przywara
5ecdd529ae genboardscfg: limit to 240 jobs
When genboardscfg.py is run on machines with 255 or more cores, the
process will consume more than 1024 file descriptors, which is a common
standard ulimit for user processes. As a consequence it will fail with a
lenghty Python trace, with the almost hidden message:
OSError: [Errno 24] Too many open files

It's somewhat questionable whether that level of parallelity is actually
useful for genboardscfg, so we limit the *default* number of jobs to the
safe number of 240, to avoid the problem.
If a user persists, she can still force a higher number via the -j
parameter - hopefully having raised the ulimit accordingly beforehand.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-13 09:13:41 -07:00
Heinrich Schuchardt
880dbc5f80 sandbox: compatibility of os_get_filesize()
U-Boot define loff_t as long long. But the header
/usr/include/linux/types.h may not define it.
This has lead to a build error on Alpine Linux.

So let's use long long instead of loff_t for
the size parameter of function os_get_filesize().

Reported-by: Milan P. Stanić <mps@arvanta.net>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Milan P. Stanić <mps@arvanta.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-13 09:13:41 -07:00
Brian Norris
dca7926c2c patman: Support absolute and ~user-relative alias files
Python doesn't naturally support tilde (~) as a user-home marker in
paths, but git-config does. So we need to resolve it before continuing.

We also shouldn't blindly join the top-level tree with the aliasesfile
path, because it might be an absolute path.

This resolves warnings like the following:

  Warning: Cannot find alias file '/path/to/source/tree/~/.git-email'

Seen when git-config is like:

  $ git config sendemail.aliasesfile
  ~/.git-email

Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
2022-01-13 09:13:41 -07:00
Michal Simek
d8ef446fec dm: core: Switch order of pinctrl and power domain calls
The commit 3ad3077848 ("dm: core: device: enable power domain in probe")
introduced enabling power domain when device is probed.
By checking this sequence in Linux kernel was found that power domain is
handled first followed by pinctrl setting.

This patch is switching this order to follow Linux kernel that power
domains are handled first follow by pinctrl setting.

The issue was found on Xilinx Kria SOM where firmware is blocking setting
up pin configuration/muxes without enabling power domain for the specific
IP first.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-13 09:13:41 -07:00
Tom Rini
743c562d0c Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- Add Apple M1 watchdog timer (Mark)
2022-01-13 08:00:02 -05:00
Tom Rini
43304e49fe Merge branch '2022-01-13-assorted-spelling-fixes'
- Fix a large number of spelling mistakes
2022-01-13 07:57:56 -05:00
Vagrant Cascadian
5e7658925b drivers/usb/gadget/dwc2_udc_otg.c: Fix spelling of "resetting". 2022-01-13 07:57:50 -05:00
Vagrant Cascadian
0776c5fbb7 drivers/ddr/altera/sequencer.c: Fix spelling of "resetting". 2022-01-13 07:57:50 -05:00
Vagrant Cascadian
d1cab4f5f0 arch/arm/mach-keystone/ddr3.c: Fix spelling of "resetting". 2022-01-13 07:57:50 -05:00
Vagrant Cascadian
0580cd1636 drivers/core/of_addr.c: Fix spelling of "shouldn't". 2022-01-13 07:57:50 -05:00
Vagrant Cascadian
8c8bf4f17b common/fdt_support.c: Fix spelling of "shouldn't". 2022-01-13 07:57:49 -05:00
Vagrant Cascadian
f697addf8a drivers/net/fec_mxc.c: Fix spelling of "resetting". 2022-01-13 07:57:49 -05:00
Vagrant Cascadian
1107b062e5 cmd/Kconfig: Fix spelling of "resetting". 2022-01-13 07:57:49 -05:00
Vagrant Cascadian
9413e3a175 arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c: Fix spelling of "resetting". 2022-01-13 07:57:49 -05:00
Vagrant Cascadian
a5c20f6b91 drivers/usb/musb/musb_udc.c: Fix spelling of "mismatch". 2022-01-13 07:57:49 -05:00
Vagrant Cascadian
70463798b2 drivers/mtd/ubispl/ubispl.c: Fix spelling of "mismatched". 2022-01-13 07:57:49 -05:00
Vagrant Cascadian
11872975fd arch/arm/mach-bcm283x/msg.c: Fix spelling of "Failed". 2022-01-13 07:57:49 -05:00
Sean Anderson
46ad7cef64 treewide: invaild -> invalid
Somewhere along the way, someone misspelt "invalid" and it got copied
everywhere. Fix it.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-13 07:57:49 -05:00
Tom Rini
37b876359f Merge branch '2022-01-12-assorted-updates'
- Fix binman fake blob support to write outside source directory
- Azure now has stages in the pipeline
- Update to latest focal tag for containers in CI.
- Finish dropping LynxOS
- Add migration message for timer code
2022-01-13 07:34:27 -05:00
Mark Kettenis
9a8e3736da arm: apple: Use watchdog timer for system reset
Rely on the new watchdog timer driver and the sysreset uclass to
reset the system.  This gets rid of hard-coded addresses and
should work on systems based on the new M1 Pro and M1 Max SoCs
as well.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-on: Apple M1 Macbook
Tested-by: Simon Glass <sjg@chromium.org>
2022-01-13 06:55:46 +01:00
Mark Kettenis
b0e6c73a79 arm: dts: apple: Add watchdog timer node
Add a node for the watchdog timer based on the proposed Linux
device tree bindings.

Remove the old reboot node which was a watchdog timert node in
disguise using a preliminary device tree binding.

Signed-off-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-on: Apple M1 Macbook
Tested-by: Simon Glass <sjg@chromium.org>
2022-01-13 06:55:46 +01:00
Mark Kettenis
ee327d1d93 watchdog: Add a driver for the Apple watchdog
This driver supports the watchdog timer found on Apple's M1 SoC.
On systems that use these SoC, the watchdog timer is the primary
way to reboot the system.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-on: Apple M1 Macbook
Tested-by: Simon Glass <sjg@chromium.org>
2022-01-13 06:55:46 +01:00
Simon Glass
6e4a7eaf7d timer: Add a migration message
Some boards still use the old timer mechanism. Set a deadline for them to
update to driver model. Point to some examples as well.

This needs a bit of a strange rule to avoid an error on some boards.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-12 21:26:59 -05:00
Thomas Huth
0797e736d1 LynxOS is no longer supported
LynxOS needed the do_bootm_lynxkdi() function that got removed in
7e713067ee ("Remove LYNX KDI remainders") - and that function needed
a lynxkdi_boot() function, where the last implementation had been
removed in 98f705c9ce ("powerpc: remove 4xx support") already. Looks
like this OS is definitely not supported anymore, so remove it from
the corresponding lists.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-12 21:26:59 -05:00
Simon Glass
790ba9fce8 binman: Write fake blobs to the output directory
At present binman writes fake blobs to the current directory. This is not
very helpful, since the files serve no useful purpose once binman has
finished. They clutter up the source directory and affect future runs,
since the files in the current directory are often used in preference to
those in the board directory.

To avoid these problems, write them to the output directory instead.

Move the file-creation code to the Entry base class, so it can be used by
any entry type that needs it. This is required since some entry types,
such as Entry_blob_ext_list, are not subclasses of Entry_blob.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-12 21:26:59 -05:00
Simon Glass
32d4f106bd binman: Renumber the fake blob dts
Use a unique number instead of the current 203, which is used by 203_fip
as well. Reformat the code to avoid a long line.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-12 21:26:59 -05:00
Tom Rini
9d358a8c26 CI, Dockerfile: Update to latest "focal" tag
Bring us to the focal-20220105 tag and rebuild our images on top of
this.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-01-12 21:26:52 -05:00
Tom Rini
67d3e67dd8 ci: azure: Update to use stages
Follow what we do in GitLab CI where we break the jobs up in to stages
such that if earlier and often quicker sanity tests fail we don't run
everything else.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-01-12 20:56:22 -05:00
Adam Ford
824204e421 Makefile: Add more files to clean list
When building for i.mx8m boards with binman, a few more additional
files are created which should be removed when running 'make clean'

Signed-off-by: Adam Ford <aford173@gmail.com>
2022-01-12 20:56:21 -05:00
Tom Rini
a02af84e03 Merge branch '2022-01-12-pci-updates'
- PCI code clean up and bug fixes from Pali
2022-01-12 20:49:39 -05:00
Pali Rohár
2a67bf65dd pci: sh7751: Fix access to config space via PCI_CONF1_ADDRESS() macro
sh7751 platform uses standard format of Config Address for PCI
Configuration Mechanism #1.

Commit 72c2f4acd7 ("pci: sh7751: Convert to DM and DT probing") which did
conversion of PCI sh7751 driver to DM, broke access to config space as that
commit somehow swapped device and function bits in config address.

Fix all these issues by using new U-Boot macro PCI_CONF1_ADDRESS() which
calculates Config Address correctly.

Also remove nonsense function sh7751_pci_addr_valid() which was introduced
in commit 72c2f4acd7 ("pci: sh7751: Convert to DM and DT probing")
probably due to workarounded issues with mixing/swapping device and
function bits of config address which probably resulted in non-working
access to some devices. With correct composing of config address there
should not be such issue anymore.

Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: 72c2f4acd7 ("pci: sh7751: Convert to DM and DT probing")
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12 14:21:24 -05:00
Pali Rohár
c49f1fa892 m68k: mcf5445x: pci: Use PCI_CONF1_ADDRESS() macro
mcf5445x platform uses standard format of Config Address for PCI
Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS().

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12 14:21:24 -05:00
Pali Rohár
7598759d19 x86: pci: Use PCI_CONF1_ADDRESS() macro
x86 platform uses standard format of Config Address for PCI Configuration
Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS().

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12 14:21:24 -05:00
Pali Rohár
7fabaa5313 pci: sh7780: Use PCI_CONF1_ADDRESS() macro
PCI sh7780 driver uses standard format of Config Address for PCI
Configuration Mechanism #1.

So use new U-Boot macro PCI_CONF1_ADDRESS().

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12 14:21:24 -05:00