Commit graph

19154 commits

Author SHA1 Message Date
T Karthik Reddy
526a67eb35 xilinx: versal: Add new versal loadpdi command
Versal loadpdi command is used for loading secure & non-secure
pdi images.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Masahiro Yamada
65282edbdf ARM: dts: uniphier: resync DT with Linux 5.9-rc1
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-08-18 02:01:14 +09:00
Masahiro Yamada
351b74cb6d ARM: uniphier: use FIELD_GET() to get access to revision register fields
Define register fields as macros, and use FIELD_GET().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-08-18 02:01:14 +09:00
Masahiro Yamada
055e5ad287 ARM: uniphier: remove unneeded header inclusion from board_late_init.c
<nand.h> is unneeded since commit 9248a78f40 ("ARM: UniPhier: remove
Denali NAND controller fixup code").

<linux/io.h> is uneeded since commit 1320fa2e55 ("ARM: uniphier:
remove workaround for the NAND write protect").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-08-18 02:01:14 +09:00
Masahiro Yamada
2dbb6beb00 ARM: uniphier: remove unused uniphier_pin_init()
This function is unused since commit 862274913f ("bus:
uniphier-system-bus: move hardware init from board files").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-08-18 02:01:14 +09:00
Oleksandr Andrushchenko
60e49ff1f8 xen: Port Xen bus driver from mini-os
Make required updates to run on u-boot and strip test code.

Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
2020-08-14 15:18:30 -04:00
Peng Fan
384d5cfe5d serial: serial_xen: Add Xen PV serial driver
Add support for Xen para-virtualized serial driver. This
driver fully supports serial console for the virtual machine.

Please note that as the driver is initialized late, so no banner
nor memory size is visible.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-14 15:18:30 -04:00
Oleksandr Andrushchenko
486544161f xen: Port Xen hypervisor related code from mini-os
Port hypervisor related code from Mini-OS. This is referencing the code
of Mini-OS from [1] by Huang Shijie and Volodymyr Babchuk which is for
ARM64.
Update essential arch code to support required bit operations, memory
barriers etc.

Copyright for the bits ported belong to at least the following authors,
please see related files for details:

Copyright (c) 2002-2003, K A Fraser
Copyright (c) 2005, Grzegorz Milos, gm281@cam.ac.uk,Intel Research Cambridge
Copyright (c) 2014, Karim Allah Ahmed <karim.allah.ahmed@gmail.com>

[1] - https://github.com/zyzii/mini-os.git

Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
[trini: Drop wmb() from musb-net/linux-compat.h now]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-14 15:18:30 -04:00
Andrii Anisov
770a8eef3e board: Introduce xenguest_arm64 board
Introduce a minimal Xen guest board running as a virtual
machine under Xen Project's hypervisor [1], [2].

Part of the code is ported from Xen mini-os and also uses
work initially done by different authors from NXP: please see
relevant files for their copyrights.

[1] https://xenbits.xen.org
[2] https://wiki.xenproject.org/

Signed-off-by: Andrii Anisov <andrii_anisov@epam.com>
Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
2020-08-14 15:18:27 -04:00
Chia-Wei, Wang
98ef128b56 include/configs: aspeed: Remove hardcoded variables
The hardcoded platform variables such as DRAM base address are not
common to Aspeed SoCs AST24xx/AST25xx/AST26xx. This patch replaces
those hardcoded with macros defined in a newly added header, where
the basic SoC HW information are assigned accordingly.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
2020-08-14 09:46:40 -04:00
Chia-Wei, Wang
c16f518a79 cosmetic: aspeed: ast2500: Rename board file
Rename the ast2500-board.c to board_common.c and
place the renamed file under the ast2500 folder.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
2020-08-14 09:46:40 -04:00
Chia-Wei, Wang
611fe09577 aspeed: ast2500: Add lowlevel_init assembly
The original lowlevel_init function of AST2500 is written
in C. However, the C runtime environment is not ready until
_main execution.

This patch adds the assembly version of the lowlevel_init
function. Additional initialization to DRAM configuration
and LPC reset source are also added.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
2020-08-14 09:46:40 -04:00
Heinrich Schuchardt
7c6ca03eae riscv: additional crash information
If an exception occurs, the relocated program counter and return address
are required for an analysis.

With this patch you get:

    => exception undefined

    Unhandled exception: Illegal instruction
    EPC: 0000000080595908 RA: 000000008059c0c6 TVAL: 000000008030c01e
    EPC: 0000000080007908 RA: 000000008000e0c6 reloc adjusted

We can use the relocated addresses to find the involved functions in
u.boot.map:

    .text.do_undefined
                0x0000000080007908        0x8 cmd/built-in.o
    .text.cmd_process
                0x000000008000dfcc      0x11a common/built-in.o
                0x000000008000dfcc                cmd_process

If an exception occurs in an UEFI binary additionally the load addresses of
the UEFI binaries are needed. With this patch:

    => setenv efi_selftest exception
    => bootefi selftest

    Unhandled exception: Illegal instruction
    EPC: 000000008042e18a RA: 000000008042e18a TVAL: 000000008030c01e
    EPC: 000000007fea018a RA: 000000007fea018a reloc adjusted

    UEFI image [0x0000000000000000:0xffffffffffffffff] '/\selftest'
    UEFI image [0x000000008042e000:0x000000008042e43f] pc=0x18a '/bug.efi'

The value pc=0x18a matches the position of the illegal instruction in
efi_selftest_miniapp_exception.efi (loaded as /bug.efi);

    asm volatile (".word 0xffffffff\n");

    00000180   93 85 C5 11  1C 64 22 85  82 97 FF FF  FF FF 1C 64

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-08-14 14:39:41 +08:00
Heinrich Schuchardt
6a43e3a167 riscv: sifive: fu540: redundant initialization
We should not initialize a variable if the value is overwritten before
being read.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-08-14 14:39:14 +08:00
Heinrich Schuchardt
023dba1366 riscv: remove redundant logical constraint.
After

    if (ret) return ret;

we know that ret is zero. Don't check it again.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-08-14 14:39:09 +08:00
Bin Meng
ff8e88a6d7 riscv: sifive/fu540: kconfig: Move FU540 driver related options to the SoC level
All FU540 driver related options should be in the SoC level Kconfig.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-08-14 14:38:53 +08:00
Bin Meng
d6a01704b0 riscv: sifive/fu540: spl: Rename soc_spl_init()
spl_soc_init() seems to be a better name, as all SPL functions
names start from the spl_ prefix.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-08-14 14:38:53 +08:00
Bin Meng
71672b784c riscv: Call spl_board_init_f() in the generic SPL board_init_f()
The generic SPL version of board_init_f() should give a call to
board specific codes to initialize board in the SPL phase.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-08-14 14:38:53 +08:00
Tom Rini
cdcf591d9b Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Fix dtc warnings for some MVEBU boards
2020-08-13 08:25:25 -04:00
Tom Rini
6808dc62d7 - Use IS_ENABLED to prevent ifdef in board_key_check for STM32MP
- Add STM32 FMC2 EBI controller driver
   - Fix dwc3-sti-glue which allows STiH410-B2260 to boot again
   - Add fitImage its entry for 587-200 DHCOR SoM
   - Add both PDK2 and DRC02 DT into DHCOM fitImage its
   - Fix DHCOM KS8851 ethernet MAC address
   - Remove stm32mp1 board.c file
   - Use const for struct node_info in board stm32mp1.c file
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Merge tag 'u-boot-stm32-20200813' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

  - Use IS_ENABLED to prevent ifdef in board_key_check for STM32MP
  - Add STM32 FMC2 EBI controller driver
  - Fix dwc3-sti-glue which allows STiH410-B2260 to boot again
  - Add fitImage its entry for 587-200 DHCOR SoM
  - Add both PDK2 and DRC02 DT into DHCOM fitImage its
  - Fix DHCOM KS8851 ethernet MAC address
  - Remove stm32mp1 board.c file
  - Use const for struct node_info in board stm32mp1.c file
2020-08-13 08:11:27 -04:00
Stefan Roese
ac5cd429e3 arm: mvebu: armada-3720-turris-mox.dts: Fix dtc warning
Fix this dtc warning:
Warning (avoid_default_addr_size)

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Behún <marek.behun@nic.cz>
2020-08-13 12:07:05 +02:00
Stefan Roese
fcede1e5f6 arm: mvebu: armada-388-gp.dts: Fix dtc warnings
Fix these dtc warnings:
Warning (reg_format)
Warning (avoid_default_addr_size)

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
2020-08-13 12:07:05 +02:00
Stefan Roese
cc2afbd47b arm: mvebu: armada-xp-maxbcm.dts: Fix dtc warning
Fix this dtc warning:
Warning (avoid_default_addr_size)

Signed-off-by: Stefan Roese <sr@denx.de>
2020-08-13 12:07:05 +02:00
Stefan Roese
092cb733e9 arm: mvebu: armada-xp-theadorable.dts: Fix dtc warning
Fix this dtc warning:
Warning (avoid_default_addr_size)

Signed-off-by: Stefan Roese <sr@denx.de>
2020-08-13 12:07:05 +02:00
Marek Vasut
9ff770b497 ARM: dts: stm32: Update eth1addr from EEPROM if eth1 present
The STM32MP1 DHCOM has two ethernet interfaces, the on-SoM DWMAC and KS8851.
Set eth1addr for the KS8851 to a MAC address of the DWMAC incremented by 1.
The MAC of the DWMAC is set from on-SoM EEPROM already, but the MAC address
of KS8851 was left uninitialized, so fix this.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:56:44 +02:00
Christophe Kerello
acdaae6390 ARM: dts: stm32: add FMC2 EBI support for stm32mp157c
This patch adds FMC2 External Bus Interface support on stm32mp157c.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:53:35 +02:00
Patrick Delaunay
9a2b0540dc arm: stm32mp: stm32prog: use IS_ENABLED to prevent ifdef
Use IS_ENABLED to prevent ifdef in stm32prog command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:52:49 +02:00
Patrick Delaunay
4e9e358fe8 arm: stm32mp: bsec: use IS_ENABLED to prevent ifdef
Use IS_ENABLED to prevent ifdef in bsec driver.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13 09:52:49 +02:00
Vignesh Raghavendra
db6451ec0e arm: dts: k3-j7200-common-proc-board: Enable CPSW2G port
Enable CPSW2G port to support networking in U-Boot

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-08-11 20:34:46 +05:30
Vignesh Raghavendra
4bb4b06983 ARM: dts: k3-j7200-mcu-wakeup: Add CPSW2G support
Add MCU NAVSS, UDMA and CPSW2G DT nodes.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-08-11 20:34:46 +05:30
Vignesh Raghavendra
28e29fbb4f ARM: dts: k3-j7200: Add HyperBus and HyperFlash nodes
J7200 SoM has Cypress HyperFlash connected to HyperBus interface, add DT
entries for the same.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-08-11 20:34:46 +05:30
Vignesh Raghavendra
9e8a9b6457 ARM: dts: k3-j7200: Add wkup gpio node
Add wkup_gpio0 node required for detecting whether board mux is set
HyperFlash.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-08-11 20:34:46 +05:30
Vignesh Raghavendra
86c9bd4eb7 arm: dts: k3-j7200: Add USB related DT entries
Add USB related DT entries to enable USB device mode.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-08-11 20:34:46 +05:30
Dave Gerlach
7cc9855f31 arm: dts: k3-j7200: Add R5 specific dts support
Add the basic a72 basic dts for j7200. Following nodes were supported:
- UART
- MMC SD
- I2C
- TISCI communication
- LPDDR with 1600MTs configuration.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
a7551cf05d arm: dts: k3-j7200: Add dts support
Add the basic a72 dts for j7200. Following nodes were supported:
- UART
- MMC SD
- I2C
- TISCI communication

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
01dbe366ba arm: mach-k3: j7200: Detect if ROM has already loaded sysfw
Detect if sysfw is already loaded by ROM and pass this information to
sysfw loader. Based on this information sysfw loader either loads the
sysfw image from boot media or just receives the boot notification
message form sysfw.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
9c8f41beea arm: mach-k3: j7200: Add support for storing extended boot info from ROM
Starting J7200 SoC, ROM supports for loading sysfw directly from boot
image. ROM passes this information on number of images that are loaded
to bootloader at certain location. Add support for storing this
information before it gets corrupted.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
30de1ba0d3 arm: mach-k3: j7200: Add support for SOC detection
The J7200 SoC is a part of the K3 Multicore SoC architecture platform.
It is targeted for automotive gateway, vehicle compute systems,
Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications.
The SoC aims to meet the complex processing needs of modern embedded
products.

Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, two clusters of lockstep
  capable dual Cortex-R5F MCUs and a Centralized Device Management and
  Security Controller (DMSC).
* Configurable L3 Cache and IO-coherent architecture with high data
  throughput capable distributed DMA architecture under NAVSS.
* Integrated Ethernet switch supporting up to a total of 4 external ports
  in addition to legacy Ethernet switch of up to 2 ports.
* Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems,
  20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and
  I2C, eCAP/eQEP, eHRPWM among other peripherals.
* One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
  management.

See J7200 Technical Reference Manual (SPRUIU1, June 2020)
for further details: https://www.ti.com/lit/pdf/spruiu1

Add support for detection J7200 SoC

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
73108dcd7f arm: mach-k3: j721e: Fix unlocking control module registers
In main control mmr there is no partition 4 and partition 6 is available
only on J721e. Fix the same in ctrl_mmr_unlock function

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
2a18be77de arm: mach-k3: j721e: Add detection for j721e
Add an api soc_is_j721e(), and use it to enable certain functionality
that is available only on j721e. This detection is needed when DT is not
available.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
dc57a554a5 arm: mach-k3: sysfw-loader: Add support for rom loading sysfw image
Starting J7200 SoC, ROM supports for loading sysfw directly from boot
image. In such cases, SPL need not load sysfw from boot media, but need
to receive boot notification message from sysfw. So separate out
remoteproc calls for system controller from sysfw loader and just
receive the boot notification if sysfw is already loaded.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
58ccd6105c arm: mach-k3: Move mmr_unlock to a common location
mmr_unlock api is common for all k3 devices. Move it to a common
location.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11 20:34:46 +05:30
Jean-Jacques Hiblot
d099db2829 arm: mach-k3: Fix platform hang when SPL_MULTI_DTB_FIT is not enabled
If SPL_MULTI_DTB_FIT is not enabled, then CONFIG_SPL_OF_LIST is not defined
And in turn tispl.bin ends up not embedding any DTB.
Fixing it by using CONFIG_DEFAULT_DEVICE_TREE if SPL_OF_LIST is empty.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-08-11 20:34:46 +05:30
Lokesh Vutla
b29a7cd09d board: ti: j721e: Probe eeprom only when CONFIG_TI_I2C_BOARD_DETECT is defined
Guard all eeprom probe with TI_I2C_BOARD_DETECT to avoid reading eeprom
when eeprom is not available

Reviewed-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
c20aee3e28 arm: dts: k3-am654-base-board: Add support for USB0 in SPL
Add nodes for USB0 in SPL to enable USB host boot mode

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
5251eb13bd arm: dts: k3-am654-r5-base-board: Add USB0 nodes
Add USB0 nodes and set them to host mode to support USB host and
peripheral boot modes

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
897e83f0a5 arm: mach-k3: am6_init: Add support for USB boot mode
Add support for identifying USB host and device boot modes

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
403fc5c9cf arm: mach-k3: am6_init: Do USB fixups to facilitate host and device boot modes
U-boot only supports either USB host or device mode for a node at a
time in dts. To support both host and dfu bootmodes, set "peripheral"
as the default dr_mode but fixup property to "host" if host bootmode
is detected.

This needs to happen before the dwc3 generic layer binds the usb device
to a host or device driver. Therefore, add an fdtdec_setup_board()
implementation to fixup the dt based on the boot mode.

Also use the same fixup function to set the USB-PCIe Serdes mux to PCIe
in both the host and device cases. This is required for accessing the
interface at USB 2.0 speeds.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
febb47ac61 arm: mach-k3: am6_init: Gate mmc related configurations with the appropriate config
Gate mmc related system related configurations with DM_MMC to avoid build
errors when MMC is not enabled

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30
Faiz Abbas
f5838b1542 arm: mach-k3: sysfw-loader: Add support to load SYSFW from USB
Add support for loading system firmware from a USB mass storage device

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11 20:34:46 +05:30