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ARM: uniphier: remove workaround for the NAND write protect
This workaround was previously needed for LD4, Pro4, sLD8, Pro5 SoCs. The boot ROM does not touch this register for PXs2/LD6b or later. Now that the reset signal of the Denali NAND controller is always asserted in board_init() then deasserted in the driver, the WRITE_PROTECT register gets back to the default value, which means the write protect is deasserted. This workaround can go away entirely. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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1 changed files with 0 additions and 17 deletions
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@ -14,25 +14,9 @@
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#include <stdio.h>
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#include <linux/io.h>
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#include <linux/printk.h>
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#include <../drivers/mtd/nand/raw/denali.h>
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#include "init.h"
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static void nand_denali_wp_disable(void)
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{
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#ifdef CONFIG_NAND_DENALI
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/*
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* Since the boot rom enables the write protection for NAND boot mode,
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* it must be disabled somewhere for "nand write", "nand erase", etc.
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* The workaround is here to not disturb the Denali NAND controller
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* driver just for a really SoC-specific thing.
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*/
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void __iomem *denali_reg = (void __iomem *)CONFIG_SYS_NAND_REGS_BASE;
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writel(WRITE_PROTECT__FLAG, denali_reg + WRITE_PROTECT);
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#endif
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}
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static void uniphier_set_env_fdt_file(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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@ -114,7 +98,6 @@ int board_late_init(void)
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case BOOT_DEVICE_NAND:
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printf("NAND Boot");
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env_set("bootdev", "nand");
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nand_denali_wp_disable();
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break;
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case BOOT_DEVICE_NOR:
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printf("NOR Boot");
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