Commit graph

7884 commits

Author SHA1 Message Date
Kever Yang
522cd58077 rockchip: firefly-rk3399: dts: enable sdmmc device
Enable sdmmc device and add the spl boot device sequence.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:47 +02:00
Kever Yang
ebac2cf084 rockchip: rk3328: dtsi use max-frequency for mmc node
Since the 'clock-freq-min-max' is deprecated, we use max-frequency.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:47 +02:00
Kever Yang
16e358ac32 rockchip: rk3288: dtsi use max-frequency for mmc node
Since the 'clock-freq-min-max' is deprecated, we use max-frequency.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:47 +02:00
Kever Yang
3f7a725598 rockchip: rk3036: dtsi use max-frequency for mmc node
Since the 'clock-freq-min-max' is deprecated, we use max-frequency.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:46 +02:00
Kever Yang
b24a8ec15c rockchip: add evb_rk3229 board
evb_rk3229 is a RK3229 based board, with:
- 8GB eMMC;
- 1GB DDR SDRAM;
- 2 USB2.0 HOST port;
- 1 MAC port;
- 1 HDMI port;
- IR;
- WiFi;

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:46 +02:00
Kever Yang
168eef7ada rockchip: rk322x: add basic soc support
Enable soc support for SPL and U-boot skeleton.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:46 +02:00
Kever Yang
b647442ce8 rockchip: rk322x: add dts file
The dts files are from kernel and with modify to adapt U-Boot.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:46 +02:00
Kever Yang
5cc9d31a79 rockchip: rk322x: add pinctrl driver
Add init pinctrl driver support for:
- i2c;
- spi;
- uart;
- pwm;
- emmc/sdmmc;

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:46 +02:00
Kever Yang
045029cbd1 rockchip: rk322x: add clock driver
Add clock driver init support for:
- cpu, bus clock init;
- emmc, sdmmc clock;
- ddr clock;

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Fixed format specified (%x -> %p) in clk_rk322x.c:
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:45 +02:00
Kever Yang
975e4abad2 rockchip: correct the bank0 ram size
The bank0 ram size should be the DRAM size minus reserved size,
the DRAM size may be 1GB, 2GB, 4GB, we can not hard code it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Added DECLARE_GLOBAL_DATA_PTR for RK3328, RK3368 and RK3399:
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:45 +02:00
Kever Yang
c541a7a12a rockchip: dts: rk3368: add dmc node
Add dmc node to enable sdram driver.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:45 +02:00
Kever Yang
8f313328e5 rockchip: dts: rk3328: add dmc node
Add a dmc node for sdram driver.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:45 +02:00
Kever Yang
cc89369fb0 rockchip: rk3368: add sdram driver for U-Boot
Add sdram driver in U-Boot for get the correct sdram size from
sys_reg, so that U-Boot can co-work with Rockchip loader or SPL
to get different dram capability and then tell the kernel.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:45 +02:00
Kever Yang
39648e6167 rockchip: rk3328: add sdram driver in U-Boot
Add sdram driver in U-Boot for get the correct sdram size from
sys_reg, so that U-Boot can co-work with Rockchip loader or SPL
to get different dram capability and then tell the kernel.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:44 +02:00
Kever Yang
7805cdf494 rockchip: use common sdram function
Replace the sdram_init() in board init and rockchip_sdram_size() in
sdram driver for all the Rockchip SoCs which enable CONFIG_RAM.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Make dram_init() in rk3036-board.c conditional on CONFIG_RAM:
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:44 +02:00
Kever Yang
6d1970fa8a rockchip: add sdram_common for common functions
There are some functions like sdram_size_mb can be re-used for
different rockchip SoCs, just put them into common file.
Add board_get_usable_ram_top() for ram_top init base on
SDRAM_MAX_SIZE.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Added SDRAM_MAX_SIZE definition for RK3036:
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

fixup: 3036 fix for sdram_common
2017-07-11 12:13:44 +02:00
Kever Yang
be8da534e2 rockchip: rk3328: correct mem_region
According to rk3328 TRM:
0~0xff000000 is ddr space;
0xff000000~0xffffffff is device space.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:44 +02:00
Philipp Tomsich
8f1034e627 rockchip: dm: convert fdt_get to dev_read
With the new dev_read functions available, we can convert the rockchip
architecture-specific drivers and common drivers used by these devices
over to the dev_read family of calls.

This covers the DRAM controller initialisation for the RK3188, RK3288
and RK3399... all of these read some of the tuning/setup/timing
parameters from the device-tree.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-11 12:13:44 +02:00
Simon Glass
747c4c68c0 stm32: Correct positioning of declaration
The current code gives a warning:

arch/arm/mach-stm32/stm32f7/soc.c: In function 'arch_cpu_init':
arch/arm/mach-stm32/stm32f7/soc.c:38:2: error: 'for' loop initial
    declarations are only allowed in C99 or C11 mode
  for (int i = 0; i < ARRAY_SIZE(stm32_region_config); i++)
  ^
arch/arm/mach-stm32/stm32f7/soc.c:38:2: note: use option -std=c99,
    -std=gnu99, -std=c11 or -std=gnu11 to compile your code

Fix it by moving the declaration to the top of the function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Series-cc trini
2017-07-06 16:17:17 -04:00
Rob Clark
8bf5c1e191 arm64: use psci reset on snapdragon
This actually works on snapdragon.. not sure why we weren't using it.
Fixes reboot/poweroff when using UEFI.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
2017-07-06 16:17:13 -04:00
Tom Rini
3278e29130 Revert "armv7m: Disable D-cache when booting nommu(ARMv7M) Linux kernel"
The author of the commit discovered later on that this was already being
done in cleanup_before_linux() on arch/arm/cpu/armv7m/cpu.c.

This reverts commit 8f079cccb3.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-29 21:18:48 -04:00
Marek Vasut
f1d56dffd7 ARM: atmel: Rename MA5D4EVK
The board is now manufactured by Aries Embedded GmbH , rename it.

Signed-off-by: Marek Vasut <marex@denx.de>
2017-06-29 13:30:27 -04:00
Heiko Schocher
be2787bf29 atmel, at91: fix taurus board
since commit: f8b7fff1d5 "serial: atmel_usart: Add clk support"

taurus board comes not up anymore. Fix it.

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Wenyou Yang <wenyou.yang@microchip.com>
2017-06-29 10:01:12 -04:00
Heiko Schocher
be884598da atmel, at91: fix smartweb board
since commit: f8b7fff1d5 "serial: atmel_usart: Add clk support"

smartweb board comes not up anymore. Fix it.

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Wenyou Yang <wenyou.yang@microchip.com>
2017-06-29 10:01:11 -04:00
Andy Yan
f8136e68cc ARM: make memset and memcpy prompt message more clearly
The origin SPL_USE_ARCH_MEMSET/MEMCPY use same prompt message
as USE_ARCH_MEMSET/MEMCPY, which makes it's hard to distinguish
them in menuconfig interface. This patch gives them different
prompt messages for spl and none-spl config.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2017-06-29 09:51:06 -04:00
Tom Rini
de8203653f ti816x: Enable ethernet support
The ti816x SoC revision of the ethernet IP block is handled by the
"davinci_emac" driver, rather than the "cpsw" driver as done by later
members of the family.  Enable the relevant plumbing.

Signed-off-by: Sriramakrishnan <srk@ti.com>
Signed-off-by: Vitaly Wool <vitaly.wool@konsulko.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-28 11:43:39 -04:00
Tom Rini
821560fd8e Merge git://www.denx.de/git/u-boot-imx
Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	include/configs/imx6qdl_icore_rqs.h
	include/configs/imx6ul_geam.h
	include/configs/imx6ul_isiot.h
2017-06-27 09:32:37 -04:00
Fabio Estevam
65496a3483 mx6: soc: Fix typo in temperature unit name
The correct name is 'Celsius', so fix it accordingly.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-06-27 09:06:09 +02:00
Tom Rini
524b42bc2c Merge git://git.denx.de/u-boot-uniphier
- fix sparse warnings
- sync DT with Linux
- add new board support (LD11/LD20 global)
2017-06-24 18:18:41 -04:00
Kunihiko Hayashi
7bf378043f arm64: dts: uniphier: add support for LD20 Global board
Add initial device tree support for LD20 Global board.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-25 06:06:09 +09:00
Kunihiko Hayashi
247137f245 arm64: dts: uniphier: add support for LD11 Global board
Add initial device tree support for LD11 Global board.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-25 06:06:09 +09:00
Masahiro Yamada
d940300178 ARM: dts: uniphier: sync DT with Linux next-20170622
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-25 06:06:09 +09:00
Masahiro Yamada
1d21e1b97c ARM: uniphier: fix various sparse warnings
Fix warnings reported by sparse:
 - ... was not declared. Should it be static?"
 - cast to restricted __be32

While fixing those, the type conflict of cci500_init() was found.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-25 06:06:09 +09:00
Heiko Schocher
72fa58931e atmel, at91: fix corvus board
since commit: f8b7fff1d5 "serial: atmel_usart: Add clk support"
corvus board comes not up anymore. Fix it.

Signed-off-by: Heiko Schocher <hs@denx.de>
2017-06-23 10:38:12 -04:00
Lokesh Vutla
964a34e602 ARM: dts: OMAP5+: Update spl specific dts
Now that we can specify DT nodes that can be used in spl, mark
all necessary nodes as u-boot,dm-spl.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-06-23 10:38:04 -04:00
Lokesh Vutla
f2c1cbe738 ARM: dts: am43xx: Update spl specific dts
Now that we can specify DT nodes that can be used in spl, mark
all necessary nodes as u-boot,dm-spl.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-06-23 10:38:03 -04:00
Tom Rini
207f981b56 ti816x: Add additional boot device detection logic
It has been observed that between PG1.0 and PG2.0/2.1 depending on
which device we boot from, we may see a different value here than is
documented in the TRM.  Update the values for NAND and MMC1 based on
real life usage on each revision.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-23 10:38:03 -04:00
Tom Rini
235c5b8315 Merge branch 'master' of git://git.denx.de/u-boot-samsung 2017-06-21 08:01:07 -04:00
Tom Rini
784667d7f9 Xilinx changes for v2017.07
ZynqMP:
 - config cleanup
 - SD LS mode support
 - psu_init* cleanup
 - unmap OCM
 - Support for SMC
 
 Zynq:
 - add ddrc to Kconfig
 - add topic-miamilite board support
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Merge tag 'xilinx-for-v2017.07' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2017.07

ZynqMP:
- config cleanup
- SD LS mode support
- psu_init* cleanup
- unmap OCM
- Support for SMC

Zynq:
- add ddrc to Kconfig
- add topic-miamilite board support
2017-06-21 07:57:37 -04:00
Tom Rini
ab43de8036 sunxi: Correct select's of SPL_STACK_R and SPL_SYS_MALLOC_SIMPLE
On ARCH_SUNXI we've been selecting these targets for a long time if
SUPPORT_SPL is set.  However, Lichee Pi Zero is the first platform we've
added that does support SPL but does not build SPL and has exposed a
latent bug.  Both of these symbols depend on SPL not SUPPORT_SPL, so we
need to update our select here otherwise we get a Kconfig warning.

Fixes: f02abb0608 ("sunxi: add support for Lichee Pi Zero")
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-21 07:54:46 -04:00
Marek Vasut
dc759a9967 ARM: dts: omap3: Fix dts->dtb typo
Trivial, fix typo.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
2017-06-20 14:03:33 -04:00
Mike Looijmans
e625881ad7 arm: zynq: Add support for the topic-miamilite system-on-module
The topic-miamilite SoM contains a Zynq xc7z010 SoC, 1GB DDR3L RAM,
64MB dual-parallel QSPI NOR flash and clock sources.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20 16:42:13 +02:00
Michal Simek
fb4000e871 arm64: zynqmp: Check pmufw version
If PMUFW version is not v0.3 then panic.
ZynqMP switch to CCF based clock driver which requires
PMUFW to be present at certain version.
This patch ensure that you use correct and tested PMUFW
binary.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20 16:42:13 +02:00
Siva Durga Prasad Paladugu
e0752bc184 arm64: zynqmp: Define routines for mmio write and read
Define routines of mmio write and read functionalities
for zynqmp platform.

Also do not call SMC from SPL because SPL is running before ATF in EL3
that's why SMCs can't be called because there is nothing to call.
zynqmp_mmio*() are doing direct read/write accesses and this patch does
the same. PMUFW is up and running at this time and there is a way to talk
to pmufw via IPI but there is no reason to implement IPI stuff in SPL if
we need just simple read for getting clock driver to work.

Also make invoke_smc as global so that it can be reused in
multile places where ever possible.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20 16:42:06 +02:00
Siva Durga Prasad Paladugu
d84bd9284e arm: zynq: Add Kconfig option for any DDR specific initialization
Add Kconfig option for ddr init as this might be required
in cases like ddr less systems where we want to skip ddrc
init and this option is useful for it.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20 16:41:44 +02:00
Michal Simek
6a1d91be31 arm64: zynqmp: Do not map unused OCM/TCM region
When OCM or TCM is protected this mapping still exist and it is causing access
violation.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20 16:40:58 +02:00
Michal Simek
b0259c840e arm64: zynqmp: Add comment about level shifter mode v1
Silicon v1 didn't support SD boot mode with level shifter.
Because system can't boot any error message is not shown
that's why comment is just a record if someone tries to debug it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20 16:40:58 +02:00
Jean-Francois Dagenais
8bf62ae7da arm64: zynqmp: spl: use given boot_device instead of fetching it again
The boot_device argument to spl_boot_mode was massively added without
actually modifying the existing functions.

This commit actually makes use of the handed value, which is the same.

Signed-off-by: Jean-Francois Dagenais <jeff.dagenais@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-19 16:53:10 +02:00
Jean-Francois Dagenais
e3fdf5d056 arm64: zynqmp: spl: fix dual SD controller support
When enabling both SDHCI controllers, spl_mmc.c would actually choose
device sdhci0 even if booted from sdhci1 (boot_device). This is because
spl_mmc_get_device_index(boot_device) expects BOOT_DEVICE_MMC2[_2] in
order to return index 1 instead of 0.

The #if defined(...) statement is copied from board/xilinx/zynqmp/zynqmp.c

So the key to properly enabling both controllers as boot sources is
defining both CONFIG_ZYNQ_SDHCI0 and CONFIG_ZYNQ_SDHCI1 in your board's
include/configs/*.h.

Signed-off-by: Jean-Francois Dagenais <jeff.dagenais@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-19 16:53:09 +02:00
Michal Simek
bd89fba202 arm64: zynqmp: Wire SD1 level shifter mode to SPL
Add missing SD boot mode to SPL. zcu102-rev1.0 is supporting
this boot mode.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-19 16:53:09 +02:00