Commit graph

81495 commits

Author SHA1 Message Date
Patrick Delaunay
50b2184257 stm32mp: simplify the STM32MP15x package parsing code
Simplify the package parsing code for STM32MP15X as package can be
affected with get_cpu_package() result.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-09-06 13:54:50 +02:00
Tom Rini
51601397fc Prepare v2022.10-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-09-05 20:32:56 -04:00
Tom Rini
f243371798 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-09-05 20:32:14 -04:00
Tom Rini
05f135ab3e Merge tag 'u-boot-rockchip-20220905' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- migrate to use binman for U-Boot image generate on rockchip platform;
- Some fixes for rk3399 and rk3308;
2022-09-04 22:35:40 -04:00
Michal Suchanek
f103c11266 clk: rockchip: rk3399: Fix Unknown clock 77 on mmc@fe310000
Adding some debug prints I can see:

MMC:   mmc@fe320000: Got clock clock-controller@ff760000 76
mmc@fe310000: Got clock clock-controller@ff760000 77
Unknown clock 77
rockchip_dwmmc_get_mmc_clk: err=-2
mmc@fe310000: 3, mmc@fe320000: 1, mmc@fe330000: 0

According to kernel code the SDIO clock is identical to SDMMC clock
except for the con 16->15 change.

Add support for the clock to avoid the error.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:39 +08:00
Quentin Schulz
e1faa535b9 rockchip: add u-boot-rockchip-spi.bin image for booting from SPI-NOR flash
This new image is similar to u-boot-rockchip.bin except that it's
destined to be flashed on SPI-NOR flashes.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-04 20:00:39 +08:00
Quentin Schulz
a4bb36df49 rockchip: allow to build SPI images even without HAS_ROM option
This prepares for the creation of a u-boot-rockchip-spi.bin image
similar to u-boot-rockchip.bin to the exception it's destined for
SPI-NOR flashes instead of MMC storage medium.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:39 +08:00
Quentin Schulz
a6e569fac3 rockchip: simplify binman image dependencies addition to INPUTS
By factoring SPL check in the first condition, this makes the checks a
bit less convoluted and more readable.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-04 20:00:39 +08:00
Quentin Schulz
05713d5707 rockchip: generate u-boot-rockchip.bin with binman for ARM64 boards
This allows to build u-boot-rockchip.bin binary with binman for Rockchip
ARM64 boards instead of the legacy Makefile way.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-04 20:00:39 +08:00
Quentin Schulz
001f788cdb rockchip: generate idbloader.img content for u-boot-rockchip.bin with binman for ARM
idbloader.img content - currently created by way of Makefile - can be
created by binman directly.

So let's do that for Rockchip ARM platforms.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:39 +08:00
Quentin Schulz
32c8d1ce5c rockchip: remove binman temporary files when cleaning
Binman mkimage entry generates temporary files so let's remove them
when calling `make clean`.

Fixes: 9b312e26fc ("rockchip: Enable building a SPI ROM image on jerry")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reported-by: Johan Jonker <jbx6244@gmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:39 +08:00
Quentin Schulz
6cc29dc854 binman: allow user-defined filenames for mkimage entry
mkimage entry currently creates a file whose name is derived from the
section name containing said entry.

Let's allow the user to define a filename for the mkimage-generated
binary by using the 'filename' DT property.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-04 20:00:39 +08:00
Quentin Schulz
4d91df0548 binman: add support for skipping file concatenation for mkimage
Some image types handled by mkimage require the datafiles to be passed
independently (-d data1:data2) for specific handling of each. A
concatenation of datafiles prior to passing them to mkimage wouldn't
work.

That is the case for rkspi for example which requires page alignment
and only writing 2KB every 4KB.

This adds the ability to tell binman to pass the datafiles without
prior concatenation to mkimage, by adding the multiple-data-files
boolean property to the mkimage node.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-04 20:00:39 +08:00
Quentin Schulz
7a81a44caf rockchip: rk3399: sync spl_boot_devices_tbl and boot_devices node paths
While technically not a bug, let's have some consistency in paths
returned by u-boot,spl-boot-order look-up and the one saved in
u-boot,spl-boot-device by syncing spl_boot_devices_tbl and boot_devices
node paths.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Tested-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:39 +08:00
Quentin Schulz
72ebe8b8cb rockchip: rk3399: fix incorrect boot-device in u-boot, spl-boot-device
On RK3399, mmc0 is eMMC and mmc1 is SD card, c.f. console:
MMC:   mmc@fe320000: 1, mmc@fe330000: 0

In arch/arm/mach-rockchip/spl-boot-order.c:board_boot_order, the
boot_device (BOOT_DEVICE_*) value is gotten from spl_node_to_boot_device
function. Said function returns BOOT_DEVICE_MMC1 for mmc0 (eMMC) and
BOOT_DEVICE_MMC2 for mmc1 (SD card).

Since the SD card controller is at mmc@fe320000, it should be associated
with BOOT_DEVICE_MMC2 and not BOOT_DEVICE_MMC1. Same applies to eMMC.

Let's fix that by swapping the two BOOT_DEVICEs.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Tested-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
2022-09-04 20:00:38 +08:00
John Keeping
74f7025ea6 rockchip: rk3308: fix same-as-spl boot order
Rockchip SoCs need the boot_devices array defined in order to map the
bootloader's value to a U-Boot device.  Implement this for rk3308.

Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:38 +08:00
John Keeping
9b0e344fa1 rockchip: rk3308: fix rockchip_dnl_key_pressed() on roc-cc
Commit 6aa4fe3912 ("dm: core: Rename and fix uclass_get_by_name_len()")
changed uclass_get_device_by_name() to an exact match when previously it
behaved as a prefix match.

The roc-cc code relied on this prefix match by only specifying part of
the device name.  Fix this by using the full name including the address.

Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:38 +08:00
Quentin Schulz
07b5d348a6 rockchip: rk3399: boot_devices: fix eMMC node name
When idbloader.img is flashed on the eMMC, the SPL still tries to load
from SPI-NOR first.

This is due to an incorrect look-up in the Device Tree. Since commit
822556a934 ("arm: dts: sync the Rockhip 3399 SoCs from Linux"), the
node name (but not label) changed from sdhci@fe330000 to mmc@fe330000
meaning U-Boot SPL is not looking for the correct node name anymore and
fails to find the "same-as-spl" node when eMMC is the medium from which
the SPL booted.

Fixes: 822556a934 ("arm: dts: sync the Rockhip 3399 SoCs from Linux")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Artem Lapkin  <email2tema@gmail.com>
Tested-by: Artem Lapkin  <email2tema@gmail.com>
Tested-by: Lapkin Artem <email2tema@gmail.com>
Tested-by: Lapkin Artem <email2tema@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:38 +08:00
Lee Jones
337e92e79c ram: rk3399: Conduct memory training at 400MHz
Currently the default initialisation frequency is 50MHz.  Although
this does appear to be suitable for some LPDDR4 RAM chips, training at
this low frequency has been seen to cause Column errors, leading to
Capacity check errors on others.

Here we force RAM initialisation to happen at 400MHz before ramping up
to the final value running value of 800MHz after everything has been
successfully configured.

Link: https://lore.kernel.org/u-boot/Yo4v3jUeHXTovjOH@google.com/
Suggested-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Lee Jones <lee@kernel.org>
Tested-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Michal Suchánek <msuchanek@suse.de>
2022-09-04 20:00:38 +08:00
Lee Jones
daef678cff ram: rk3399: Fix faulty frequency change reports
Frequency changes to 400MHz are presently reported as:

  lpddr4_set_rate_0: change freq to 400000000 mhz 0, 1

This is obviously wrong by 6 orders of magnitude.

Ensure frequency changes are reported accurately.

Signed-off-by: Lee Jones <lee@kernel.org>
Tested-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:38 +08:00
Lee Jones
7b561e2ab8 ram: rk3399: Fix .set_rate_index() error handling
Functions pointed to by this op pointer can return non-zero values
indicating an error.  Ensure any error value is propagated back up the
call-chain.

Signed-off-by: Lee Jones <lee@kernel.org>
Tested-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:38 +08:00
Han Pengfei
fc1526f651 drivers: ram: rockchip: Fix dram channels calculation for rk3399
Only add the dram channel when we finally setup it successfully at the
last step.

Signed-off-by: Han Pengfei <pengphei@foxmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:38 +08:00
Johan Jonker
69820e02d2 arm: dts: rockchip: rk3288: rename mmc nodenames
The boot_devices constants for rk3288 were changed to match the
binding, but the dtsi file was not synced.
Fix by renaming the rk3288 mmc node names.
Also correct the clock name for "ciu-drive".

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:38 +08:00
Tom Rini
427aa3c9b7 TPM fixes and state reporting
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Merge tag 'tpm-03092022' of https://source.denx.de/u-boot/custodians/u-boot-tpm

TPM fixes and state reporting
2022-09-03 14:55:37 -04:00
Tom Rini
bc5d11316b Merge https://source.denx.de/u-boot/custodians/u-boot-sh 2022-09-03 14:55:24 -04:00
Tom Rini
d4593139c5 Merge https://source.denx.de/u-boot/custodians/u-boot-usb 2022-09-03 14:55:13 -04:00
Simon Glass
5208ed187c tpm: Allow committing non-volatile data
Add an option to tell the TPM to commit non-volatile data immediately it
is changed, rather than waiting until later. This is needed in some
situations, since if the device reboots it may not write the data.

Add definitions for the rest of the Cr50 commands while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-03 16:59:05 +03:00
Simon Glass
4c57ec76b7 tpm: Implement state command for Cr50
Add a vendor-specific TPM2 command for this and implement it for Cr50.
Note: This is not part of the TPM spec, but is a Cr50 extension.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-03 16:59:05 +03:00
Simon Glass
3bb4db4c38 tpm: Allow reporting the internal state
It is useful to read information about the current TPM state, where
supported, e.g. for debugging purposes when verified boot fails.

Add support for this to the TPM interface as well as Cr50. Add a simple
sandbox test.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-03 16:59:05 +03:00
Simon Glass
6694c997b2 tpm: sandbox: Allow init of TPM in a different phase
At present the emulator assumes that the TPM is inited in the same phase
where it is used. But in fact SPL may init the TPM, so we don't want to
complain when U-Boot proper later uses it. Remove this check.

It might be best to save this information into the device state for the
TPM, so that we can make sure the TPM was inited at some point. For now,
this seems good enough.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-03 16:58:56 +03:00
Simon Glass
1c32eee38b tpm: Correct the define-space command in TPMv2
The message format is incorrect. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-03 16:54:04 +03:00
Simon Glass
a0f3804a42 tpm: Correct the permissions command in TPMv1
The offset here is incorrect. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-03 16:54:02 +03:00
Simon Glass
a557d258c6 tpm: Require a digest source when extending the PCR
This feature is used for measured boot, so we can add a log entry to the
TCPA with some information about where the digest comes from. It is not
currently supported in the TPM drivers, but add it to the API so that
code which expects it can signal its request.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-03 16:53:58 +03:00
Tom Rini
8710676635 Pull request of efi-2022-10-rc4-2
UEFI:
 * provide EFI Conformance Profile Table
 * fix display of NVMe EUI-64
 * fixes for Simple Text Input Ex Protocol
 * fix exception unit-test on non-x86 sandbox
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Merge tag 'efi-2022-10-rc4-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request of efi-2022-10-rc4-2

UEFI:
* provide EFI Conformance Profile Table
* fix display of NVMe EUI-64
* fixes for Simple Text Input Ex Protocol
* fix exception unit-test on non-x86 sandbox
2022-09-03 07:44:22 -04:00
Heinrich Schuchardt
fbc04c0dab efi_loader: fix display of NVMe EUI-64
UEFI specification 2.9A requires to display the EUI-64 "in hexadecimal
format with byte 7 first (i.e., on the left) and byte 0 last".

This is in contrast to what the NVMe specification wants.
But it is what EDK II has been implementing.

Here is an example with the patch applied:

    qemu-system-aarch64 -machine virt -cpu cortex-a72 -nographic \
    -bios denx/u-boot.bin \
    -device nvme,id=nvme1,serial=9ff81223 \
    -device nvme-ns,bus=nvme1,drive=nvme1n0,eui64=0x123456789ABCDEF0 \
    -drive file=arm64.img,if=none,format=raw,id=nvme1n0

    => nvme scan
    => efidebug devices
    Device Path
    ====================
    /VenHw(…)/NVMe(0x1,f0-de-bc-9a-78-56-34-12)

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-09-03 10:49:17 +02:00
Jose Marinho
648a8dcb39 efi: ECPT add EBBRv2.0 conformance profile
Display the EBBRv2.0 conformance in the ECPT table.

The EBBRv2.0 conformance profile is set in the ECPT if
CONFIG_EFI_EBBR_2_0_CONFORMANCE=y.

Signed-off-by: Jose Marinho <jose.marinho@arm.com>

Add dependencies for CONFIG_EFI_EBBR_2_0_CONFORMANCE.
Enable the setting by default.
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-09-03 10:13:26 +02:00
Jose Marinho
6b92c17352 efi: Create ECPT table
The ECPT table will be included in the UEFI specification 2.9+.
The ECPT table was introduced in UEFI following the code-first path. The
acceptance ticket can be viewed at:
	https://bugzilla.tianocore.org/show_bug.cgi?id=3591

The Conformance Profiles table is a UEFI configuration table that contains
GUID of the UEFI profiles that the UEFI implementation conforms with.

The ECPT table is created when CONFIG_EFI_ECPT=y.
The config is set by default.

Signed-off-by: Jose Marinho <jose.marinho@arm.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-09-03 09:35:48 +02:00
Heinrich Schuchardt
2b7a6e013f efi_selftest: on sandbox use host specific assembly
The selftest checking the handling of exceptions in UEFI binaries is using
assembly to provide an undefined instruction. On the sandbox the correct
form of the instruction depends on the host architecture.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-03 08:16:09 +02:00
Heinrich Schuchardt
e053a144ca efi_loader: support CTRL+\ - CTRL+_
In the extended text input protocol support input of control letters
0x1c - 0x1f.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-03 08:16:09 +02:00
Heinrich Schuchardt
0b7b56d7d7 efi_loader: compliance Simple Text Input Ex Protocol
We cannot expect the buffers passed to the input protocols to be zero
filled. If only modifier keys are pressed, we have to return EFI_NOT_READY
but we still have to fill the key structure.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-03 08:16:09 +02:00
Heinrich Schuchardt
a641e36fdb efi_loader: printing UEFI revision in helloworld.efi
We need to support multiple digits in the parts of the UEFI verision
number. E.g.

    EFI_SPECIFICATION_VERSION = (123 << 16) | 456

must be printed as

    123.45.6

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-03 08:16:09 +02:00
Tom Rini
67fe8cc001 Pull request for efi-2022-10-rc4
Documentation:
 
 * add a page on sending patches
 * bindings for FWU Metadata mtd storage
 * fpio status output fields description
 
 UEFI:
 
 * ensure all block devices are probed
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Merge tag 'efi-2022-10-rc4' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-10-rc4

Documentation:

* add a page on sending patches
* bindings for FWU Metadata mtd storage
* fpio status output fields description

UEFI:

* ensure all block devices are probed
2022-09-02 09:09:47 -04:00
qianfan Zhao
2522bd3ea6 drivers: usb: fastboot: Fix full-speed usb descriptor
The host will report such error message if the fastboot device work in
full-speed mode: "Duplicate descriptor for config 1 interface 0
altsetting 0, skipping"

Fastboot device ack both full and high speed interface descriptors when
work in full-speed mode, that's will cause this issue.

Fix it.

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
Reviewed-by: John Keeping <john@metanate.com>
2022-09-02 13:26:58 +02:00
Geert Uytterhoeven
68083b897b renesas: Fix RPC-IF compatible values
The compatible values used for device nodes representing Renesas Reduced
Pin Count Interfaces were based on preliminary versions of the Device
Tree Bindings.

Correct them in both DTSi files and drivers, to match the final DT
Bindings.

Note that there are no DT bindings for RPC-IF on RZ/A1 yet, hence the
most logical SoC-specific value is used, without specifying a
family-specific value.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-09-02 13:25:01 +02:00
Geert Uytterhoeven
33aca1c868 ARM: renesas: Propagate RPC-IF enablement to subsequent software
As the Renesas Reduced Pin Count Interface may be locked by TF-A, it is
disabled by default[1].  When unlocked, TF-A passes a DT fragment to
enable it, which is applied to the U-Boot DT[2].

Unlike the memory layout, the RPC-IF enablement is not propagated to
subsequent software.  Hence e.g. Linux cannot know if the RPC-IF is
locked or not, and will lock-up when trying to access the RPC-IF when
locked.

Fix this by checking if the RPC-IF is enabled in the TF-A DT fragment, and
setting the status of the RPC-IF device node in the target DT, if
present, to "okay".  Do this only when a "flash" subnode is found, to
avoid errors in subsequent software when the RPC-IF is not intended to
be used.

Note that this requires the status of the RPC-IF node to be set to
"disabled" in the target DT, just like in the U-Boot DT.

[1] commit 3d5f45c95c ("ARM: dts: rmobile: Disable RPC HF by
    default")
[2] commit 361377dbdb ("ARM: rmobile: Merge prior-stage firmware
    DT fragment into U-Boot DT on Gen3")

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-09-02 13:25:01 +02:00
Geert Uytterhoeven
e17205d067 ARM: dts: rmobile: Fix RPC-IF device node names
According to the Generic Names Recommendation in the Devicetree
Specification Release v0.3, and the DT Bindings for the Renesas Reduced
Pin Count Interface, the node name for a Renesas RPC-IF device should be
"spi".  Especially on R-Car Gen3 and RZ/G2, the node name matters, as
the node is enabled by passing a DT fragment from TF-A to U-Boot, and
from U-Boot to subsequent software.

Fix this by renaming the device nodes from "rpc" to "spi".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-09-02 13:25:01 +02:00
Sughosh Ganu
2ac4c98ad3 dt/bindings: Add bindings for FWU Metadata mtd storage
Add bindings needed for accessing the FWU metadata regions.
These include the compatible string which point to the access
method, the actual device which stores the FWU metadata and
the offsets for both metadata regions.

The current patch adds basic bindings needed for accessing the
metadata structure on non-GPT mtd regions.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-09-01 07:42:28 +02:00
Tom Rini
0d8b7f9aee github: Update PR template for new "Patches" content
The old "Patches" wiki page is not available anymore. Now that the
content has been integrated with the submitting_patches document,
reference that instead.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-01 07:26:52 +02:00
Tom Rini
286ed78a2e doc: process, sending_patches: Update and correct the old "Patches" content
- Use gender-neutral language to refer to the user, consistently.
- Reference the checkpatch document.
- Move the section on commit message tags to the process document and
  reference this in sending_patches.rst.
  - Reword the custodian workflow process section to refer to this new
    section, integrate some of the wording from there in this new section.
- Update the comment about GPLv2 applying to August 2022, to be clear
  this still is correct.
- Reword the section about MAKEALL to talk about local build testing and
  link to the CI document.
- Reference the system_configuration document for the note about
  modifying existing code.
- Reword the patchwork flow section.

Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-09-01 07:26:28 +02:00
Tom Rini
6349b186d8 doc: sending_patches.rst: Incorporate the old "Patches" wiki content
Import as-is much of the old "Patches" wiki page to the current
sending_patches.rst file. This means we need to move patman to being
included in the higher level ToC and add a reference for "Custodians" in
the process document. A very minimal amount of content changing and
rewording is done here as part of the import, in order to make the
conversion easier.

Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-01 07:23:53 +02:00