The input sub command was missing from the help text, and it didn't show
the actual value currently read on the GPIO. This allows people to read
the value of input pins.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The CONFIG_BFIN_CPU option is largely used in the build system, so move
it out of the board config.h and into the board config.mk. It'd be nice
to keep everything in the config.h, but the patch to extract that value
early was rejected.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Only the BF561 port was using the common dual core headers, so merge them
into the BF561 specific headers.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Only the BF533 port was using the common extended headers, so merge them
into the BF533 specific headers.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The old MMR defines are being scrubbed, so convert the driver to use the
new standard helper macros.
For the GPIO MMR usage, convert to the new GPIO framework.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Simplify the command setup and status checking steps, and add a proper
timeout to the status polling code to avoid possible infinite hangs.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This moves the last piece from the old spi_flash driver to the new SPI
framework -- optional DMA RX support. This typically cuts speeds by ~40%
at the cost of additional ~300 bytes.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The actual SPI driver for i.MX31 and i.MX51 controller
use a wrong byte ordering, because it is supposed
to work only with Freescale's devices, as the Power
Controllers (PMIC). The driver is not suitable for
general purposes, because the buffers passed to spi_xfer
must be 32-bit aligned, as it is used mainly to send
integer to PMIC devices.
The patch drops any kind of limitation and makes the
driver useful with devices controlled sending commands
composed by single bytes (or by a odd number of bytes), such as
spi flash, sensor, etc.
Because the byte ordering is changed,
any current driver using this controller must be adapted, too.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The handling of the SPI_CPOL bit inside the SPI
driver was wrong. As reported by the manual,
the meaning of the SSPOL inside the
configuration register is the same as reported
by SPI specification (0 if low in idle, 1 is high
on idle). The driver inverts this logic.
Because this patch sets the logic as specified, it is required
to clear the CPOL bit in the configuration file to adapt
to the correct logic.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: David Jander <david.jander@protonic.nl>
As stated in 2720178533,
the mx51evk has not CPLD and all references must be removed.
This patch drop a .h file that still remains in board
directory.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The OMAP3 cpu directory contains a syslib file with some utilities
that can be shared by all targets using arm cortexa8 processors,
not only OMAP.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The patch adds support for setting gpios to the
MX51 processor and change name to the corresponding
functions for MX31. In this way, it is possible to get rid
of nasty #ifdef switches related to the processor type.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Commit 800eb0964 "POST cleanup." removed file
arch/powerpc/cpu/mpc512x/common.c but failed to remove the reference
to it from arch/powerpc/cpu/mpc512x/Makefile which causes somewhat
obscure build errors:
make[1]: *** No rule to make target `/work/wd/tmp-ppc/arch/powerpc/cpu/mpc512x/.depend', needed by `_depend'. Stop.
Fix these.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch adds missing pinmux setup for 4 GPIO signals used on the Beagle xM:
- USB hub reset (gpio_56)
- P8 USB hub reset (gpio_63)
- DVI enable (gpio_129)
- P8 DVI enable (gpio_170)
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Calculate the SDRAM size from DMM configuration registers instead of using
hard-coded values. This gives correct values for all different boards.
It's assumed that DMM sections do not overlap memory areas.
Signed-off-by: Aneesh V <aneesh@ti.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch corrects the pinmux settings to enable proper functioning
of the wifi/bluetooth module.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The version numbering scheme was changed in Oct, 2008.
This patch brings the documentation to the actual level.
The description is taken from:
http://www.denx.de/wiki/U-Boot/ReleaseCycle
Signed-off-by: Thomas Weber <weber@corscience.de>
Changed text slightly.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Commit 2ee951ba (UBI: Enable re-initializing of the "ubi part" command)
reset mtd_devs in ubi_exit() but missed ubi_init()'s failure path.
Signed-off-by: Karl Beldan <karl.beldan@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
On the Freescale P1022, the DIU and the LBC share address pins, which means
that when the DIU is active (e.g. the console is on the DVI display), NOR flash
cannot be accessed. So we use the weak accessor function feature of the CFI
flash code to temporarily switch the pin mux from DIU to LBC whenever we want
to read or write flash. This has a significant performance penalty, but it's
the only way to make it work.
This change allows the 'saveenv' command to work when the video display is
enabled. Erasing flash and writing to flash (with the 'cp' command) works,
but reading from flash (with the 'md' and 'cp' commands) does not. Also, while
flash is being written, the video display will be blank.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Add support for the DIU controller. If CONFIG_VIDEO is defined, then
the console will appear on a DVI monitor instead of the serial port.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Move common code to the fsl_diu_fb.c file and remove obsolete
code from board files (aria, mpc8610hpcd and pdm360ng).
Move fsl_diu_fb.h file to the include directory.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This change lays the groundwork for the BOOTFLAG_* flags being removed.
This change has the small affect of delaying 100ms on PCI initialization
after a warm boot as opposed to the optimal 1ms on some boards.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
included the mpc8308_p1m board.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
continuation of commit 39da1ba923d55f316f9f1bb3a960e4ed91dc17ac:
"e300: increase CONFIG_SYS_BOOTMAPSZ to allow booting large kernels"
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Configuring for MPC8308RDB board...
pcie.c: In function 'mpc83xx_pcie_register_hose':
pcie.c:143: warning: assignment makes pointer from integer without a cast
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch provides support for MPC8308 P1M board with the following
set of features:
Dual UART is supported
NOR flash is supported
Both TSEC Ethernet controllers are supported
PCI Express initialization is supported
Both I2C controllers are supported
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch cleans up the Freescale MPC8308RDB Development board support.
Things fixed:
- Removed unused PCIE2 definitions from configuration
- SICR{L,H} defines used for System I/O Configuration Registers values
instead of hardcoding
- CONFIG_SYS_SCCR_PCIEXP1CM used to enable PCIE clock instead of
writing to SCCR from the board code
- sleep mode stuff removed as MPC8308 has no support for deep sleep and
PMCCR1 register. board_early_init_f() removed.
- MPC8308 has no ERRATA for DDR controller so workaround removed
- 'assignment in if statement' issues solved
- use LBLAWAR_* defines instead of hardcoding
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
