Several host-tools use "bool" type without including <stdbool.h>.
This relies on the crappy header inclusion chain.
tools/Makefile has the following line:
HOST_EXTRACFLAGS += -include $(srctree)/include/libfdt_env.h \
All host-tools are forced to include libfdt_env.h even if they are
totally unrelated to FDT. Then, <stdbool.h> is indirectly included
as follows:
include/libfdt_env.h
-> include/linux/types.h
-> <stdbool.h>
I am fixing this horrible crap. In advance, I need to add necessary
include directives explicitly. tools/fdtgrep.c needs more; <fctl.h>
for open() and <errno.h> for errno.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Now that binman supports creating images with microcode, drop the code from
ifdtool.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
We have the capability to check regions written after U-Boot that
do not overlap. Since regions can also be written before U-Boot,
add such check for these too.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Andy Pont <andy.pont@sdcsystems.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
When ifdtool collates the microcode into one place it effectively creates
a copy of the 'data' properties in the device tree microcode nodes. This
is wasteful since we now have two copies of the microcode in the ROM.
To avoid this, remove the microcode data from the device tree and shrink it
down. This means that there is only one copy and the overall ROM space used
by the microcode does not increase.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
The Intel Firmware Support Package (FSP) requires that microcode be provided
very early before the device tree can be scanned. We already support adding
a pointer to the microcode data in a place where early init code can access.
However this just points into the device tree and can only point to a single
lot of microcode. For boards which may have different CPU types we must
support multiple microcodes and pass all of them to the FSP in one place.
Enhance ifdtool to scan all the microcode, place it together in the ROM and
update the microcode pointer to point there. This allows us to pass multiple
microcode blocks to the FSP using its existing API.
Enable the flag in the Makefile so that this feature is used by default for
all boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
The code to set up the microcode pointer in the ROM shares almost nothing
with the write_uboot() function.
Move it into its own function so it will be easier to extend.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Since U-Boot and its device tree can grow we should check that it does not
overlap the regions above it. Track the ROM offset that U-Boot reaches and
check that other regions (written after U-Boot) do not interfere.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
On 32-bit machine strtol() returns LONG_MAX which is 0x7fffffff,
which is wrong for u-boot.rom components like u-boot-x86-16bit.bin.
Change to use strtoll() so that it works on both 32-bit and 64-bit
machines.
Reported-by: Fei Wang <wangfei.jimei@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
We should ignore those regions whose size is negative. These are
typically optional and unused regions (like GbE and platform data).
Change-Id: I65ad01746144604a1dc0588b617af21f2722ebbf
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
This currently assumes that U-Boot resides at the start of ROM. Update
it to remove this assumption.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Some Intel CPUs use an 'FSP' binary blob which provides an inflexible
means of starting up the CPU. One result is that microcode updates can only
be done before RAM is available and therefore parsing of the device tree
is impracticle.
Worse, the addess of the microcode update must be stored in ROM since a
pointer to its start address and size is passed to the 'FSP' blob. It is
not possible to perform any calculations to obtain the address and size.
To work around this, ifdtool is enhanced to work out the address and size of
the first microcode update it finds in the supplied device tree. It then
writes these into the correct place in the ROM. U-Boot can then start up
the FSP correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Rather than two independent arrays, use a single array of a suitable
structure. Also add a 'type' member since we will shortly add additional
types.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When a file is missing it helps to know which file. Update the error message
to print this information.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is missing a parameter. Fix it to avoid a warning when debug is
enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
To allow these options to be specified together, separate them out.
Change-Id: Ib93f11cd51eb3302127f4c82936ff2b44c88d5a2
Signed-off-by: Simon Glass <sjg@chromium.org>
Currently ifdtool only supports writing one file (-w) at a time.
This looks verbose when generating u-boot.rom for x86 targets.
This change allows at most 16 files to be written simultaneously.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Allow an empty ROM to be created, without needing to provide a descriptor.
The descriptor is not needed on some x86 boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
Newer Intel chips require a Management Engine which requires a particular
format for the SPI flash that contains the boot loader. Add a tool that
supports creating and modifying these ROM images.
This tool is from Chrome OS but has been cleaned up to use U-Boot style
and to add comments. A few features have been added also.
Signed-off-by: Simon Glass <sjg@chromium.org>
