Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2024-11-10 07:04:28 +00:00
Code Issues Projects Releases Packages Wiki Activity

x86: Add ifdtool for working with Intel Flash Descriptor ROM images

Browse source 
Newer Intel chips require a Management Engine which requires a particular
format for the SPI flash that contains the boot loader. Add a tool that
supports creating and modifying these ROM images.

This tool is from Chrome OS but has been cleaned up to use U-Boot style
and to add comments. A few features have been added also.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2014-11-10 18:00:22 -07:00
parent e5901c94e3
commit cd392fe8a0
3 changed files with 1129 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
tools/Makefile
View file

@ -126,6 +126,8 @@ hostprogs-$(CONFIG_EXYNOS5250) += mkexynosspl
hostprogs-$(CONFIG_EXYNOS5420) += mkexynosspl
HOSTCFLAGS_mkexynosspl.o := -pedantic
hostprogs-$(CONFIG_X86) += ifdtool
hostprogs-$(CONFIG_MX23) += mxsboot
hostprogs-$(CONFIG_MX28) += mxsboot
HOSTCFLAGS_mxsboot.o := -pedantic

1039
tools/ifdtool.c Normal file
View file

File diff suppressed because it is too large Load diff

88
tools/ifdtool.h Normal file
View file

@ -0,0 +1,88 @@
/*
* ifdtool - Manage Intel Firmware Descriptor information
*
* Copyright (C) 2011 The ChromiumOS Authors.
*
* SPDX-License-Identifier: GPL-2.0
*
* From Coreboot project
*/
#include <stdint.h>
#define __packed __attribute__((packed))
#define IFDTOOL_VERSION "1.1-U-Boot"
enum spi_frequency {
SPI_FREQUENCY_20MHZ = 0,
SPI_FREQUENCY_33MHZ = 1,
SPI_FREQUENCY_50MHZ = 4,
};
enum component_density {
COMPONENT_DENSITY_512KB = 0,
COMPONENT_DENSITY_1MB = 1,
COMPONENT_DENSITY_2MB = 2,
COMPONENT_DENSITY_4MB = 3,
COMPONENT_DENSITY_8MB = 4,
COMPONENT_DENSITY_16MB = 5,
};
/* flash descriptor */
struct __packed fdbar_t {
uint32_t flvalsig;
uint32_t flmap0;
uint32_t flmap1;
uint32_t flmap2;
uint8_t reserved[0xefc - 0x20];
uint32_t flumap1;
};
#define MAX_REGIONS 5
/* regions */
struct __packed frba_t {
uint32_t flreg[MAX_REGIONS];
};
/* component section */
struct __packed fcba_t {
uint32_t flcomp;
uint32_t flill;
uint32_t flpb;
};
#define MAX_STRAPS 18
/* pch strap */
struct __packed fpsba_t {
uint32_t pchstrp[MAX_STRAPS];
};
/* master */
struct __packed fmba_t {
uint32_t flmstr1;
uint32_t flmstr2;
uint32_t flmstr3;
};
/* processor strap */
struct __packed fmsba_t {
uint32_t data[8];
};
/* ME VSCC */
struct vscc_t {
uint32_t jid;
uint32_t vscc;
};
struct vtba_t {
/* Actual number of entries specified in vtl */
struct vscc_t entry[8];
};
struct region_t {
int base, limit, size;
};