Commit graph

68674 commits

Author SHA1 Message Date
Michal Simek
a2c87cb82a xilinx: versal: Fix compilation error when !CONFIG_NET
PXE and DHCP shouldn't be listed when commands are not enabled that's why
handle it in the same way as is done for Zynq and ZynqMP.

Fixes: ec48b6c991 ("arm64: versal: Add support for new Xilinx Versal ACAPs")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 14:29:57 +02:00
Michal Simek
e3259a700a xilinx: r5: Fix MPU setting for R5
Map all resource for R5 to operate properly.
The patch is done based on the commit 23f7b1a776 ("armv7R: K3: am654:
Enable MPU regions") which also map the whole 4GB at first and then change
mapping for DDR.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:41 +02:00
Michal Simek
b76907ef90 xilinx: r5: Disable EFI loader
Xilinx ZynqMP R5 configuration is quite minimal and there is no reason to
enable EFI for it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:41 +02:00
Michal Simek
975bacc16e spl: Kconfig: Record proper dependency for SPL_ATF
ATF support was all the time based on FIT image support but this dependency
is not recorded anywhere.
For !SPL_FIT && SPL_ATF there is compilation error:
common/spl/spl.c: In function 'board_init_r':
common/spl/spl.c:689:26: error: 'struct spl_image_info' has no member named 'fdt_addr'
  689 |   spl_fixup_fdt(spl_image.fdt_addr);

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:41 +02:00
Michal Simek
7514fd3447 xilinx: Disable CONFIG_EFI_LOADER_BOUNCE_BUFFER for ZynqMP/Versal
Both SOCs shouldn't have any problem with 64bit dma accesses. Also with PIE
enabled when u-boot is placed above 4GB without any memory mapped below 4GB
address space efi_memory_init() call is failing due to missing memory node.

For this two reason disable this option for ZynqMP and Versal.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:41 +02:00
Michal Simek
0981ef71bd mmc: zynq: Fix incorrect indentation
Trivial fix.

Fixes: d1f4e39d58 ("mmc: zynq_sdhci: Add support for SD3.0"
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:41 +02:00
Michal Simek
a798b8aaf3 fpga: zynqmp: Protect zynqmp_loads() for SPL
if conditions should match.

Fixes: a18d09ea38 ("fpga: zynqmp: Add secure bitstream loading for ZynqMP")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:41 +02:00
Michal Simek
29bd8ada52 fpga: kconfig: Rename SPL_FPGA_SUPPORT to SPL_FPGA
The patch does sed 's/SPL_FPGA_SUPPORT/SPL_FPGA/g' but also fixing Makefile
and zynqmp.c to simplify if/endif logic in zynqmp.c.

This change is mostly done to be able to use CONFIG_IS_ENABLED macro and
obj-$(CONFIG_$(SPL_)FPGA) in Makefile. For them symbols need to be in sync.

And removing one line from Topic Miami boards which is not needed because
symbol is not enabled via Kconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-23 10:31:41 +02:00
Michal Simek
b7d4518eed fpga: zynqmp: Get rid of ZYNQMP_SIP_SVC* macros
There is no need to use these macros because enum pm_api_id can be used
instead.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:41 +02:00
Michal Simek
e2572b5544 xilinx: common: Do not save fdt_blob to bss section
For SPL flow without specifying address for DT loading DTB is automatically
appended behind U-Boot code. Specifically _end symbol is used. Just behind
it there is place for bss section.
It means if early code is using static variable and there is a write to
this variable DTB file is corrupted if variable is located between DTB
start and end.
In this particular case offset of this variable from bss section start is
very small (0x40) that's why DT is currupted which breaks this boot flow.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:41 +02:00
Michal Simek
6cb402f38e ARM: zynqmp: Fix SPL_DM_SPI dependencies
Add missing dependencies for DM_SPI_FLASH.
Kconfig reports it as:
WARNING: unmet direct dependencies detected for SPL_DM_SPI_FLASH
  Depends on [n]: SPL [=n] && SPL_DM [=n]
  Selected by [y]:
  - ARCH_ZYNQMP [=y] && <choice> && SPL_DM_SPI [=y]

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:41 +02:00
Michal Simek
c3f1eaa32d arm64: versal: Generate position-independent pre-relocation code
Enable position independent pre-relocation to let users options to put
u-boot to different locations.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Michal Simek
1025bd098a xilinx: zynqmp: Add support for saving variables
Enabling saving variables to MMC(FAT), NAND, SPI based on primary bootmode.
Maybe that logic can be tuned for more complicated use cases and better
tested for different bootmodes.

Tested on zcu104 to SD(FAT) and JTAG(NOWHERE).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Michal Simek
4d9bc795ae xilinx: zynqmp: Get zynqmp_get_bootmode() out of CONFIG_BOARD_LATE_INIT
This function will be also used by different code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Michal Simek
ced4d46626 xilinx: zynqmp: Remove one static variable
There is no reason to have name variable saved in BSS section when it
doesn't need to be really used. That's why remove static from variable
definition and use strdup() to duplicate string with exact size from malloc
area instead.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Michal Simek
e17c5ec8e1 xilinx: zynqmp: Add missing 43/46/47dr ID codes
Add support for 43/46/47dr devices.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Ibai Erkiaga
fa793165da xilinx: zynqmp: refactor silicon name function
Current algorithm used to get the silicon name is bit complicated and
hard to follow. Updated to use more straightforward mechanism based on
the Device ID code table (Table 1-2). The full IDCODE register is used
(except device revision bits [31:28]) to get the device name and IDCODE2
value is used for identifying the variant.

Additionally to make the algorithm bit more clear it also save some space
as the devices table is slightly bit smaller.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Ashok Reddy Soma
2783e02da8 xilinx: versal: Enable AXI ethernet driver
Enable AXI ethernet driver for Versal platforms.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Ashok Reddy Soma
315a3c3377 net: xilinx: axi_emac: Typecast flush_cache arguments
flush_cache() arguments are not type casted to take care of 64 bit
systems. Use phys_addr_t to type cast for it to work properly for 32 bit
and 64 bit systems.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2020-09-23 10:31:40 +02:00
Ashok Reddy Soma
f9d3b31883 net: xilinx: axi_emac: Fix dma descriptors for 64bit and compilation warnings
There are compilation warnings showing up when we compile AXI ethernet
driver for 64bit architectures. Fix them, so that it works on both 32
and 64 bit architectures.

DMA descriptors are not taking care of 64bit addresses. To fix it,
change axidma_bd members as below:

next		==>	next_desc
reserverd1	==>	next_desc_msb
phys		==>	buf_addr
reserverd2	==>	buf_addr_msb

and update next_desc and buf_addr with lower 32 bits of the addresses,
update next_desc_msb and buf_addr_msb with upper 32 bits of the 64bit
addresses.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2020-09-23 10:31:40 +02:00
Harini Katakam
abe450322e include: dt-bindings: Add MSCC header
Add MSCC header with delay definitions for VSC8531 and associated
family devices.

Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Michal Simek
96a60c03b9 arm64: zynqmp: Change bl2_plat_get_bl31_params() guarding
It was protected just for SPL_OS_BOOT but this function is only called when
SPL_ATF is enabled that's why change macro name.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Michal Simek
a253092d49 nand: Kconfig: Change dependency for NAND_ARASAN
NAND_ARASAN selecting DM_MTD uunconditionally. Driver can be enabled with
!DM that's why Kconfig it showing it as error:

WARNING: unmet direct dependencies detected for DM_MTD
  Depends on [n]: DM [=n]
  Selected by [y]:
  - NAND_ARASAN [=y] && MTD_RAW_NAND [=y]

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-09-23 10:31:40 +02:00
Saeed Nowshadi
ed6d31c8a6 arm64: zynqmp: Correct value of shunt resistor for VCCINT and VCC_SOC
Value of shunt resistor for INA226s that monitor VCCINT and VCC_SOC power
rails are incorrect.  This patch corrects those values.

Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
2020-09-23 10:31:40 +02:00
Saeed Nowshadi
02abe1fbf3 arm64: zynqmp: Add device tree node for 2nd mux on I2C1 bus
There is 2nd pca9548 mux on I2C1 bus that controls SFP0, SFP1, and QSFP1
ports. Channel 0 and 1 are connected to J287 connector for SFP0 & SFP1, and
channel 2 is connected to J288 connector for QSFP1.

Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
T Karthik Reddy
276504ed3e xilinx: Enable uartlite driver for Versal/ZynqMP
Add CONFIG_XILINX_UARTLITE config to versal/zynqmp defconfig to
enable uartlite driver support by default.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
T Karthik Reddy
31a359f87e serial: uartlite: Add support to work with any endianness
This endinness changes are taken from linux uartlite driver.
Reset TX fifo in control register and check TX fifo empty
flag in lower byte of the status register to detect if it
is a little endian system. Based on this check, program the
registers with le32 or be32 through out the driver.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Ashok Reddy Soma
592ac77342 configs: xilinx: Enable configs required for ubifs
Enable required configs for using ubifs in uboot.

UBIFS testing procedure from u-boot:
Let's say we have two partitions in dt as below and want to format
partition1 "images" with ubifs.

	partition@0 {
		label = "boot";
		reg = <0x0 0x1000000>;
	};

	partition@1 {
		label = "images";
		reg = <0x1000000 0x7000000>;
	};

We will format the partition from linux and copy some files and access
from uboot later.
First thing, in linux config disable CONFIG_MTD_SPI_NOR_USE_4K_SECTORS.
this is required as ubifs expects min LEB size as 15*1024 bytes.

Use below commands in linux to format "images" partition with ubifs.

ubiformat /dev/mtd1
ubiattach /dev/ubi_ctrl -m 1
ubimkvol /dev/ubi0 -N images -m
mount -t ubifs ubi0:images /mnt

We can copy files to /mnt and unmount it.

To access this ubifs partition from uboot, run below commands.
(Don't forget to probe device before, e.g. sf probe 0 0 0)

setenv mtdids "nor0=nor0"
setenv mtdparts "mtdparts=nor0:16m(boot),112m(images)"
ubi part images
ubifsmount ubi0:images

make sure we match "mtdparts" to whatever is given in dt w.r.t partition
sizes.

"mtdparts" command will list the mtd partitions in u-boot.

Once ubifs is mounted, we can use "ubifsls" to list the files in that
partition and use "ubifsload <addr> <filename>" to load files from ubifs
partition to DDR.

Reading information about mtd layout from DT is not supported.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
T Karthik Reddy
78d844c6ac microblaze: Add support for little/big endian in/out api's
Add read/write memory utilities for 16 and 32 bits. Add these
api's for both little and big endian systems similar to arm
architecture.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Michal Simek
1a005b4ae4 board: xilinx: Enable changing default DTB pick up address
U-Boot on xilinx boards is checking one address where DTB can be placed as
the first location for DTB. Originally this code was developed for Versal
where QEMU was putting generated DTB for U-Boot to use.
The patch enables changing this address which is necessary for cases where
default address is pointing to location (DDR) which is not present. The
access to this location can cause exception.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Michal Simek
6ba36c0e59 xilinx: kconfig: Move sourcing of board Kconfig to mach folders
Do not source xilinx board Kconfig by other boards. These configs should be
available only when Xilinx platforms are selected.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Michal Simek
54fdef242f xilinx: kconfig: Change Kconfig dependencies for Xilinx drivers
Zynq/ZynqMP/Versal IPs should be possible to called also from Microblaze in
PL and vice versa. That's why change dependencies and do not limit enabling
just for some platforms.

This is follow up patch based on commit 664e16ce99 ("xilinx: kconfig:
Change Kconfig dependencies for Xilinx drivers").

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Michal Simek
7fa8d5e0ee env: kconfig: Add default option for ARCH_ZYNQ
Zynq is similar to ZynqMP u-boot feature wise that's why also enable
default option for ENV_FAT_DEVICE_AND_PART Kconfig entry.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Michal Simek
8c40e07aab net: gem: Add support for more PHYs on MDIO bus
Find out MDIO bus and enable MDIO access to it if this is done via
different GEM controller. Only works across GEM instances.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Michal Simek
6c0e59fcd9 xilinx: drivers: Use '_' instead of '-' in driver name
The most of drivers are using '_' instead of '-' in driver name. That's why
sync up these names to be aligned. It looks quite bad to see both in use.
It is visible via dm tree command.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-23 10:31:40 +02:00
Tom Rini
55004fa433 - mips: vocore2: fix SPL image generation
- mips: vocore2: fix LZMA decompression errors
 - mips: vocore2: fix console output
 - mips: pic32mzda: fix DTC warnings and GPIO nodes
 - mips: pic32mzda: make GPIO and MMC working again
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Merge tag 'mips-fixes-for-2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-mips

- mips: vocore2: fix SPL image generation
- mips: vocore2: fix LZMA decompression errors
- mips: vocore2: fix console output
- mips: pic32mzda: fix DTC warnings and GPIO nodes
- mips: pic32mzda: make GPIO and MMC working again
2020-09-22 22:08:16 -04:00
Mauro Condarelli
7d1538cc9b mips: vocore2: fix various issues
- fix SPL image generation
- fix incorrect console output
- increase malloc_f and malloc_r space to fix LZMA decompression errors
- increase SPI flash clock

Signed-off-by: Mauro Condarelli <mc5686@mclink.it>
[squashed to one patch, fix commit subject and description]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-09-23 00:14:56 +02:00
John Robertson
bd25f9a69f mips: dts: Fix PIC32MZDA GPIO register definitions
The GPIO bank name for banks J and K are not correct when using the
'gpio' command from the console.

The driver derives the bank name from the device tree instance string by
using the instance value and adding 'A': gpio0@xxaddrxx is Bank A,
gpio1@yyaddryy is Bank B and so on.

On the PIC32, there is no Bank I so instances 8 and 9 need to be
incremented as a minimum change.

An alternative (less opaque) implementation would be to use a bank-name
property instead but this would require modifying the driver code too.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:29 +02:00
John Robertson
81b543a4e6 mips: dts: Fix PIC32MZDA GPIO register definitions
GPIO state cannot be changed via the device tree (e.g. with gpio-hog) or
using the 'gpio' command from the console.

The root cause is a discrepancy between the driver and the device tree:
the driver code expects an absolute I/O address in the <reg> property,
while the device tree defines the address relative to a declaration in
the parent pinctrl node.

Changing the device tree to fix a driver issue would normally be wrong,
however:
- I have run the first version of U-Boot in which this driver appears
  (v2016.03) and the same problem exists, so this is not a regression;
- There is no code that references a parent device tree node that might
  suggest the intent of the author was to parse the DT as it exists now;
- The equivalent Linux PIC32 GPIO driver also uses absolute addresses
  for the GPIO <reg> property. This change brings the U-Boot DT more
  into line with Linux.

Additionally, the data sheet (Microchip ref. 60001361H) shows that the
register set to control a GPIO bank spans 0xE0 bytes, but the device
tree specified size is only 0x48 bytes.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:28 +02:00
John Robertson
0723c2ddeb mips: dts: Fix device tree warnings for PIC32MZDA
Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:28 +02:00
John Robertson
95e7141294 mips: pic32mzdask: enable CONFIG_BLK
CONFIG_BLK needs to be enabled by default to allow U-Boot to
compile after a 'make pic32mzdask_defconfig'.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:21 +02:00
John Robertson
69af033fb9 mips: pic32mzdask: disable SDHCI SDCD signal workaround
The PIC32MZ DA Starter Kit does not need the card detect workaround
because the SDCD signal line is connected properly. Disable the
workaround in this case.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:14 +02:00
John Robertson
10d65bf00b pinmux: pic32: add SDHCI pin config
The GPIO pins used by the SDHCI controller need to be configured to
allow the interface to work.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:08:52 +02:00
John Robertson
6978db36aa mmc: pic32: Refresh PIC32 MMC driver
The existing driver is not compatible with the Driver Model.

This patch makes the necessary changes while also removing obsolescent
calls/properties as follows:

- fdtdec_* calls replaced with dev_read_* equivalents;
- 'clock-freq-min-max' property replaced by querying the frequency of
  the source clock 'base_clk';
- The card detect erratum workaround is applied during probe rather than
  overriding get_cd.

The card detect workaround (Microchip ref. DS80000736E, erratum #15) is
not always needed and can be disabled using a vendor specific DT
property.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:08:52 +02:00
Tom Rini
3c1e6a6c23 binman enhancements for FIT
sunxi64 conversion to use binman
 New 'no-map' property for reserved memory
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Merge tag 'dm-pull-22sep20' of git://git.denx.de/u-boot-dm into next

binman enhancements for FIT
sunxi64 conversion to use binman
New 'no-map' property for reserved memory
2020-09-22 16:59:48 -04:00
Tom Rini
5949f36f08 Merge branch '2020-09-22-assorted-bugfixes'
- Fix for environment location on some PowerPC boards
- Typo / documentation fix
- Two fixes for mpc8xxx
2020-09-22 16:47:48 -04:00
Heinrich Schuchardt
e5b35f706d log: mute messages generated by log drivers
When a message is written by a log driver (e.g. via the network stack) this
may result in the generation of further messages. We cannot allow these
additional messages to be emitted as this might result in an infinite
recursion.

Up to now only the syslog driver was safeguarded. We should safeguard all
log drivers instead.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-22 12:54:13 -06:00
Patrick Delaunay
01d89e3d12 dm: add cells_count parameter in live DT APIs of_parse_phandle_with_args
In the live tree API ofnode_parse_phandle_with_args, the cell_count
argument must be used when cells_name is NULL.

But this argument is not provided to the live DT function
of_parse_phandle_with_args even it is provided to
fdtdec_parse_phandle_with_args.

This patch adds support of the cells_count parameter in dev_ and
of_node API to allow migration and support of live DT:
- of_parse_phandle_with_args

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-22 12:54:13 -06:00
Etienne Carriere
3e15c315f9 optee: add property no-map to secure reserved memory
OP-TEE reserved memory node must set property "no-map" to prevent
Linux kernel from mapping secure memory unless what non-secure world
speculative accesses of the CPU can violate the memory firmware
configuration.

Fixes: 6ccb05eae0 ("image: fdt: copy possible optee nodes to a loaded devicetree")
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2020-09-22 12:54:13 -06:00
Patrice Chotard
6613ed1e07 test: fdtdec: Add test for new no-map fdtdec_add_reserved_memory() parameter
Add a test to verify that the no-map property is added in reserved-memory
node when fdtdec_add_reserved_memory() no-map parameter is set to true.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-22 12:54:13 -06:00