xilinx: Enable uartlite driver for Versal/ZynqMP

Add CONFIG_XILINX_UARTLITE config to versal/zynqmp defconfig to
enable uartlite driver support by default.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
T Karthik Reddy 2020-08-14 03:02:17 -06:00 committed by Michal Simek
parent 31a359f87e
commit 276504ed3e
2 changed files with 2 additions and 0 deletions

View file

@ -79,6 +79,7 @@ CONFIG_MII=y
CONFIG_ZYNQ_GEM=y
CONFIG_ARM_DCC=y
CONFIG_PL01X_SERIAL=y
CONFIG_XILINX_UARTLITE=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_USB=y

View file

@ -122,6 +122,7 @@ CONFIG_ZYNQ_GEM=y
CONFIG_SCSI=y
CONFIG_DM_SCSI=y
CONFIG_ARM_DCC=y
CONFIG_XILINX_UARTLITE=y
CONFIG_ZYNQ_SERIAL=y
CONFIG_SPI=y
CONFIG_ZYNQ_SPI=y