Commit graph

62634 commits

Author SHA1 Message Date
Masahiro Yamada
49a7282d76 ARM: dts: uniphier: add pinmux nodes for I2C ch5, ch6
The next generation SoC can connect on-board slave devices via
I2C ch5 and ch6.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-01-09 01:57:05 +09:00
Peng Ma
964b90f61d ata: fsl_sata: Continue probing other sata port when failed current port.
In the initialization of sata driver, we want to initialize all port
 probes, Therefore, any detection failure between of them should continue
 initialization by skipping the current port instead of exit.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
2020-01-08 09:27:44 -05:00
Peng Ma
40cdf26eeb ata: sata_sil: Continue probing other sata port when failed current port.
In the initialization of sata driver, we want to initialize all port
 probes, Therefore, any detection failure between of them should continue
 initialization by skipping the current port instead of exit.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
2020-01-08 09:27:44 -05:00
Patrice Chotard
74bb4570a9 treewide: Remove CONFIG_SYS_UBOOT_START from configs board files
As previous CONFIG_SYS_UBOOT_START is now set by default to
CONFIG_SYS_TEXT_BASE when not defined, CONFIG_SYS_UBOOT_START
can be removed from include/configs board files.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
2020-01-08 09:27:44 -05:00
Patrice Chotard
38a6cce657 Makefile: Fix CONFIG_SYS_UBOOT_START default value
This patches restores boot on boards which rely on
CONFIG_SYS_UBOOT_START equal to CONFIG_SYS_TEXT_BASE when using SPL

Fixes: d3e97b53c1 ("spl: fix entry_point equal to load_addr")

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-08 09:27:44 -05:00
Tom Rini
14a2dee765 cmd/Kconfig: Add more dependencies to OSE bootm support
Per Enea OSE documentation, it supports some classes of ARM, PowerPC and
X86.  Limit the option to those platforms.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-08 09:27:44 -05:00
Peng Fan
028c8c4119 imx: imx8mn: enable CONFIG_CMD_ERASEENV
enable CONFIG_CMD_ERASEENV to make it easy to erase env.
Use savedefconfig to generate new defconfig.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
213daa3a57 imx: imx8mn_evk: add board_mmc_get_env_dev
Add board_mmc_get_env_dev, otherwise,
Loading Environment from MMC...
MMC Device 0 not found
*** Warning - No MMC card found, using default environment

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
e6c4c9d060 imx8mn: evk: add README
Add a README for users to build a workable image.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
439321b264 imx: add i.MX8MP EVK board
Add basic i.MX8MP EVK board support

U-Boot SPL 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800)
power_pca9450b_init
DDRINFO: start DRAM init
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Normal Boot
Failed to find clock node. Check device tree
WDT:   Not found!
Trying to boot from BOOTROM
image offset 0x8000, pagesize 0x200, ivt offset 0x0

U-Boot 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800)

CPU:   Freescale i.MX8MP rev1.0 at 1000 MHz
Reset cause: POR
Model: NXP i.MX8MPlus EVK board
DRAM:  6 GiB
MMC:   FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
Net:   No ethernet found.
Hit any key to stop autoboot:  0
u-boot=> mmc list
FSL_SDHC: 1 (SD)
FSL_SDHC: 2

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
234187e2bc imx: imx8m: add imximage-8mp-lpddr4.cfg
Add imximage-8mp-lpddr4.cfg for imximage usage, almost same
as i.MX8MN ddr4 cfg, but with different ddr firmware

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
c4cc283498 clk: imx: add i.MX8MP clk driver
Add i.MX8MP clk driver for i.MX8MP CLK driver model usage

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
6ddde48b49 clk: imx: add imx_clk_mux2_flags
Add imx_clk_mux2_flags which will be used by i.MX8MP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
19957ee33d imx: imx8m: only support non-dm code in clock_imx8mm.c
The drivers/clk/imx/*.c are used for CLK dm case, the
clock_imx8mm.c is used for non CLK dm case, let's split
it. Sometimes it is hard to enable CLK dm in SPL stage,
considering code size, malloc size requirement, the splittion
will make it easy to use non CLK dm in SPL stage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
9d5e1aa78b imx: Kconfig: make SPL_IMX_ROMAPI_LOADADDR visible to i.MX8MP
i.MX8MP ROM support ROMAPI as i.MX8MN, so make
SPL_IMX_ROMAPI_LOADADDR visible to i.MX8MP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
20cd453f97 imx: add i.MX8MP PE property
i.MX8MP does not have LVTTL, it has a PE property

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
b7590fc43c imx: imx8mp: add pin header file
Add pin header file for i.MX8MP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Ye Li
22172f6b7f power: Add new PMIC PCA9450 driver
PCA9450 PMIC series is used to support iMX8MM (PCA9450A) and
iMX8MN (PCA9450B). Add the PMIC driver for both PCA9450A and PCA9450B.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
c86987d067 arm: dts: freescale: Add i.MX8MP dtsi support
The i.MX8M Plus Media Applications Processor is part of the growing
mScale family targeting the consumer and industrial market. It brings
an effective Machine Learning and AI accelerator that enables a new
class of applications. It is built in Samsung 14LPP to achieve both
high performance and low power consumption and relies on a powerful
fully coherent core complex based on a quad core ARM Cortex-A53 cluster
and Cortex-M7 low-power coprocessor, audio digital signal processor,
machine learning and graphics accelerators.

Add the basic dtsi support for i.MX8MP.

Patch from Anson Huang for Kernel
https://patchwork.kernel.org/patch/11310915/

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
4a41a1a6f0 ddr: imx8m: Add DRAM PLL to generate 1000Mhz output
We will generate DRAM 4000MT/s as default for i.MX8MP.
So need DRAM PLL to generate 1000Mhz clock to DDR PHY and controller.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
67f3f32c6a mxc_ocotp: support i.MX8MP
i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks
and ctrl register bit definitions, so update to reflect that.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
d8293e984b pinctrl: imx8m: support i.MX8MP
Add i.MX8MP compatible to let the pinctrl driver could support
i.MX8MP.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
e997d30be8 imx: imx8m: add 1GHz fracpll entry
4000MTS DDR needs 1GHz fracpll, so add the entry

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
db4510ff8e imx: imx8mp: add basic clock
i.MX8MP has similar architecture as i.MX8MN, but it has different
clk root and index, so add that to make i.MX8MP could use
the non-dm clock driver.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
d857a6a697 arm: dts: add i.MX8MP pinfunc header
Add i.MX8MP pinfunc header for dts usage

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
8ac4d76144 dt-bindings: clock: add i.MX8MP clock header
Add i.MX8MP clock header

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
7df6397eb4 imx: spl: support i.MX8MP spl_boot_device
i.MX8MP follows i.MX8MN, so just let it use spl_board_boot_device

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
de749aecbb imx: imx8m: add Kconfig entry for i.MX8MP
Add Kconfig entry for i.MX8MP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
13868eaf06 imx: cpu: enlarge bit mask to 0x1FF for cpu type
i.MX8MP use 0x182 as dummy id, 0xFF is not able the get the highest
bit, so enlarge bit mask to 0x1FF to make it could detect
cpu type correctly

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
a07c718129 imx8mp: set BYPASS ID SWAP to avoid AXI bus errors
Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to
generated AXI bus errors with TZC380 enabled.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
625b03d810 imx: get cpu id/type of i.MX8MP
Support get i.MX8MP cpu id and cpu type

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
392a4e6dd3 imx: imx8mq: handle ESDHC in mxc_get_clock
fsl_esdhc_imx driver will call "mxc_get_clock(MXC_ESDHC_CLK +
dev->seq)", however mxc_get_clock wrongly handle MXC_ESDHC_CLK
as root clk and cause sd card could not be detected in U-Boot proper,
as below:
"Loading Environment from MMC... unable to select a mode"

Handle MXC_ESDHC_CLK in mxc_get_clock to fix the issue.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Baruch Siach <baruch@tkos.co.il>
Tested-by: Fabio Estevam <festevam@gmail.com>
2020-01-08 13:18:55 +01:00
Fabio Estevam
279d0ab352 wandboard: Remove repeated PMIC string
After the conversion to DM_PMIC the following output is seen:

PMIC:  PMIC:  PFUZE100 ID=0x10

Remove the unnecessary PMIC string from the board file to
avoid the repetead string.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-01-08 10:51:56 +01:00
Fabio Estevam
21f77b77af wandboard: Fix the DM_PMIC conversion
Commit ec837c82d7 ("imx6: wandboard: convert to DM_PMIC")
caused the following pmic_get() error:

CPU:   Freescale i.MX6QP rev1.0 at 792 MHz
Reset cause: POR
DRAM:  2 GiB
PMIC:  pmic_get() ret -19
...

and since the PMIC presence is used to determine the board D1 revision,
the following error is seen when booting a board rev D1:

WARNING: Could not determine dtb to use

and the kernel does not boot at all.

Fix the regression by passing "pfuze100@8" as the correct parameter
to the pmic_get() function in the DM case.

Fixes: ec837c82d7 ("imx6: wandboard: convert to DM_PMIC")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-01-08 10:51:45 +01:00
Rasmus Villemoes
fddf876a8f mpc83xx_clk: always treat MPC83XX_CLK_PCI as invalid
The current mpc83xx_clk driver is broken for any board for which
mpc83xx_has_pci() is true, i.e. anything not MPC8308:

When is_clk_valid() reports that MPC83XX_CLK_PCI is valid,
init_all_clks() proceeds to call init_single_clk(), but that doesn't
know about either MPC83XX_CLK_PCI or has any handling of the
TYPE_SCCR_ONOFF mode correctly returned by retrieve_mode(). Hence
init_single_clk() ends up returning -EINVAL, and the whole board hangs
in serial_init().

The quickest fix is to simply pretend that clock is invalid for
all, since nobody can have been relying on it. Adding proper support
seems to be a bit more involved than just handling TYPE_SCCR_ONOFF:

- The power-on-reset value of SCCR[PCICM] is 0, so
  mpc83xx_clk_enable() would probably need to be tought to enable the
  clock.

- The frequency of PCI_SYNC_OUT is either SYS_CLK_IN or SYS_CLK_IN/2
  depending on the CFG_CLKIN_DIV configuration input, but that can't
  be read from software, so to properly fill out
  ->speed[MPC83XX_CLK_PCI] I think one would need guidance from
  Kconfig or dtb.

Partially fixes: 07d538d281 clk: Add MPC83xx clock driver

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
2020-01-08 08:14:36 +01:00
Rasmus Villemoes
42a13a0b9f mpc83xx: set MPC83XX_GPIO_CTRLRS to 2 for MPC8309
The MPC8309 has two gpio controllers (which is already correctly
reflected in its struct immap definition).

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
2020-01-08 08:14:20 +01:00
Rasmus Villemoes
375d817d9e mpc83xx: immap_83xx: add spi8xxx_t in immap for mpc8309
Allow drivers/spi/mpc8xxx_spi.c to be built for an mpc8309 target.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
2020-01-08 08:14:14 +01:00
Rasmus Villemoes
a3c1e0e067 powerpc: mpc83xx: convert CONFIG_FSL_ELBC to Kconfig
This complements commit 068789773d which did the conversion for
mpc85xx.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
2020-01-08 08:14:09 +01:00
Rasmus Villemoes
392b385d9d mpc83xx: make ARCH_MPC8309 select SYS_FSL_ERRATUM_ESDHC111
The mpc8309 is also affected by the "Manual Asynchronous CMD12 abort
operation causes protocol violations" erratum, though it is enumerated
as eSDHC16 in the errata sheet for mpc8309.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
2020-01-08 08:12:35 +01:00
Sean Anderson
aaa05deb12 log: Include missing header for log.h
log.h references cmd_tbl_t but command.h was not included

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07 16:03:01 -07:00
Sean Anderson
7fc0c2b187 dm: Add a debug message when devices are skipped pre-reloc
This adds a message to lists_bind_fdt when it skips initializing a device
pre-relocation. I've had a couple errors where a device didn't initialize
properly because one of its dependencies was missing.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-01-07 16:03:01 -07:00
Sean Anderson
63736e9c96 Include missing headers for fdt_support.h
fdt_support.h is missing declarations for bd_t. Including asm/u-boot.h
pulls in the definition.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2020-01-07 16:02:39 -07:00
Masahiro Yamada
f6a8c0f468 binman: fix default filename of u-boot-with-ucode-ptr in documentation
The suffix should be ".bin" instead of ".dtb" .

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07 16:02:39 -07:00
Simon Glass
42a0ce576f dm: devres: Add a new OFDATA phase
Since the ofdata_to_platdata() method can allocate resources, add it as a
new devres phase.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-07 16:02:39 -07:00
Simon Glass
af68411dd1 dm: devres: Use an enum for the allocation phase
At present we only support two phases where devres can be used:
bind and probe. This is handled with a boolean. We want to add a new
phase (platdata), so change this to an enum.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-07 16:02:39 -07:00
Simon Glass
8d6320cc4d dm: devres: Add tests
The devres functionality has very few users in U-Boot, but it still should
have tests. Add a few basic tests of the main functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-07 16:02:39 -07:00
Simon Glass
dc12ebbbdb dm: test: Add a test driver for devres
Add a driver which does devres allocations so that we can write tests for
devres.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-07 16:02:39 -07:00
Simon Glass
cce61fc428 dm: devres: Convert to use logging
At present when CONFIG_DEBUG_DEVRES is enabled, U-Boot prints log messages
to the console with every devres allocation/free event. This causes most
tests to fail since the console output is not as expected.

In particular this prevents us from adding a device to sandbox which uses
devres in its bind method.

Move devres over to use U-Boot's logging feature instead, and add a new
category for devres.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-07 16:02:38 -07:00
Simon Glass
8109863f53 test: Add functions to find the amount of allocated memory
The malloc() implementations provides a way of finding out the approximate
amount of memory that is allocated. Add helper functions to make it easier
to access this and see changes over time. This is useful for tests that
want to check if memory has been allocated or freed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-07 16:02:38 -07:00
Simon Glass
42a8db5c5b dm: devres: Create a new devres header file
At present these functions are lumped in with the core device functions.
They have their own #ifdef to control their availability, so it seems
better to split them out.

Move them into their own header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-07 16:02:38 -07:00