Commit graph

200 commits

Author SHA1 Message Date
Michal Simek
e8a016b537 dm: Add support for scsi/sata based devices
All sata based drivers are bind and corresponding block
device is created. Based on this find_scsi_device() is able
to get back block device based on scsi_curr_dev pointer.

intr_scsi() is commented now but it can be replaced by calling
find_scsi_device() and scsi_scan().

scsi_dev_desc[] is commented out but common/scsi.c heavily depends on
it. That's why CONFIG_SYS_SCSI_MAX_DEVICE is hardcoded to 1 and symbol
is reassigned to a block description allocated by uclass.
There is only one block description by device now but it doesn't need to
be correct when more devices are present.

scsi_bind() ensures corresponding block device creation.
uclass post_probe (scsi_post_probe()) is doing low level init.

SCSI/SATA DM based drivers requires to have 64bit base address as
the first entry in platform data structure to setup mmio_base.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-12-20 09:15:27 +01:00
Tom Rini
361a879902 Revert "Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze"
This reverts commit 3edc0c2522, reversing
changes made to bb135a0180.
2016-12-09 07:56:54 -05:00
Michal Simek
bce4d18c9d dm: Add support for scsi/sata based devices
All sata based drivers are bind and corresponding block
device is created. Based on this find_scsi_device() is able
to get back block device based on scsi_curr_dev pointer.

intr_scsi() is commented now but it can be replaced by calling
find_scsi_device() and scsi_scan().

scsi_dev_desc[] is commented out but common/scsi.c heavily depends on
it. That's why CONFIG_SYS_SCSI_MAX_DEVICE is hardcoded to 1 and symbol
is reassigned to a block description allocated by uclass.
There is only one block description by device now but it doesn't need to
be correct when more devices are present.

scsi_bind() ensures corresponding block device creation.
uclass post_probe (scsi_post_probe()) is doing low level init.

SCSI/SATA DM based drivers requires to have 64bit base address as
the first entry in platform data structure to setup mmio_base.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Series-changes: 2
- Use CONFIG_DM_SCSI instead of mix of DM_SCSI and DM_SATA
  Ceva sata has never used sata commands that's why keep it in
  SCSI part only.
- Separate scsi_scan() for DM_SCSI and do not change cmd/scsi.c
- Extend platdata

Series-changes: 3
- Fix scsi_scan return path
- Fix header location uclass-internal.h
- Add scsi_max_devs under !DM_SCSI
- Add new header device-internal because of device_probe()
- Redesign block device creation algorithm
- Use device_unbind in error path
- Create block device with id and lun numbers (lun was there in v2)
- Cleanup dev_num initialization in block device description
  with fixing parameters in blk_create_devicef
- Create new Kconfig menu for SATA/SCSI drivers
- Extend description for DM_SCSI
- Fix Kconfig dependencies
- Fix kernel doc format in scsi_platdata
- Fix ahci_init_one - vendor variable

Series-changes: 4
- Fix Kconfig entry
- Remove SPL ifdef around SCSI uclass
- Clean ahci_print_info() ifdef logic
2016-12-08 09:23:48 +01:00
Stefan Roese
13f3fcac53 dm: core: Add dev_get_addr_size_index() to retrieve addr and size
The currently available functions accessing the 'reg' property of a
device only retrieve the address. Sometimes its also necessary to
retrieve the size described by the 'reg' property. This patch adds
the new function dev_get_addr_size_index() which retrieves both,
the address and the size described by the 'reg' property.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
2016-12-02 21:03:31 -07:00
Simon Glass
2f11cd9121 dm: core: Handle global_data moving in SPL
When CONFIG_SPL_STACK_R is enabled, and spl_init() is called before
board_init_r(), spl_relocate_stack_gd() will move global_data to a new
place in memory. This affects driver model since it uses a list for the
uclasses. Unless this is updated the list will become invalid. When
looking for a non-existent uclass, such as when adding a new one, the loop
in uclass_find() may continue forever, thus causing a hang.

Add a function to correct this rather obscure bug.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-12-02 20:53:19 -07:00
Marcel Ziswiler
cbfa67a16b serial: pxa: integrate optional driver model handling
Optional driver model handling integration.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2016-11-23 13:53:20 +01:00
Simon Glass
0a5f6f869f dm: core: Add a function to get a uclass name
It is useful in debug() statements to display the name of the uclass for a
device. Add a simple function to provide this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-10-11 11:55:33 +08:00
Alexander Graf
601147b06a serial: bcm283x_mu: Detect disabled serial device
On the raspberry pi, you can disable the serial port to gain dynamic frequency
scaling which can get handy at times.

However, in such a configuration the serial controller gets its rx queue filled
up with zero bytes which then happily get transmitted on to whoever calls
getc() today.

This patch adds detection logic for that case by checking whether the RX pin is
mapped to GPIO15 and disables the mini uart if it is not mapped properly.

That way we can leave the driver enabled in the tree and can determine during
runtime whether serial is usable or not, having a single binary that allows for
uart and non-uart operation.

Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-09-06 13:18:19 -04:00
Max Filippov
59b7dfa0d1 net/ethoc: support private memory configurations
The ethoc device can be configured to have a private memory region
instead of having access to the main memory. In that case egress packets
must be copied into that memory for transmission and pointers to that
memory need to be passed to net_process_received_packet or returned from
the recv callback.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-08-15 13:34:48 -05:00
Max Filippov
5d43feabf3 net/ethoc: add CONFIG_DM_ETH support
Extract reusable parts from ethoc_init, ethoc_set_mac_address,
ethoc_send and ethoc_receive, move the rest under #ifdef CONFIG_DM_ETH.
Add U_BOOT_DRIVER, eth_ops structure and implement required methods.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-08-15 13:34:47 -05:00
Tom Rini
4711e7f7af Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2016-07-28 08:45:00 -04:00
Stephen Warren
61f5ddcb7a Add a power domain framework/uclass
Many SoCs allow power to be applied to or removed from portions of the SoC
(power domains). This may be used to save power. This API provides the
means to control such power management hardware.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-27 16:29:56 -06:00
Simon Glass
cc7f66f70c dm: core: Add a function to bind child devices
We currently use dm_scan_fdt_node() to bind devices. It is an internal
function and it requires the caller to know whether we are pre- or post-
relocation.

This requirement has become quite common in drivers, so the current function
is not ideal.

Add a new function with fewer arguments, that does not require internal
headers. This can be used directly as a post_bind() method if needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-27 14:14:37 -06:00
Simon Glass
c57f806bf2 dm: core: Add a way to find a device by its driver
Some SoCs have a single clock device. Provide a way to find it given its
driver name. This is handled by the linker so will fail if the name is not
found, avoiding strange errors when names change and do not match. It is
also faster than a string comparison.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-25 20:46:43 -06:00
Stefan Agner
83fd908f28 dm: imx: serial: Support DTE mode when using driver model
The MXC UART IP can be run in DTE or DCE mode. This depends on the
board wiring and the pinmux used and hence is board specific. This
extends platform data with a new field to choose wheather DTE
mode shall be used.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-07-19 19:52:13 +02:00
Simon Glass
9fa2819009 dm: core: Expand platdata for of-platdata devices
Devices which use of-platdata have their own platdata. However, in many
cases the driver will have its own auto-alloced platdata, for use with the
device tree. The ofdata_to_platdata() method converts the device tree
settings to platdata.

With of-platdata we would not normally allocate the platdata since it is
provided by the U_BOOT_DEVICE() declaration. However this is inconvenient
since the of-platdata struct is closely tied to the device tree properties.
It is unlikely to exactly match the platdata needed by the driver.

In fact a useful approach is to declare platdata in the driver like this:

struct r3288_mmc_platdata {
	struct dtd_rockchip_rk3288_dw_mshc of_platdata;
	/* the 'normal' fields go here */
};

In this case we have dt_platadata available, but the normal fields are not
present, since ofdata_to_platdata() is never called. In fact driver model
doesn't allocate any space for the 'normal' fields, since it sees that there
is already platform data attached to the device.

To make this easier, adjust driver model to allocate the full size of the
struct (i.e. platdata_auto_alloc_size from the driver) and copy in the
of-platdata. This means that when the driver's bind() method is called,
the of-platdata will be present, followed by zero bytes for the empty
'normal field' portion.

A new DM_FLAG_OF_PLATDATA flag is available that indicates that the platdata
came from of-platdata. When the allocation/copy happens, the
DM_FLAG_ALLOC_PDATA flag will be set as well. The dtoc tool is updated to
output the platdata_size field, since U-Boot has no other way of knowing
the size of the of-platdata struct.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-14 20:40:24 -06:00
Simon Glass
fd1c2d9b6a dm: core: Rename DM_NAME_ALLOCED to DM_FLAG_NAME_ALLOCED
This is a flag. Adjust the name to be consistent with the other flags.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-14 20:40:24 -06:00
Tom Rini
bff97dde8c Merge branch 'master' of git://git.denx.de/u-boot-spi 2016-07-11 18:50:29 -04:00
Bin Meng
6f0e7a36ef dm: Sort the uclass id in alphabetical order
Some uclass ids are out of order. Per the comments, sort them
in alphabetical order.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-11 14:06:44 -06:00
Vignesh R
7c61686255 dm: core: implement dev_map_physmem()
This API helps to map physical register addresss pace of device to
virtual address space easily. Its just a wrapper around map_physmem()
with MAP_NOCACHE flag.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-07-09 20:16:08 +05:30
Stephen Warren
89c1e2da78 Add a reset driver framework/uclass
A reset controller is a hardware module that controls reset signals that
affect other hardware modules or chips.

This patch defines a standard API that connects reset clients (i.e. the
drivers for devices affected by reset signals) to drivers for reset
controllers/providers. Initially, DT is the only supported method for
connecting the two.

The DT binding specification (reset.txt) was taken from Linux kernel
v4.5's Documentation/devicetree/bindings/reset/reset.txt.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-06-19 17:05:55 -06:00
Stephen Warren
6238935d01 Add a mailbox driver framework/uclass
A mailbox is a hardware mechanism for transferring small message and/or
notifications between the CPU on which U-Boot runs and some other device
such as an auxilliary CPU running firmware or a hardware module.

This patch defines a standard API that connects mailbox clients to mailbox
providers (drivers). Initially, DT is the only supported method for
connecting the two.

The DT binding specification (mailbox.txt) was taken from Linux kernel
v4.5's Documentation/devicetree/bindings/mailbox/mailbox.txt.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-05-26 20:48:31 -06:00
Stephen Warren
1163625898 Rename reset to sysreset
The current reset API implements a method to reset the entire system.
In the near future, I'd like to introduce code that implements the device
tree reset bindings; i.e. the equivalent of the Linux kernel's reset API.
This controls resets to individual HW blocks or external chips with reset
signals. It doesn't make sense to merge the two APIs into one since they
have different semantic purposes. Resolve the naming conflict by renaming
the existing reset API to sysreset instead, so the new reset API can be
called just reset.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-05-26 20:48:31 -06:00
Stephen Warren
daac3bfee5 dm: allow setting driver_data before/during bind
This will allow a driver's bind function to use the driver data. One
example is the Tegra186 GPIO driver, which instantiates child devices
for each of its GPIO ports, yet supports two different HW instances each
with a different set of ports, and identified by the udevice_id .data
field.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-05-26 20:48:31 -06:00
Mugunthan V N
73443b9e4c drivers: core: device: add support to check dt compatible for a device/machine
Provide an api to check whether the given device or machine is
compatible with the given compat string which helps in making
decisions in drivers based on device or machine compatible.

Idea taken from Linux.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2016-05-24 11:42:02 -05:00
Simon Glass
a2040facd2 dm: core: Allow device names to be freed automatically
Some devices have a name that is stored in allocated memory. At present
there is no mechanism to free this memory when the device is unbound.

Add a device flag to track whether a name is allocated and a function to
add the flag. Free the memory when the device is unbound.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
a219639d42 dm: Rename disk uclass to ahci
This started as 'ahci' and was renamed to 'disk' during code review. But it
seems that this is too generic. Now that we have a 'blk' uclass, we can use
that as the generic piece, and revert to ahci for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
angelo@sysam.it
e27802af54 m68k: add DM model serial driver
Boards can now use DM serial driver, or still legacy mcf uart
driver version.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Stefan Roese
28027521be dm: core: Add dev_get_addr_ptr() to return a pointer to the reg address
On some platforms (e.g. x86), the return value of dev_get_addr() can't
be assigned to a pointer type variable directly. As there might be a
difference between the size of fdt_addr_t and the pointer type. On
x86 for example, "fdt_addr_t" is 64bit but "void *" only 32bit. So
assigning the register base directly in dev_get_addr() results in this
compilation warning:
  warning: cast to pointer from integer of different size

This patch introduces the new function dev_get_addr_ptr() that
returns a pointer to the 'reg' address that can be used by drivers
in this case.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-04-25 07:30:16 +02:00
Stephen Warren
43c4d44e33 fdt: implement dev_get_addr_name()
This function parses the reg property based on an index found in the
reg-names property. This is required for bindings that are written
using reg-names rather than hard-coding indices in reg.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-04-15 08:14:37 -06:00
Mateusz Kulikowski
04868b407b drivers: Add SPMI bus uclass
Qualcom processors use proprietary bus to talk with PMIC devices -
SPMI (System Power Management Interface).
On wiring level it is similar to I2C, but on protocol level, it's
multi-master and has simple autodetection capabilities.
This commit adds simple uclass that provides bus read/write interface.

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-04-01 17:18:12 -04:00
Stephen Warren
3917c26909 serial: add BCM283x mini UART driver
The RPi3 typically uses the regular UART for high-speed communication with
the Bluetooth device, leaving us the mini UART to use for the serial
console. Add support for this UART so we can use it.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2016-03-27 09:12:52 -04:00
Eric Anholt
cd0fa5bff8 serial: pl01x: Add support for devices with the rate pre-configured.
For Raspberry Pi, we had the input clock rate to the pl011 fixed in
the rpi.c file, but it may be changed by firmware due to user changes
to config.txt.  Since the firmware always sets up the uart (default
115200 output unless the user changes it), we can just skip our own
uart init to simplify the boot process and more reliably get serial
output.

Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
2016-03-22 12:16:12 -04:00
Simon Glass
09d71aac7b dm: blk: Add a block-device uclass
Add a uclass for block devices. These provide block-oriented data access,
supporting reading, writing and erasing of whole blocks.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
2016-03-14 15:34:50 -06:00
Simon Glass
b06750501f dm: core: Add uclass_first_device_err() to return a valid device
A common pattern is to call uclass_first_device() and then check if it
actually returns a device. Add a new function which does this, returning
an error if there are no devices in that uclass.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-03-14 15:34:50 -06:00
Vikas Manocha
6a12cebd90 stm32x7: add support for stm32x7 serial driver
This patch adds support for stm32f7 family usart peripheral.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-02-24 18:43:54 -05:00
Mugunthan V N
a0594cefb7 dm: implement a DMA uclass
Implement a DMA uclass so that the devices like ethernet, spi,
mmc etc can offload the data transfers from/to the device and
memory.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-02-23 16:14:45 +05:30
Simon Glass
8de536c27c video: sandbox: Allow selection of font size and console name
For testing it is useful to be able to select the font size and the console
driver for sandbox. Add this information to platform data and copy it to
the video device when needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-30 10:57:30 +01:00
Simon Glass
c6db965f67 dm: Remove device_probe_child()
This function is not used as the use case for it did not eventuate. Remove
it to avoid confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-28 21:01:23 -07:00
Simon Glass
e3b5f04143 ahci: Add a disk-controller uclass
Add a uclass ID for a disk controller. This can be used by AHCI/SATA or
other controller types. There are no operations and no interface so far,
but it is possible to probe a SATA device.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-24 12:09:39 +08:00
Simon Glass
5544757ce9 dm: x86: Add a northbridge uclass
Add a uclass for the northbridge / SDRAM controller found on some older
Intel chipsets.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-24 12:08:16 +08:00
Simon Glass
e76187a355 dm: x86: Create a driver for x86 interrupts
It seems likely that at some point we will want a generic interrupt uclass.
But this is a big undertaking as it involves unifying code across multiple
architectures.

As a first step, create a simple IRQ uclass and a driver for x86. This can
be generalised later as required.

Adjust pirq_init() to probe this driver, which has the effect of creating
routing tables and setting up the interrupt routing. This is a start
towards making interrupts fit better with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-24 12:07:18 +08:00
Simon Glass
2dcf143398 dm: video: Repurpose the 'displayport' uclass to 'display'
The current DisplayPort uclass is too specific. The operations it provides
are shared with other types of output devices, such as HDMI and LVDS LCD
displays.

Generalise the uclass so that it can be used with these devices as well.
Adjust the uclass to handle the EDID reading and conversion to
display_timing internally.

Also update nyan-big which is affected by this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
f563dc1d19 dm: panel: Add a panel uclass
LCD panels can usefully be modelled as their own uclass. They can be probed
(which powers them up ready for use). If they have a backlight, this can be
enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
363bf77acc dm: backlight: Add a backlight uclass
LCD panels normally have a backlight which can be controlled to illuminate
the LCD contents. Add a uclass to support this. Initially it only has a
method to enable the backlight.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
fc760cb8c4 dm: pwm: Add a PWM uclass
Add a uclass that supports Pulse Width Modulation (PWM) devices. It
provides methods to enable/disable and configure the device.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
1b30d61d78 dm: core: Export uclass_find_device_by_of_offset()
It is sometimes useful to be able to find a device before probing it,
perhaps to set up some platform data for it. Allow finding by of_offset
also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
77eaa19e73 dm: pinctrl: Add a way for a GPIO driver to obtain a pin function
GPIO drivers want to be able to show if a pin is enabled for input, output,
or is being used by another function. Some drivers can easily find this
and the code is included in the driver. For some SoCs this is more complex.
Conceptually this should be handled by pinctrl rather than GPIO. Most
pinctrl drivers will have this feature anyway.

Add a method by which a GPIO driver can obtain the pin mux value given a
GPIO reference. This avoids repeating the code in two places.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
5fd6badbd2 dm: Add a power sequencing uclass
Some devices need special sequences to be used when starting up. Add a
uclass for this. Drivers can be added to provide specific features as
needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
52db39a22b dm: pinctrl: Add a function to parse PIN_CONFIG flags
Add a function which produces a flags word from a few common PIN_CONFIG
settings. This is useful for simple pinctrl drivers that don't need to worry
about drive strength, etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00