Commit graph

11 commits

Author SHA1 Message Date
Ley Foon Tan
8a204312ab arm: socfpga: misc_s10: Fix EMAC register address calculation
Fix EMAC register address calculation, address need to multiply
with sizeof(u32) or 4.

This fixes write to invalid address.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-06-26 11:30:24 +08:00
Simon Glass
f7ae49fc4f common: Drop log.h from common header
Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:18 -04:00
Simon Glass
691d719db7 common: Drop init.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:33 -04:00
Ley Foon Tan
2fd1dc5593 arm: socfpga: Move Stratix10 and Agilex system manager common code
Move Stratix10 and Agilex system manager common code to
system_manager_soc64.h. Changed macros to use SYSMGR_SOC64_*.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Ley Foon Tan
db5741f7a8 arm: socfpga: Convert system manager from struct to defines
Convert system manager for Gen5, Arria 10 and Stratix 10 from struct
to defines.

Change to get system manager base address from DT node instead of
using #define.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Simon Glass
9fb625ce05 env: Move env_set() to env.h
Move env_set() over to the new header file.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11 16:43:41 -04:00
Ang, Chee Hong
32e308dd79 ARM: socfpga: stratix10: Probe FPGA status before bridge enable
Send CONFIG_STATUS and RECONFIG_STATUS mailbox commands to Secure
Device Manager (SDM) to get the status of FPGA and make sure the
FPGA is in user mode before enable the bridge.

Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
2019-05-06 12:44:45 +02:00
Marek Vasut
72c347ced8 ARM: socfpga: Add support for selecting bridges in bridge command
Add optional "mask" argument to the SoCFPGA bridge command, to select
which bridges should be enabled/disabled. This allows the user to avoid
enabling bridges which are not connected into the FPGA fabric. Default
behavior is to enable/disable all bridges.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2019-04-29 10:08:56 +02:00
Ang, Chee Hong
877ec6ebbd arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device table
Enable 'fpga' command in u-boot. User will be able to use the FPGA
command to program the FPGA on Stratix10 SoC.

Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
2018-12-20 17:12:25 +01:00
Ooi, Joyce
8be11fb3c1 arm: socfpga: stratix10: add sgmii in phymode setup
Additional sgmii phymode is added in socfpga_phymode_setup() along with
a minor fix for maximum number of GMACs.

Signed-off-by: Ooi, Joyce <joyce.ooi@intel.com>
2018-10-03 12:56:50 +02:00
Ley Foon Tan
d559130e36 arm: socfpga: stratix10: Add misc support for Stratix10 SoC
Add misc support such as EMAC and cpu info printout for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-07-12 09:22:11 +02:00