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70697 commits

Author SHA1 Message Date
Joel Stanley
5d40d5f12e tools/Makefile: FIT_CIPHER requires libssl
If CONFIG_FIT_CIPHER is enabled without CONFIG_FIT_SIGNATURE then
mkimage/dumpimage will fail to link:

 /usr/bin/ld: tools/common/image-cipher.o: in function `fit_image_decrypt_data':
 image-cipher.c:(.text+0x9a): undefined reference to `image_get_host_blob'
 /usr/bin/ld: tools/common/image-cipher.o:(.data.rel+0x10): undefined reference to `EVP_aes_128_cbc'
 /usr/bin/ld: tools/common/image-cipher.o:(.data.rel+0x40): undefined reference to `EVP_aes_192_cbc'
 /usr/bin/ld: tools/common/image-cipher.o:(.data.rel+0x70): undefined reference to `EVP_aes_256_cbc'
 /usr/bin/ld: tools/lib/aes/aes-encrypt.o: in function `image_aes_encrypt':
 aes-encrypt.c:(.text+0x22): undefined reference to `EVP_CIPHER_CTX_new'
 /usr/bin/ld: aes-encrypt.c:(.text+0x6f): undefined reference to `EVP_EncryptInit_ex'
 /usr/bin/ld: aes-encrypt.c:(.text+0x8d): undefined reference to `EVP_EncryptUpdate'
 /usr/bin/ld: aes-encrypt.c:(.text+0xac): undefined reference to `EVP_CIPHER_CTX_free'
 /usr/bin/ld: aes-encrypt.c:(.text+0xf2): undefined reference to `EVP_EncryptFinal_ex'
 collect2: error: ld returned 1 exit status

Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-01-22 16:17:52 -05:00
Philippe Reynes
edfeba7538 tools: image-host: add support for several sub-images
The propoerty sign-images points to images in the configuration
node. But thoses images may references severals "sub-images" (for
example for images loadable). This commit adds the support of
severals sub-images.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2021-01-22 16:17:52 -05:00
Philippe Reynes
5a4116f1a2 tools: image-host: clean function fit_config_get_hash_list
This commit creates a function fit_config_add_hash that will be
used in the next commit to support several 'sub-images'.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-22 16:17:52 -05:00
Alexandru Gagniuc
4afc4f37c7 doc: FIT image: Clarify format and simplify syntax
** Introduction

There are currently four ways to load an OS image with u-boot
  1. SPL -> u-boot -> bootm
  2. SPL blue falcon mode
  3. "Basic" FIT image (CONFIG_LOAD_FIT)
  4. "Full-featured" FIT image (CONFIG_LOAD_FIT_FULL)

These four code paths were developed independently, and share very
little code. (3) and (4), behave very differently, are littered with
special cases. They even have different DTS syntax and properties.

The cause of this divergence is that the FIT format specification
leaves a number of things open to interpretation. The purpose of this
change is to enable the reduction of code size, duplication, and
complexity by updating and streamlining the FIT format.

We are only marginally concerned with backwards compatibility, because
we don't have inter-compatibility. For example, CONFIG_LOAD_FIT is
able to load images that CONFIG_LOAD_FIT_FULL won't. This is a direct
result of the incompatible syntax between the two implementations.

Ideally, these changes would enable "simple" FIT to be a subset of the
"full" fit implementation, and share most code. These changes should
also eliminate the need for falcon mode (although we are not
advocating for the removal of falcon mode at this time).

** Description of changes

 * The "configurations" node is now mandatory

Guessing how to load components based on their "os" and "type" invites
confusion and superfluous heuristics. Instead, require each FIT image
to be explicit on how components should be loaded.

 * Eliminate "ramdisk", "setup", "standalone", and "fpga" properties

Having too many special purpose properties requires special-casing
FIT loading code. When a special property can be handled by another
property, it is redundant.
 - A "ramdisk" is identical to a loadable. Thus ramdisk images should
   be placed under "loadables".
 - A "setup" node can be achieved by using a "kernel" or "firmware"
   property instead.
 - "standalone" is used for u-boot nodes. The correct property to use
   in this case is "firmware".
 - "fpga" is a loadable

 * Prioritize control between "firmware" and "kernel"

"firmware" and "kernel" are special nodes in that control is passed
to the "entry-point" of the image. Both can be present, for example,
an OP-TEE firmware with a linux kernel. When both are present,
control is passed to the "firmware" image.

** Further generalizations (not included herein)

The "firmware" and "kernel" properties could be generalized as a
"next-boot-stage", or similar name. This "next" stage would be special
in that it is both executable, and is the stage that is passed
control. For example, "next-stage" could be an op-tee image, with
linux as a loadable, or a u-boot image.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-01-22 16:17:33 -05:00
Tom Rini
abd95385e7 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-samsung.git 2021-01-22 16:01:27 -05:00
Greg Gallagher
786f35b619 ARM: at91: spl: add spl_early_init for sama5d2 platforms
The dm root node is needed early in the spl to allow the timer to be
used.  This change calls spl_early_init to initialize the dm root node.

Signed-off-by: Greg Gallagher <greg@embeddedgreg.com>
2021-01-22 15:09:59 +02:00
Greg Gallagher
c69ba7b4a0 configs: sama5d27_som1_ek: Set FDT filename based on defconfig
Make the FDT file name based on the default on that is specified in the
defconfig file.

Signed-off-by: Greg Gallagher <greg@embeddedgreg.com>
2021-01-22 15:09:59 +02:00
Greg Gallagher
9119800591 board: atmel: Add SAMA5D27 giant board
Giant board is a tiny SBC based on the Adafruit Feather form factor,
created by groboards it contains a SAMA5D2 processor (SAMA5D27),
128 MB of RAM and a microSD card for storage.

Signed-off-by: Greg Gallagher <greg@embeddedgreg.com>
2021-01-22 15:09:59 +02:00
Claudiu Beznea
1ae8f0a3b2 net: macb: take into account all RGMII interface types
Take into account all RGMII interface types. Depending on it
the RGMII PHY's timings are setup.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-22 15:09:59 +02:00
Claudiu Beznea
3d3475c8b7 net: macb: add support for sama7g5 emac
Add support for SAMA7G5 EMAC.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-22 15:09:59 +02:00
Claudiu Beznea
8c0483ecbf net: macb: add support for sama7g5 gmac
Add support for SAMA7G5 GMAC.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-22 15:09:59 +02:00
Claudiu Beznea
96449581b3 net: macb: check clk_set_rate return value to be negative
clk_set_rate() returns the set rate in case of success and a
negative number in case of failure. Consider failure only the
negative numbers.

Fixes: 3ef64444de ("dm: net: macb: Implement link speed change callback")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-22 15:09:59 +02:00
Claudiu Beznea
bb890f75d5 net: macb: add user io config data structure
Different implementation of USER IO register needs different
mapping for bit fields of this register. Add implementation
for this and, since clken is part of USER IO and it needs to
be activated based on per SoC capabilities, add caps in
macb_config where clken specific information needs to be filled.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-22 15:09:59 +02:00
Kai Stuhlemmer (ebee Engineering)
3270c47b39 sam9x60.h: Fix Galois Field Table offsets
Because ATMEL_BASE_ROM is defined to 0x100000, it already points
to the begin of the index table for 512 byte sectors correction.
Thus its offset must be zero and the index of the table for 1024
byte sectors must start at offset 0x8000.

Signed-off-by: Kai Stuhlemmer (ebee Engineering) <kai.stuhlemmer@ebee.de>
[ta: update commit message]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2021-01-22 15:09:59 +02:00
Tudor Ambarus
786f888b74 sama5d3: Fix Galois Field Table offsets
Offsets are described in the datasheet at section:
"11.4.4.2 NAND Flash Boot: PMECC Error Detection and Correction".

For testing I "injected" bit flips into u-boot NAND memory area,
and then read back. PMECC could not correct the errors. With the
offsets updated everything is fine.

Fixes: 3225f34e5c ("ARM: atmel: add sama5d3xek support")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2021-01-22 15:09:59 +02:00
Tudor Ambarus
58b1d680d1 configs: at91: Fix wrong definitions for CONFIG_PMECC_CAP
When CONFIG_ATMEL_NAND_HW_PMECC is set, CONFIG_PMECC_CAP defaults
to the value of 2. At the conversion to Kconfig for the PMECC config
values, some boards/defconfigs were wrongly configured.
Update CONFIG_PMECC_CAP to the PMECC_CAP value before the conversion.

Fixes: 49ad40298c ("ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2021-01-22 15:09:59 +02:00
Tudor Ambarus
6f889819f3 configs: at91: Fix the involuntarily disablement of NAND PMECC
SPL_GENERATE_ATMEL_PMECC_HEADER selects:
ATMEL_NAND_HWECC [=y] && ATMEL_NAND_HW_PMECC [=y].

With the removal of SPL_GENERATE_ATMEL_PMECC_HEADER,
ATMEL_NAND_HW_PMECC and ATMEL_NAND_HWECC were no longer
selected. Also, when the SPL_GENERATE_ATMEL_PMECC_HEADER was removed,
the configs were not updated using savedefconfig, thus the
'commit d168bcb6fe ("configs: Resync with savedefconfig")'
further removes the CONFIG_PMECC_CAP value.

Update defconfigs and add CONFIG_ATMEL_NAND_HW_PMECC,
which selects ATMEL_NAND_HWECC, in order to restore NAND PMECC
support. Restore CONFIG_PMECC_CAP value.

Fixes: 57f76c2a47 ("configs: at91: remove SPL_GENERATE_ATMEL_PMECC_HEADER from non-nand configs")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2021-01-22 15:09:59 +02:00
Eugen Hristev
417eca09bf pinctrl: at91-pio4: implement drive strength support
Implement drive strength support, by preserving the same bindings
as in Linux.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-22 15:09:59 +02:00
Eugen Hristev
864a4144ba pinctrl: at91-pio4: convert to dev_read_prop
Use dev_read_prop instead of using the fdt_read_property which
reads from the GD struct's fdt.
This way the node is accessed via the device config instead of the
global struct, which makes code more portable and GD independent.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-22 15:09:59 +02:00
Eugen Hristev
63c27c3e66 dt-bindings: pinctrl: at91-pio4: add property for drive strength
Add drive strength property which is equivalent with the one in Linux

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-22 15:09:59 +02:00
Eugen Hristev
7cdcf0cb69 dt-bindings: pinctrl: at91-pio4: update license to SPDX style
Update license header to SPDX style

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-22 15:09:59 +02:00
Tom Rini
184aa65041 Merge tag 'u-boot-rockchip-20210121' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- New board: rk3328 NanoPi R2S board;
- Fix init voltage for some rk3399 boards;
- enable rng for rk3399 by default;
- set default to SPI bus 1 for SPI-flash for some board;
- add dwc PCIe controller driver on rockchip platform;
2021-01-21 07:39:47 -05:00
Shawn Lin
9ddc0787bd pci: Add Rockchip dwc based PCIe controller driver
Add Rockchip dwc based PCIe controller driver for rk356x platform.
Driver support Gen3 by operating as a Root complex.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2021-01-21 12:00:45 +08:00
Shawn Lin
6ec62b6ca6 phy: rockchip: Add Rockchip Synopsys PCIe 3.0 PHY
Add the Rockchip Synopsys based PCIe 3.0 PHY driver as
part of Generic PHY framework.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2021-01-21 12:00:45 +08:00
David Bauer
b821e0db46 rockchip: rk3328: Add support for FriendlyARM NanoPi R2S
This adds support for the NanoPi R2S from FriendlyArm.

Rockchip RK3328 SoC
1GB DDR4 RAM
Gigabit Ethernet (WAN)
Gigabit Ethernet (USB3) (LAN)
USB 2.0 Host Port
MicroSD slot
Reset button
WAN - LAN - SYS LED

Signed-off-by: David Bauer <mail@david-bauer.net>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2021-01-21 11:58:35 +08:00
Peter Robinson
a475bef534 configs: rk3399: enable rng on firefly/rock960/rockpro64
Enable the RNG on the Firefly, rock960 and RockPro64 devices
to enable KASLR on devices that support it.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Akash Gajjar <akash@openedev.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2021-01-21 11:56:21 +08:00
Peter Robinson
5972c57780 arm: dts: rockchip: rk3399: enable rng at the SoC level
The rng is embedded in the SoC so enable it in the device tree
universally, the use of it can be controlled by enabling/disabling
at the device config level.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2021-01-21 11:55:59 +08:00
Kever Yang
09b053c970 rockchip: leez-rk3399: Provide init voltage
Add missing regulator-init-microvolt property to vdd_log regulator.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2021-01-21 11:54:24 +08:00
Kever Yang
ec0f08c779 rockchip: firefly-rk3399: Provide init voltage
Add missing regulator-init-microvolt property to vdd_log regulator.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2021-01-21 11:54:24 +08:00
Kever Yang
2a6eb3b8f0 rockchip: evb-rk3399: Provide init voltage
Add missing regulator-init-microvolt property to vdd_center regulator.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2021-01-21 11:54:24 +08:00
Hugh Cole-Baker
a2ca3c6032 rockchip: puma-haikou: default to SPI bus 1 for SPI-flash
SPI flash on this machine is located on bus 1, default to using bus 1
for SPI flash and stop aliasing it to bus 0. Formerly the alias spi1
pointed to &spi5, use an alias spi5 for this instead.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2021-01-21 11:53:36 +08:00
Hugh Cole-Baker
acc57ecf05 rockchip: rk3399-roc-pc: default to SPI bus 1 for SPI-flash
SPI flash on this board is located on bus 1, default to using bus 1 for
SPI flash on both rk3399-roc-pc and -mezzanine, and stop aliasing it to
bus 0.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob")
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2021-01-21 11:53:25 +08:00
Tom Rini
83433fdab4 Merge branch '2021-01-20-fs-fixes'
- Minor SquashFS, BTRFS ubifs fixes
2021-01-20 16:45:43 -05:00
Heinrich Schuchardt
81f562719e ubifs: do not decide upon uninitialized variable
Before 'if (err)' we have to initialize the variable otherwise we use a
random value from the stack.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-20 14:01:45 -05:00
Heinrich Schuchardt
3b00a6bafc fs: btrfs: simplify close_ctree_fs_info()
At the beginning of close_ctree_fs_info() the value 0 is assigned to err
and never changed before testing it.

Let's get rid of the superfluous variable.

Fixes: f06bfcf54d ("fs: btrfs: Crossport open_ctree_fs_info() from btrfs-progs")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Qu Wenruo <wqu@suse.com>
2021-01-20 14:01:45 -05:00
Campbell Suter
9dba07f143 Fix squashfs failing to load sparse files
SquashFS supports sprase blocks in files - that is, if a given block is
composed only of zeros, it's not written to the output file to save
space and it's on-disk length field is set to zero to indicate that.

Previously the squashfs driver did not recognise that, and would attempt
to read and decompress a zero-sized block, which obviously failed.

The following command may be used to create a file for testing:

cat <(dd if=/dev/urandom of=/dev/stdout bs=1M count=1) \
	<(dd if=/dev/zero of=/dev/stdout bs=1M count=1) \
	<(dd if=/dev/urandom of=/dev/stdout bs=1k count=200) >test_file

Signed-off-by: Campbell Suter <campbell@snapit.group>
2021-01-20 14:01:44 -05:00
Qu Wenruo
3b72612ad1 fs: btrfs: volumes: prevent overflow for multiplying
In __btrfs_map_block() we do a int * int and assign it to u64.
This is not safe as the result (int * int) is still evaluated as (int)
thus it can overflow.

Convert one of the multiplier to u64 to prevent such problem.

In real world, this should not cause problem as we have device number
limit thus it won't go beyond 4G for a single stripe.

But it's harder to teach coverity about all these hidden limits, so just
fix the possible overflow.

Reported-by: Coverity CID 312957
Reported-by: Coverity CID 312948
Signed-off-by: Qu Wenruo <wqu@suse.com>
2021-01-20 14:01:08 -05:00
Tom Rini
404bbc809d Pull request for UEFI sub-system for efi-2021-04-rc1-2
* Provide a test tool for initial RAM disk provided via load file2 protocol.
 * Make more items configurable to reduce code size:
   * Boot manager
   * EFI_DT_FIXUP_PROTOCOL
   * EFI_DEVICE_PATH_UTILITIES_PROTOCOL
 * Bug fixes
   * avoid EFI runtime symbols in global symbol table
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Merge tag 'efi-2021-04-rc1-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2021-04-rc1-2

* Provide a test tool for initial RAM disk provided via load file2 protocol.
* Make more items configurable to reduce code size:
  * Boot manager
  * EFI_DT_FIXUP_PROTOCOL
  * EFI_DEVICE_PATH_UTILITIES_PROTOCOL
* Bug fixes
  * avoid EFI runtime symbols in global symbol table
2021-01-20 10:49:23 -05:00
Tom Rini
63f2607bc8 Xilinx changes for v2021.04-v2
env:
 - Unlock redundant variable configuration for all
 
 xilinx:
 - Enable seps525 by default
 - Export bootseq via variable
 - Update board_fdt_blob_setup()
 
 mmc:
 - Xenon macro removal
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Merge tag 'xilinx-for-v2021.04-v2' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2021.04-v2

env:
- Unlock redundant variable configuration for all

xilinx:
- Enable seps525 by default
- Export bootseq via variable
- Update board_fdt_blob_setup()

mmc:
- Xenon macro removal
2021-01-20 10:49:05 -05:00
Michal Simek
4e3fc5efeb env: Remove all dependencies for SYS_REDUNDAND_ENVIRONMENT
CONFIG_SYS_REDUNDAND_ENVIRONMENT is changing in env_internal.h how u-boot
works with variables. struct environment_s has one byte flags property
which also affects ENV_SIZE macro.

I have reached the case where CONFIG_ENV_IS_NOWHERE is default setup
but custom scripts can be designed in a way that u-boot is asked to
import/export variables from/to file which can be in certain format.
That's why also for this configuration make sense to enable
CONFIG_SYS_REDUNDAND_ENVIRONMENT because it depends on environment file
format.

The patch is removing dependency on this configuration to support selecting
environment file format without any specific dependency where variables are
stored.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-01-20 08:34:53 +01:00
Michal Simek
a672b9871b xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL
This hook is used in full U-Boot that's why there is no reason to touch
this location from SPL. The hook was introduced for QEMU usage but none is
really running SPL on QEMU that's why it shouldn't break any usecase.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-20 08:34:53 +01:00
Michal Simek
506009fc10 xilinx: common: Change macro handling in board_fdt_blob_setup()
Remove ifdef logic which is handled by preprocessor and move it link time
optimization to get full compile code coverage.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-20 08:34:53 +01:00
Michal Simek
2784befbd7 xilinx: zynqmp: Save bootseq number for SD/EMMC boot modes
For systems which has both sdhci controllers enable it is worth to export
bootseq number for variables. Then the variable can be used in custom
scripts to tune logic for OS.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-20 08:34:53 +01:00
Michal Simek
b2e35a6f12 mmc: xenon_sdhci: Remove duplicated macros
There is no need to define the same macros in drivers.
All macros have been added by commit 17a42abb40 ("mmc: Define timing
macro's").

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-01-20 08:34:53 +01:00
Michal Simek
7f2d57a297 arm64: zynqmp: Enable seps and related video configs
Enable this driver to get build and probe for our platform.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
2021-01-20 08:34:53 +01:00
Ilias Apalodimas
53e54bf50d efi_loader: Avoid emitting efi_var_buf to .GOT
Atish reports that on RISC-V, accessing the EFI variables causes
a kernel panic. An objdump of the file verifies that, since the
global pointer for efi_var_buf ends up in .GOT section which is
not mapped in virtual address space for Linux.

<snip of efi_var_mem_find>

0000000000000084 <efi_var_mem_find>:
  84:   715d                    addi    sp,sp,-80

* objdump -dr
0000000000000086 <.LCFI2>:
  86:   e0a2                    sd  s0,64(sp)
  88:   fc26                    sd  s1,56(sp)
  8a:   e486                    sd  ra,72(sp)
  8c:   f84a                    sd  s2,48(sp)
  8e:   f44e                    sd  s3,40(sp)
  90:   f052                    sd  s4,32(sp)
  92:   ec56                    sd  s5,24(sp)
  94:   00000497            auipc   s1,0x0
            94: R_RISCV_GOT_HI20    efi_var_buf
  98:   0004b483            ld  s1,0(s1) # 94 <.LCFI2+0xe>
            98: R_RISCV_PCREL_LO12_I    .L0
            98: R_RISCV_RELAX   *ABS*

* objdump -t
0000000000000084 g     F .text.efi_runtime  00000000000000b8 efi_var_mem_find

With the patch applied:

* objdump -dr
0000000000000086 <.LCFI2>:
  86:   e0a2                    sd  s0,64(sp)
  88:   fc26                    sd  s1,56(sp)
  8a:   e486                    sd  ra,72(sp)
  8c:   f84a                    sd  s2,48(sp)
  8e:   f44e                    sd  s3,40(sp)
  90:   f052                    sd  s4,32(sp)
  92:   ec56                    sd  s5,24(sp)
  94:   00000497            auipc   s1,0x0
            94: R_RISCV_PCREL_HI20  .LANCHOR0
            94: R_RISCV_RELAX   *ABS*
  98:   00048493            mv  s1,s1
            98: R_RISCV_PCREL_LO12_I    .L0
            98: R_RISCV_RELAX   *ABS*

* objdump -t
0000000000000008 l     O .data.efi_runtime  0000000000000008 efi_var_buf

On arm64 this works, because there's no .GOT entries for this
and everything is converted to relative references.

* objdump -dr (identical pre-post patch, only the new function shows up)
00000000000000b4 <efi_var_mem_find>:
  b4:   aa0003ee    mov x14, x0
  b8:   9000000a    adrp    x10, 0 <efi_var_mem_compare>
            b8: R_AARCH64_ADR_PREL_PG_HI21  .data.efi_runtime
  bc:   91000140    add x0, x10, #0x0
            bc: R_AARCH64_ADD_ABS_LO12_NC   .data.efi_runtime
  c0:   aa0103ed    mov x13, x1
  c4:   79400021    ldrh    w1, [x1]
  c8:   aa0203eb    mov x11, x2
  cc:   f9400400    ldr x0, [x0, #8]
  d0:   b940100c    ldr w12, [x0, #16]
  d4:   8b0c000c    add x12, x0, x12

So let's switch efi_var_buf to static and create a helper function for
anyone that needs to update it.

Fixes: e01aed47d6 ("efi_loader: Enable run-time variable support for tee based variables")
Reported-by: Atish Patra <atishp@atishpatra.org>
Tested-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-20 08:17:17 +01:00
Heinrich Schuchardt
0a7e5165ec efi_loader: efi_size_in_pages() missing parentheses
Add parentheses around size to avoid possible operator precedence problems.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-20 08:17:17 +01:00
Heinrich Schuchardt
d56013d37c efi_selftest: use CRLF as line endings in dtbdump
EFI applications must use CR LF as line endings.

Provide a print() function to reduce code size.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-20 08:17:17 +01:00
Heinrich Schuchardt
65ab48d69d efi_selftest: provide initrddump test tool
Provide an UEFI application to save the initial RAM disk provided by U-Boot
via the Load File2 protocol.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-01-20 08:17:17 +01:00
Heinrich Schuchardt
8644af7dc4 efi_selftest: don't compile dtbdump if GENERATE_ACPI_TABLE
If we are using ACPI tables instead of a device tree, we don't need the
dtbdump.efi test tool.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-20 08:17:17 +01:00