Commit graph

55857 commits

Author SHA1 Message Date
Chris Packham
825dd50f59 ARM: mvebu: use correct name for pcie controller
When armada-385.dtsi was sync'd from Linux the name of the node
describing the pcie controller was changed from pcie-controller to pcie.
Some of the boards that include armada-385.dtsi were missed in the
update retaining the old name. This updates the affected boards.

Reported-by: Влад Мао <vlaomao@gmail.com>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-19 09:22:05 +01:00
Chris Packham
3a2117d4fd ARM: mvebu: db-88f6820-amc: enable SPI_FLASH_BAR
This board uses Micron N25Q256A SPI flash. Enable SPI_FLASH_BAR to allow
us to access the whole chip.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-19 09:22:05 +01:00
Chris Packham
94425efee1 ARM: mvebu: set CONFIG_SYS_MALLOC_F_LEN to 0x2000
Set CONFIG_SYS_MALLOC_F_LEN to match the rest of the mvebu boards. The
default of 0x400 is not enough when booting from SPI.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-19 09:22:05 +01:00
Chris Packham
247c80d6b8 mv_ddr: ddr3: only use active chip-selects when tuning ODT
Inactive chip-selects will give invalid values for read_sample so don't
consider them when trying to determine the overall min/max read sample.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>

[https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/18]
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-19 09:22:05 +01:00
Chris Packham
08dcbc9823 mv_ddr: ddr3: fix tRAS timimg parameter
Based on the JEDEC standard JESD79-3F. The tRAS timings should include
the highest speed bins at a given frequency. This is similar to commit
683c67b ("mv_ddr: ddr3: fix tfaw timimg parameter") where the wrong
comparison was used in the initial implementation.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>

[https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/15]
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-19 09:22:05 +01:00
Chris Packham
5860532264 ARM: kirkwood: add spi0 alias for dreamplug
The conversion to DM_SPI managed to break accessing the environment on
dreamplug. This is because the environment code relies on being to able
to select the SPI device based on the sequence number. Add an alias so
that the spi0 bus gets sequence number 0.

Reported-by: Leigh Brown <leigh@solinno.co.uk>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Leigh Brown <leigh@solinno.co.uk>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-19 09:22:05 +01:00
Stefan Roese
1579faf52b MAINTAINERS: Update u-boot-marvell entry
This patch does the following changes to the u-boot-marvell maintainers
entry:

- Add Armada-7k/8k to the list
- Remove Prafulla and Luka since they have been silent on the list for
  a long time. Please speak up, if you would like to continue or better
  start maintaining.
- Add multiple Marvell / MVEBU related driver directories and files

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Luka Perkov <luka.perkov@sartura.hr>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-19 09:22:05 +01:00
Baruch Siach
09d39748c9 configs/clearfog_gt_8k: add network interface support
Enable the mvpp2 network driver for the Armada 8K SoC.

Enable the Marvell PHY driver for the on-board 1512 PHY.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-19 09:22:05 +01:00
Stefan Roese
0df62e8da8 pci: pci_mvebu: Add comment about missing of_n_addr_cells() call
This patch adds a comment to explain the use of the hardcoded value for
the number of address cells in mvebu_get_tgt_attr(). This should help to
rework this function, once CONFIG_OF_LIVE is enabled for MVEBU in
general.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-19 09:22:05 +01:00
Tom Rini
374bf7af03 Prepare v2019.04-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-03-18 21:14:02 -04:00
Simon Goldschmidt
92a47459bb arm: socfpga: make SPL_TEXT_BASE overridable
To boot from fpga on socfpga gen5, we need to set CONFIG_SPL_TEXT_BASE to
0xC0000000 (hps2fpgaslaves base address).

Since converting CONFIG_SPL_TEXT_BASE to Kconfig hasn't been successful so
far, let's make this value overridable in socfpga_common.h, so that we can
have different board configs override this in socfpga_common.h.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-03-16 13:30:09 +01:00
Ley Foon Tan
ff0005b56a ARM: dts: socfpga: Add missing altr,sysmgr-syscon for EMAC
Syscon register is required in dts to select correct
PHY interface.

Fix error below:

Net:   Failed to get syscon: -2

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-03-16 13:30:03 +01:00
Neil Armstrong
f402d268e8 fastboot: common: fix default fastboot_boot on 64-bit
When booting on a 64-bit system, the boot_addr_start buffer is not
large enough to contain a 64-bit number, thus leading to a crash
even if fastboot_buf_addr is valid, only the high part of the address
will be printed to boot_addr_start :

fastboot with fastboot_buf_addr = 0x0000000006000000:
  downloading of 92239872 bytes finished
  Booting kernel at 0x00000000...

  "Synchronous Abort" handler, esr 0x96000004
  elr: 00000000010561f4 lr : 0000000001056fac (reloc)
  <snip>
  x28: 000000007df2d38f x29: 000000007df2d1b0

  Resetting CPU ...

With this fix, boot_addr_start can have the full 64-bit address passed
to bootm.

Fixes: f73a7df984 ("net: fastboot: Merge AOSP UDP fastboot")
Cc: Simon Glass <sjg@chromium.org>
Cc: Alex Kiernan <alex.kiernan@gmail.com>
Cc: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-03-16 13:29:43 +01:00
Jean-Jacques Hiblot
e81d9de531 usb: udc-uclass: Fixed problem when no alias is defined in DT
commit 801f1fa442 "dm: usb: udc: Use SEQ_ALIAS to index the USB gadget
ports" changed the way the udevice if found. It uses the alias to find
a udevice for a given USB port number. In the commit log it was stated
that if no alias is provided, the bind order will be used instead. However
it doesn't work. Fixing this by adding a call to uclass_get_device() if
uclass_get_device_by_seq() fails.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Vignesh R <vigneshr@ti.com>
2019-03-16 13:29:43 +01:00
Sean Nyekjaer
731785df0b cmd: fastboot: handle watchdog while waiting for fastboot commands.
Watchdog is not handled while waiting for fastboot commands.

Tested on a i.MX6 ULL EVK board.

Signed-off-by: Sean Nyekjaer <sean@geanix.com>
2019-03-16 13:29:43 +01:00
Tom Rini
8303467e80 Merge git://git.denx.de/u-boot-fsl-qoriq
- DPAA2 fixes and DDR errata workaround for LS1021A
2019-03-15 11:58:17 -04:00
Tom Rini
821aa1916e Pull request for UEFI system for v2019.04-rc4
Fix an error with the serial communication on boards with a very small
 UART buffer which leads to a stalled system.
 
 Provide an X86 reset driver for the UEFI runtime.
 
 Fix a problem with parallel builds.
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Merge tag 'efi-2019-04-rc4-3' of https://github.com/xypron2/u-boot

Pull request for UEFI system for v2019.04-rc4

Fix an error with the serial communication on boards with a very small
UART buffer which leads to a stalled system.

Provide an X86 reset driver for the UEFI runtime.

Fix a problem with parallel builds.
2019-03-15 11:58:08 -04:00
Alison Wang
158097052a armv7: ls102xa: Add workaround for DDR erratum A-008850
Barrier transactions from CCI400 need to be disabled till
the DDR is configured, otherwise it may lead to system hang.
The patch adds workaround to fix the erratum.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-03-15 11:52:01 +05:30
Pramod Kumar
ba7eadd8e1 drivers: net: ls1088ardb: Fix EC1 and EC2 RCW offset
Fix EC1 and EC2 read from correct offset 26, instead of 25

Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-03-15 11:52:01 +05:30
Pankaj Bansal
d296842c2d board: fsl: lx2160aqds: modify the phy fixup code
Now that we are representing the MDIO mux in LX2160AQDS board in
producer/consumer terms, the consumer nodes' has been changed.

Therefore, modify the device tree fixups according to change in device
tree.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-03-15 11:52:01 +05:30
Meenakshi Aggarwal
43ad41e6ae mc : Reduce MC memory size to 128M
ls2088, ls1088 : minimum MC Memory size is 128 MB
lx2 : minimum MC memory size is 256 MB

Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-03-15 11:52:00 +05:30
Ioana Ciocoi Radulescu
2e9f1bf588 driver: net: fsl-mc: Fix DPC MAC address fixup
If node /board_info/ports does not exist in the DPC file,
function mc_fixup_dpc() will skip not only MAC address fixup,
but also the cache flush at the end. This may cause the other
fixup changes (e.g. ICID related ones) to be ignored by MC.

Fixes: 1161dbcc0a ("drivers: net: fsl-mc: Include MAC addr fixup to DPL")

Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-03-15 11:52:00 +05:30
Pankaj Bansal
82fadccccf drivers: net: ldpaa_eth: check if the dpmac is enabled
some dpmacs in armv8a based freescale layerscape SOCs can be
configured via both serdes(sgmii, xfi, xlaui etc) bits and via
EC*_PMUX(rgmii) bits in RCW.
e.g. dpmac 17 and 18 in LX2160A can be configured as SGMII from
serdes bits and as RGMII via EC1_PMUX/EC2_PMUX bits
Now if a dpmac is enabled by serdes bits then it takes precedence
over EC*_PMUX bits. i.e. in LX2160A if we select serdes protocol
that configures dpmac17 as SGMII and set the EC1_PMUX as RGMII,
then the dpmac is SGMII and not RGMII.

Therefore, in fsl_rgmii_init function of SOC, we will check if the
dpmac is enabled or not? if it is (fsl_serdes_init has already enabled
the dpmac), then don't enable it.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-03-15 11:52:00 +05:30
Heinrich Schuchardt
e616100eab efi_loader: fix build error for freestanding.o
Since commit f51a226436 ("efi_loader: provide freestanding library") in
parallel builds errors

    lib/efi_selftest/../efi_loader/efi_freestanding.o:
    file not recognized: File truncated

occur. Obviously make cannot correctly sequence parallel builds with a
dependency like ../efi_loader/efi_freestanding.o.

Fixes: f51a226436 ("efi_loader: provide freestanding library")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-03-14 21:03:14 +01:00
Soeren Moch
4b387deb78 board: tbs2910: Fix default environment
Especially fix usb keyboard support. Other changes are only for
beautification.

Signed-off-by: Soeren Moch <smoch@web.de>
2019-03-14 20:19:26 +01:00
Tom Rini
9659eb46af Merge branch 'master' of git://git.denx.de/u-boot-samsung 2019-03-14 11:37:11 -04:00
Krzysztof Kozlowski
7f295ffed6 MAINTAINERS: Remove unsupported statuses - Odd Fixes and Obsolete
The MAINTAINERS file was copied from Linux Kernel along with all its
statuses of maintainership.  However tools/genboardscfg.py accepts only
Maintained, Supported and Orphan.  Remove then the Odd Fixes and
Obsolete from MAINTAINERS file to avoid confusion.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-03-14 11:36:51 -04:00
Minkyu Kang
1411298cbc arndale: fix unknown status
set status to Maintained

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
2019-03-14 09:38:41 +09:00
Heiko Schocher
9ba5e5bc26 Revert "env: add spi_flash_read_env function"
This reverts commit 9a9d66f5ef.

because it breaks fw_setenv and U-Boot interworking, if
U-Boot environment is stored in a SPI-NOR.

Reproduce it with:
boot linux with empty Environment and store a variable
with fw_setenv into it, the Environment is now filled
with 0xff:

root@ckey5e:10:8e:~# hexdump -C /dev/mtd4
00000000  e9 e8 07 fa 01 62 6f 6f  74 63 6d 64 3d 72 75 6e  |.....bootcmd=run|
[...]
00000f30  7d 00 75 62 69 62 6f 6f  74 76 6f 6c 3d 32 00 00  |}.ubibootvol=2..|
00000f40  00 ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|

Boot now U-Boot prints:

Loading Environment from SPI Flash... SF: Detected s25fl128l with page size 256 Bytes, erase size 4 KiB, total 16 MiB
*** Warning - bad CRC, using default environment

Reason is the above commit, as it only reads until \0\0
is found, and assumes the rest of the Environment
space is filled with 0x00, which is not the case when
saving an Environment under linux with fw_setenv.

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2019-03-13 20:32:09 -04:00
Tom Rini
a0d12cd239 Small fixes in several i.MX boards
----------------------------------
 
 - imx8: add pinctrl driveri (mx8m), fix documentation and
   fix reported CPU frequency. Fabio is co-maintainer
 - pico-imx6ul: switch to DM
 - local fixes for ventana, mx6ul_14x14_evk, engicam,
   imx6(q)_logic, liteboard
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Merge tag 'u-boot-imx-20190313' of git://git.denx.de/u-boot-imx

Small fixes in several i.MX boards
----------------------------------

- imx8: add pinctrl driveri (mx8m), fix documentation and
  fix reported CPU frequency. Fabio is co-maintainer
- pico-imx6ul: switch to DM
- local fixes for ventana, mx6ul_14x14_evk, engicam,
  imx6(q)_logic, liteboard
2019-03-13 16:07:41 -04:00
Hannes Schmelzer
b882005a18 drivers/net/fec: phy_init: remove redundant logic
The phy_connect_dev(...) function from phy.c does all the handling
(inclusive catching fixed-link).

So we drop here the single steps and call just phy_connect_dev(...).

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-03-13 09:14:35 +01:00
Adam Ford
d46d27d3b6 MTD: mxs_nand_spl: Redo the way nand_init initializes
Currently the spl system calls nand_init which does nothing.
It isn't until an attempt to load from NAND that it gets initialized.
Subsequent attempts to load just skip the initialization  because
NAND is already initialized.

This moves the contents of mxs_nand_init to nand_init.  In the event
of an error, it clears the number of nand chips found.  Any
attempts to use nand will check if there are nand chips available
instead of actually doing the initialization at that time. If there
are none, it will return an error to the higher level calls.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-03-13 09:14:35 +01:00
Adam Ford
8d0370905c arm: dts: imx6qdl-u-boot: Enable spba-bus@2000000 simple bus
spba-bus has a few nodes under it including the UART1 and
some ESPI buses.  In order to use them in SPL, the
u-boot,dm-spl flag needs to be added to the spba-bus@2000000
container.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-03-13 09:14:35 +01:00
Adam Ford
e434b414fb imx: serial_mxc: use CONFIG_IS_ENABLED instead of ifdef
Kconfig allows boards to configured with DM_SERIAL and still
have SPL_DM_SERIAL disabled.  This patch changes the ifdef's
to CONFIG_IS_ENABLED to allow the modes to differ between
SPL and U-Boot.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-03-13 09:14:35 +01:00
Adam Ford
1463470b0a ARM: imx6q_logic: Enable MTD and NAND_MXS_DT
This patch supports enabling MTD, and the corresponding CMD_MTD
along with enabling the MXS NAND Controller with device tree
support.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-03-13 09:14:35 +01:00
Adam Ford
12d64098a5 ARM: imx6_logic: Fix typo in FDT address
A few scripts reference 'fdt_addr' when they should reference
'fdt_addr_r' so this patch fixes those broken references.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-03-13 09:14:35 +01:00
Shyam Saini
3f77c933ee include: configs: imx6-engicam: Add recovery boot option
Combined with watchdog board reset mechanism, this can be used as recovery
boot option after bootlimit exceeds the configured value.

Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
2019-03-13 09:14:35 +01:00
Shyam Saini
4eb9aa3935 configs: imx6qdl_icore_mmc: Enable watchdog and bootcounter
Enable watchdog and bootcounter support on imx6qdl board

Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
2019-03-13 09:14:35 +01:00
Shyam Saini
74bf932679 board: engicam: Add watchdog support on Engicam
This patch adds watchdog support for engicam imx6 family
of boards.

Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
2019-03-13 09:14:35 +01:00
Fabio Estevam
75cd09cb18 imx8qxp: Fix the reported CPU frequency
Currently the CPU frequency is incorrectly reported:

CPU:   NXP i.MX8QXP RevB A35 at 147228 MHz

Fix this problem by using a direct call to the SCU firmware to
retrieve the Cortex A35 CPU frequency.

With this change applied the CPU frequency is displayed correctly:

CPU:   NXP i.MX8QXP RevB A35 at 1200 MHz

Tested-by: Marcelo Macedo <marcelo.macedo@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Andrejs Cainikovs <andrejs.cainikovs@netmodule.com>
2019-03-13 09:14:35 +01:00
Fabio Estevam
f6c3a9136b imx8mq_evk: Add myself as a co-maintainer
I would like to help maintaining this board.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2019-03-13 09:14:35 +01:00
Fabio Estevam
15b7e91f5c imx8mq_evk: Move CONFIG_ENV_IS_IN_MMC to Kconfig
Currently the command "saveenv" is not available.

The CONFIG_ENV_IS_IN_MMC symbol has been converted to Kconfig,
so fix the problem by moving it to the defconfig.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-03-13 09:14:35 +01:00
Fabio Estevam
1e46d0bc6e mx6sabreauto: README: Adjust the binary name after DM conversion
After the conversion to DM the U-Boot binary is called u-boot-dtb.imx,
so fix the README file accordingly.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2019-03-13 09:14:35 +01:00
Fabio Estevam
6e2025b476 mx6sabresd: README: Adjust the binary name after DM conversion
After the conversion to DM the U-Boot binary is called u-boot-dtb.imx,
so fix the README file accordingly.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2019-03-13 09:14:35 +01:00
Martyn Welch
4ab7ab0b8f imx: mx6qsabrelite: Update the SabreLite README
The information in the SabreLite README is inaccurate and sparse. The
upstream U-Boot can boot the SabreLite from SPI-NOR. Additionally, the
freely available imx_loader tool can be easily used to boot a board with a
corrupted SPI, the official Freescale/NXP manufacturing tools are not
required.

Reformat the document, adding a description of how to boot from SPI-NOR
and adding a brief description of how to recover the board should the
SPI-NOR be corrupted using imx_loader.

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Acked-by: Troy Kisky <troy.kisky@boundarydevices.com>
2019-03-13 09:14:35 +01:00
Baruch Siach
34808caf7a imx8mq_evk/README: fix DDR training firmware path
Remove a redundant directory level.

Reported-by: Ofer Heifetz <ofer.heifetz@valens.com>
Tested-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-03-13 09:14:35 +01:00
Baruch Siach
57390c3a92 imx8mq_evk/README: add missing firmware extract step
Tested-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-03-13 09:14:35 +01:00
Fabio Estevam
e077b3ba4d warp7: Fix the write to the LDOGCTL PMIC register
The third parameter of the pmic_clrsetbits() function is the mask
to the register and the correct mask is 1 not 0.

Since the LDOGCTL only contains a single valid bit (bit 0),
we can use pmic_reg_write() and write 1 directly, which fixes
the problem in a simpler way and use the original pmic function
that was used prior to the DM PMIC conversion.

Fixes: 8ba377321c ("arm: imx7s-warp: Convert to DM PMIC")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-03-13 09:14:35 +01:00
Fabio Estevam
250cf75424 mx6ul_14x14_evk: Simplify the PMIC register writes
There is no need to store the values written to the PMIC inside the
'reg' variable. Make it simpler by writing the values directly.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-03-13 09:14:35 +01:00
Fabio Estevam
c6235ef3cb warp7: Remove unneeded headers after DM conversion
After DM conversion the I2C and MMC related board codes have been
removed, so remove the corresponding header files as well.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-03-13 09:14:35 +01:00