The option is specified in Kconfig, but still a few config header files
are overriding the choice by #undef'ing it. Re-sync the option with
moveconfig to rid of the #undefs.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Having this as a 'default y' is rather annoying because it doesn't
actually compile unless other options are defined in the board header:
../cmd/bootm.c: In function 'do_imls_nor':
../cmd/bootm.c:330:7: error: 'CONFIG_SYS_MAX_FLASH_BANKS' undeclared (first use in this function); did you mean 'CONFIG_SYS_MAX_FLASH_SECT'?
i < CONFIG_SYS_MAX_FLASH_BANKS; ++i, ++info) {
Make it 'default n' so people who develop new boards that start from a
blank defconfig have one less compilation failure to debug.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Realloc does not free the old memory area if it fails.
Identified by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The livetree codepath of ofnode_get_addr_size always used the "reg"
property for of_get_property. Use the property parameter of the function
call instead and check the return value if the property exists.
Otherwise return FDT_ADDR_T_NONE.
This was discoverd while using SPI NOR with livetree.
spi_flash_decode_fdt checks for memory-map and will not fail with
livetree even if the property does not exist.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The size variable may not be always be a mulitple of
ARCH_DMA_MINALIGN and using it to flush cache leads to cache
misaligned warnings.
Therefore, round up the size to a multiple of ARCH_DMA_MINLAIGN
when allocating private data.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
These checks cannot fail since driver model will not call a driver's
method if it cannot fully create the driver data structures.
It is confusing to have these checks and others might copy them. Drop this
code.
Signed-off-by: Simon Glass <sjg@chromium.org>
In U-Boot -ENODEV means that there is no device. When there is a problem
with the device, drivers should return an error like -ENXIO or -EREMOTEIO.
When the device tree properties cannot be read correct , they should
return -EINVAL.
Update various GPIO drivers to follow this rule, to help with consistency
for future driver writers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Adam Ford <aford173@gmail.com>
These three drivers all use U_BOOT_DEVICE rather than device tree to
create devices, so have to do manual allocation of platform data. This is
not true for new platforms.
Add a more explicit comment so that people do not copy this approach with
new boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Adam Ford <aford173@gmail.com>
It does not look like this driver needs to use a bind() method. It does
not manually create devices with device_bind() nor does it create devices
using U_BOOT_DEVICE(). It seems to only use device tree.
Therefore the manual allocation of platform data is not needed and is
confusing. Also platform data should be set up by the ofdata_to_platdata()
method, not bind().
Update the driver in case others use it as a model in future.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Adam Ford <aford173@gmail.com>
Since e7881d85 "dm: mmc: Drop CONFIG_DM_MMC_OPS" DM_MMC_OPS
is no more used, remove it from STM32_SDMMC2 dependencies
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Add pinctrl and sdmmc nodes to add MMC support for
STM32H743 evaluation board.
Evaluation board needs a second pinctrl node
"pinctrl_sdmmc1_level_shifter" to drive a level shifter
on MMC bus.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
As suggested by Vikas Manocha, update embedded SRAM address
to use AXI SRAM available on D1 domain instead of using
AHB SRAM (D2 domain).
On some STM32H743 SoCs, D2 domain SRAM is accessible even if
SRAMxEN bit in AHB2ENR bits are not set whereas on others SoCs
version it's not accessible.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
As the timer 2 is on APB1 bus, the maximum of clock frequency of APB1 timer
clock is half of SYSCLK. Then to calculate the timer prescaler for timer 2
which need to be divided by 2.
Signed-off-by: Bo Shen <voice.shen@gmail.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Check malloc() return values and properly unwind on errors so
memory allocated for fat_itr structures get freed properly.
Also fixes a leak of fsdata.fatbuf in fat_size().
Fixes: 2460098cff ("fs/fat: Reduce stack usage")
Reported-by: Coverity (CID: 167225, 167233, 167234)
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Tom Rini <trini@konsulko.com>
The 'block' field of fat_itr needs to be properly aligned for DMA and
while it does have '__aligned(ARCH_DMA_MINALIGN)', the fat_itr structure
itself needs to be properly aligned as well.
While at it use malloc_cache_aligned() for the other aligned allocations
in the file as well.
Fixes: 2460098cff ("fs/fat: Reduce stack usage")
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Tom Rini <trini@konsulko.com>
In the Linux Kernel on ARM64, the Image.COMPRESSION file is not
self-extracting in the way that x86 and ARM images are. So when
CMD_BOOTI is enabled we should also default to enabling CMD_UNZIP and
CONFIG_LZMA in order for the user to be able to decompress many of the
common compressions that will be done to an Image file.
Signed-off-by: Tom Rini <trini@konsulko.com>
On case-insensitive file systems we have collision between
scripts/kconfig/ directory and scripts/Kconfig file. This patch moves
scripts/Kcofnig contents to cmd/Kconfig to fix that.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This driver is currently used by STM32F7 and STM32H7 SoCs.
As CONFIG_CLK and OF_CONTROL flags are set by default for these
2 SoCs, this flag becomes useless in this driver, so remove it.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
stm32f4 doesn't support FIFO and OVERRUN feature.
The enable bit is not at the same location in CR1
register than for STM32F7 and STM32H7.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Add fifo mode support for rx and tx.
As only STM32H7 supports this feature, add has_fifo flag
to uart configuration to use fifo only when possible.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
STM32F4 serial IP is similar to F7 and H7, but registers
are not located at the same offset and some feature are
only supported by F7 and H7 version.
Registers offset must be added for each version and also
some flags indicated the supported feature.
Update registers name to match with datasheet (sr to isr,
rx_dr to rdr and tx_dr to tdr) and remove unused regs
(cr2, gtpr, rtor, and rqr).
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
This patch remove the extra compatibility string "st,stm32h7-usart"
and "st,stm32f7-usart" to avoid confusion, save some time & space.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
macro branch_if_master checks master CPU via (Aff3 & (Aff2:Aff1:Aff0))
it is simple but a little obscure.
fix by checking Affx fields within MPIDR_EL1 directly.
Signed-off-by: zijun_hu <zijun_hu@htc.com>
relocate_code() allocates 32 bytes stack frame but only 16 bytes are
freed before return. it will cause errors to possible previous frames
and doesn't make relocate_code() look like a function.
fix by freeing 32 bytes stack space
Signed-off-by: zijun_hu <zijun_hu@htc.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
the new GD address is calculated via board data BD currently
it require the new GD area locates below BD tightly, so a strict
constraint is imposed on memory layout which maybe make special
platform unpleasant.
fix it by getting new GD address from gd->new_gd directly.
Signed-off-by: zijun_hu <zijun_hu@htc.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Given how we handle the ARM toolchain we can't easily combine these two
jobs, so don't. Give xilinx/ARM a separate build.
Signed-off-by: Tom Rini <trini@konsulko.com>
The recent changes to these files did not completely fix the previous
issues, or introduced different (minor) issues. In cmd/gpt.c we need to
dereference str_disk_guid to be sure that malloc worked. In
cmd/nvedit.c we need to be careful that we can also fit in that leading
space when adding to the string. And in tools/fit_image.c we need to
re-work the error handling slightly in fit_import_data() so that we only
call munmap() once. We have two error paths here, one where we have an
fd to close and one where we do not. Adjust labels to match this.
Reported-by: Coverity (CID: 167366, 167367, 167370)
Signed-off-by: Tom Rini <trini@konsulko.com>
This board is based on Intel Tangier SoC (Intel Merrifield platform)
and may utilize ACPI powerfulness.
Bring minimum support by appending initial DSDT table for it.
Note, the addresses for generated tables are carefully chosen to avoid
any conflicts with existing shadowed BIOS data. The user have somewhat
like ~31 kB available for compiled ACPI tables that ought to be enough.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Tangier SoC is a part of Intel Merrifield platform which doesn't
utilize ACPI by default. Here is an attempt to unleash ACPI flexibility
power on Intel Merrifield based platforms.
The change brings minimum support of the devices that found on
Intel Merrifield based end user device.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The setexpr command is useful for scripting, lets enable it for all
x86 based theadorable platforms.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This enables the easier usage of "-custom" kernel versions as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is needed for the PCIe hotplug to work correctly on some boards.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
- Move SoCFPGA and K2 boards to their own job
- Expand the microblaze job to cover ARM boards from Xilinx as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
As reported by Coverity, we did not free dirnode in the case of failure.
Do so now.
Reported-by: Coverity (CID: 131221)
Cc: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Coverity has found some problems with the return paths in parts of this
code. We have a case where we were going to the wrong part of the
unwind (open() failed so we cannot close the fd), a case where we were
only free()ing our buf on the error path and finally a case where we did
not munmap in the failure path.
Reported-by: Coverity (CID: 138492, 138495, 143064)
Signed-off-by: Tom Rini <trini@konsulko.com>
