The name of the gpio bank under DM_GPIO appear to be a copy-paste error.
This changes the name of the gpio bank from am33xx_gpios to omap34xx_gpios.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Each call of va_start must be matched by a call of va_end.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
When CONFIG_DM_SCSI is defined, the SATA initialization will be implemented
in the scsi-uclass driver.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
All the clocks which has to be enabled has to be done in
enable_basic_clocks(), so moving enable sata clock to common
clocks enable function.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
As K2 can directly boot U-Boot, add u-boot_HS_MLO as the secure image
name for secure K2 devices, for all boot modes other than SPI flash.
Signed-off-by: Madan Srinivas <madans@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Like the OMAP54xx, AM43xx, & AM33xx family SoCs, the keystone family
of SoCs also have high security enabled models. Allow K2E devices to
be built with HS Device Type Support.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Madan Srinivas <madans@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Up till this commit passing NULL as input parameter was allowed, but not
handled properly.
When one passed NULL to one of this function parameters, the code was
executed causing data abort.
However, what is more interesting, the abort was not caught because of code
execution in HYP mode with masked CPSR A bit ("Imprecise Data Abort mask bit).
The TI's AM57xx SoC switch to HYP mode with A bit masked in lowlevel_init.S
due to SMC call. Such operation (by default) is performed in SoC ROM code.
The problem would pop up when one:
- Switch back to SVC mode after disabling LPAE support
- Somebody enables A bit (by executing cpsie a asm instruction)
and then the previously described exception would be caught.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
By making dram_init_banksize() return an error code we can drop the
wrapper. Adjust this and clean up all implementations.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Enable DM_I2C/SPI/ETH for all AM43XX based boards.
Enable it using imply keyword so that a user can
disable this when not needed.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
To make SPL_OF_CONTROL work on OMAP2+ SoCs, _image_binary_end must be
defined in the linker script along with CONFIG_SPL_SEPARATE_BSS.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Currently, AM43xx just re-uses the version strings from AM33xx which is
wrong; the actual values for AM43xx are different. Fix this by adding
a separate version string array for AM43xx and use this instead.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reported-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
To keep a consistent MMC device mapping in SPL and in u-boot, let's
register the MMC controllers the same way in u-boot and in the SPL.
In terms of boot time, it doesn't hurt to register more controllers than
needed because the MMC device is initialized only prior being accessed for
the first time.
Having the same device mapping in SPL and u-boot allows us to use the
environment in SPL whatever the MMC boot device.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
The workaround for ARM errata 725233 had been lost since
commit 45bf05854b (armv7: adapt omap3 to the new cache
maintenance framework). Bring it back in order to avoid
very difficult to reproduce, but actually encountered in
the wild CPU deadlocks when running software rendered
X11 desktop on OMAP3530 hardware.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Migrate to Kconfig]
Signed-off-by: Tom Rini <trini@konsulko.com>
Boards with OMAP3530 SoC fail to boot since commit bd2c4522c2
("ti: armv7: enable EXT support in SPL (using ti_armv7_common.h)")
because it enabled the use of Thumb2 for the SPL.
Experiments have shown that the deadlock happens in the
prcm_init() function from 'arch/arm/mach-omap2/omap3/clock.c'.
This patch enforces the compilation of clock.c source file in
ARM mode and makes the deadlock disappear. We are yet to figure
out the root cause of the problem. Still this is somewhat
better than having non-bootable boards for years.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Some initialization was unintentionally being skipped on omap5.
Fixes: f5af0827f2 ("arm: omap-common: Guard some parts of the code with CONFIG_OMAP44XX/OMAP54XX")
Signed-off-by: Matthijs van Duin <matthijsvanduin@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Currently nandecc returns zero even if underlaying
omap_nand_switch_ecc function fails. Fix that by
propagating error returned to command return value.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Move the default y options under arch/arm/mach-omap2/omap4/Kconfig to be
using imply instead in arch/arm/Kconfig
Signed-off-by: Tom Rini <trini@konsulko.com>
Move the default y options under arch/arm/mach-omap2/omap3/Kconfig to be
using imply instead in arch/arm/Kconfig
Signed-off-by: Tom Rini <trini@konsulko.com>
The option that we had set in board/ti/common/Kconfig as default y are
best done with imply under the appropriate main Kconfig option instead.
Signed-off-by: Tom Rini <trini@konsulko.com>
These particular SPL options are part of what the ROM provides, but for
compatibility with how we have previously used them, move them to being
implied by the board being selected.
Signed-off-by: Tom Rini <trini@konsulko.com>
After we authenticate/decrypt an image we need to flush the caches
as they may still contain bits of the encrypted image. This will
cause failures if we attempt to jump to this image.
Reported-by: Yogesh Siraswar<yogeshs@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
When the node 'reserved-memory' is not defined in the DT we fail
to add needed properties. We also fail to move 'offs' to point to
the new node. Fix these here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The check for OMAP3630/3730 only checks for 800MHz 3630/3730, but
anything else is lumped into 36XX/37XX with an assumed 1GHz speed.
Based on the DM3730 TRM bit 9 shows the MPU Frequency (800MHz/1GHZ).
This also adds the ability to distinguish between the DM3730, DM3725,
AM3715, and AM3703 and correctly display their maximum speed.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Ladislav Michl <ladis@linux-mips.org>
chiliBoard is a development board which uses chiliSOM as its base.
Hardware specification:
* chiliSOM (TI AM335x, DRAM, NAND)
* Ethernet PHY (id 0)
* USB host (usb1)
* MicroSD slot (mmc0)
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
chiliSOM is a System On Module (http://http://grinn-global.com/chilisom/).
It can't exists on its own, but will be used as part of other boards.
Hardware specification:
* TI AM335x processor
* 128M, 256M or 512M DDR3 memory
* up to 256M NAND
We place source inside arch/arm/mach-omap2/ directory and make it
possible to reuse initialization code (i.e. DDR, NAND init) for all
boards that use it.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Currently all secure media types of SPL are generated for all platforms,
all platforms do not need all types, only generate the media types valid
for each platform.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)
Latest gcc compile strted complaining about defined structure definition
that are not used. Remove the unused sturctures.
Reported-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Latest gcc 6.2 compiler is throwing the below warning for omap4_panda_defconfig
arch/arm/mach-omap2/omap4/hw_data.c:136:3: warning: 'abe_dpll_params_sysclk_196608khz' defined but not used [-Wunused-const-variable=]
abe_dpll_params_sysclk_196608khz[NUM_SYS_CLKS] = {
Fix this by guarding it with CONFIG_SYS_OMAP_ABE_SYSCK
Reported-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
While moving OMAP related files to mach-omap2 the functionality
relating to generating secure boot files was modified. This change
prevents secure platforms other than AM33xx and OMAP54XX from
correctly building files for all needed media types.
Fixes: 983e37007d ("arm: Introduce arch/arm/mach-omap2 for OMAP2 derivative platforms")
Signed-off-by: Andrew F. Davis <afd@ti.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
commit: 65f83802b7 "serial: 16550: Add getfcr accessor"
breaks u-boot commandline working with long commands
sending to the board.
Since the above patch, you have to setup the fcr register.
For board/archs which enable OF_PLATDATA, the new field
fcr in struct ns16550_platdata is not filled with a
default value ...
This leads in not setting up the uarts fifo, which ends
in problems, when you send long commands to u-boots
commandline.
Detected this issue with automated tbot tests on am335x
based shc board.
The error does not popup, if you type commands. You need
to copy&paste a long command to u-boots commandshell
(or send a long command with tbot)
Possible boards/plattforms with problems:
./arch/arm/cpu/arm926ejs/lpc32xx/devices.c
./arch/arm/mach-tegra/board.c
./board/overo/overo.c
./board/quipos/cairo/cairo.c
./board/logicpd/omap3som/omap3logic.c
./board/logicpd/zoom1/zoom1.c
./board/timll/devkit8000/devkit8000.c
./board/lg/sniper/sniper.c
./board/ti/beagle/beagle.c
./drivers/serial/serial_rockchip.c
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
On AM33xx devices the secure ROM uses a different call index for
signature verification, the function and arguments are the same.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Move (and rename) the following CONFIG options to Kconfig:
CONFIG_DAVINCI_MMC (renamed to CONFIG_MMC_DAVINCI)
CONFIG_OMAP_HSMMC (renamed to CONFIG_MMC_OMAP_HS)
CONFIG_MXC_MMC (renamed to CONFIG_MMC_MXC)
CONFIG_MXS_MMC (renamed to CONFIG_MMC_MXS)
CONFIG_TEGRA_MMC (renamed to CONFIG_MMC_SDHCI_TEGRA)
CONFIG_SUNXI_MMC (renamed to CONFIG_MMC_SUNXI)
They are the same option names as used in Linux.
This commit was created as follows:
[1] Rename the options with the following command:
find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \
-type f -print | xargs sed -i -e '
s/CONFIG_DAVINCI_MMC/CONFIG_MMC_DAVINCI/g
s/CONFIG_OMAP_HSMMC/CONFIG_MMC_OMAP_HS/g
s/CONFIG_MXC_MMC/CONFIG_MMC_MXC/g
s/CONFIG_MXS_MMC/CONFIG_MMC_MXS/g
s/CONFIG_TEGRA_MMC/CONFIG_MMC_SDHCI_TEGRA/g
s/CONFIG_SUNXI_MMC/CONFIG_MMC_SUNXI/g
'
[2] Commit the changes
[3] Create entries in driver/mmc/Kconfig.
(copied from Linux)
[4] Move the options with the following command
tools/moveconfig.py -y -r HEAD \
MMC_DAVINCI MMC_OMAP_HS MMC_MXC MMC_MXS MMC_SDHCI_TEGRA MMC_SUNXI
[5] Sort and align drivers/mmc/Makefile for readability
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Add usb ether gadget device with usb_ether_init() when
CONFIG_DM_ETH and CONFIG_USB_ETHER are defined.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The SPL load address changes based on boot type in HS devices,
ISW_ENTRY_ADDR is used to set this address for AM43xx based SoCs
for similar reasons. Add this same logic for AM33xx devices.
Also make the default value for ISW_ENTRY_ADDR correct for GP
devices based on SoC, HS devices already pick the correct
value in their defconfig.
Signed-off-by: Andrew F. Davis <afd@ti.com>
When TI_SECURE_DEV_PKG is not defined we warn that the file '*_HS' was
not generated but generate an unsigned one anyway, first fix this
warning to say that it was generated but not secured.
When the user then exports TI_SECURE_DEV_PKG after getting this warning,
and tries to re-build, 'make' will detect the build artifacts as
unchanged and so assume they do not need to be re-generated. This causes
it to fail to sign the files and it will pack unsigned files into the
final image, even though TI_SECURE_DEV_PKG is now correctly defined and
working.
Fix this by using FORCE on the targets causes them to be re-run even if
the dependent files have not changed.
This then causes another issue. We currently rename the signed dtb files
to overwrite the non-signed ones. We do this so the 'mkimage' tool gives
the packaged dtb sections the correct name. If we do not rename the files
then SPL will not find them during boot.
Fix this by renaming the dtb files by appending _HS to the end of the
filename, after the ".dtb", this causes them to still be named correctly
in the FIT blob.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Since entry_point and load_addr are addresses, they should be
represented as longs to cover the whole address space and to avoid
warning when compiling the SPL in 64-bit.
Also adjust debug prints to add the 'l' specifier, where needed.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Features supported :
* Serial console
* SPI Flash
* MMC/SD Card
* eMMC storage
* SATA
* PCA9555 - GPIO expander over I2C5 bus
* USB
Use spl alternate boot device feature to define fallback to
the main boot device as it is defined by hardware.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
[uri.mashiach@compulab.co.il: Adjust to v2016.11]
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Initialize EMIF OCP_CONFIG registers REG_COS_COUNT_1, REG_COS_COUNT_2,
and REG_PR_OLD_COUNT field for Beaglebone-Black and am335x-evm. With
the default values LCDC suffers from DMA FIFO underflows and frame
synchronization lost errors. The initialization values are the highest
that work flawlessly when heavy memory load is generated by CPU. 32bpp
colors were used in the test. On BBB the video mode used 110MHz pixel
clock. The mode supported by the panel of am335x-evm uses 30MHz pixel
clock.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Palmas driver assumes it is always TPS659xx regulator on all DRA7xx based
boards to enable mmc regulator. This is not true always like in case of
DRA71x-evm. So get this information based on the board.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Delete omap4_vmmc_pbias_config from omap_hsmmc.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
Add the pmic_data for LP873x PMIC which is used to power
up dra71x-evm.
Note: As per the DM[1] DRA71x supports only OP_NOM. So, updating
the efuse registers only to use OPP_NOM irrespective of any
CONFIG_DRA7_<VOLT>_OPP_{NOM,od,high} is defined.
[1] http://www.ti.com/product/DRA718/technicaldocuments
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This patch adds support to update the device-tree blob to adjust the
DSP and IVA DPLL clocks pertinent to the selected OPP choice, with
the default being OPP_NOM. The voltage settings are done in u-boot,
but the actual clock configuration itself is done in kernel because
of the following reasons:
1. SoC definition constraints us to NOT to do dynamic voltage
scaling ever after the initial avs0 setting in bootloader
- so the voltage must be set in bootloader.
2. The voltage level must be set even if the IP blocks like
GPU/DSP are unused.
3. The IVA, GPU and DSP DPLLs are not essential for u-boot functionality,
and similar DPLL clock configuration code has been cleaned up in
v2014.10 u-boot release. See commit, 02c41535b6 ("ARM: OMAP4/5:
Remove dead code against CONFIG_SYS_CLOCKS_ENABLE_ALL").
The non-essential DPLLs are configured within the kernel during
the clock init step when parsing the device tree and creating
the clock devices. This approach meets both the u-boot and kernel
needs.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Subhajit Paul <subhajit_paul@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Redefine the macros used to define the voltage values and the
efuse register offsets based on OPP for all the voltage domains.
This is done using Kconfig macros that can be set in a defconfig
or selected during a config step. This allows a voltage domain
to be configured/set to a corresponding voltage value depending
on the OPP selection choice.
The Kconfig choices have been added for MPU, DSPEVE, IVA and GPU
voltage domains, with the MPU domain restricted to OPP_NOM. The
OPP_OD and OPP_HIGH options will be added when the support for
configuring the MPU clock frequency is added. The clock
configuration for other voltage domains is out of scope in
u-boot code.
The CORE voltage domain does not have separate voltage values
and efuse register offset at different OPPs, while the MPU
voltage domain only has different efuse register offsets for
different OPPs, but uses the same voltage value. Any different
choices of OPPs for voltage domains on common ganged-rails
is automatically taken care to select the corresponding
highest OPP voltage value.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
It can be expected that different paper spins of a SoC can have
different definitions for OPP and can have their own constraints
on the boot up OPP for each voltage rail. In order to have this
flexibility, add support for dynamically selecting the OPP voltage
based on the board to handle any such exceptions.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add an OPTEE node to the FDT when TEE installation has completed
successfully. This informs the kernel of the presence of OPTEE.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
secure_tee_install is used to install and initialize a secure TEE OS such as
Linaro OP-TEE into the secure world. This function takes in the address
where the signed TEE image is loaded as an argument. The signed TEE image
consists of a header (struct tee_header), TEE code+data followed by the
signature generated using image signing tool from TI security development
package (SECDEV). Refer to README.ti-secure for more information.
This function uses 2 new secure APIs.
1. PPA_SERV_HAL_TEE_LOAD_MASTER - Must be called on CPU Core 0. Protected
memory for TEE must be reserved before calling this function. This API
needs arguments filled into struct ppa_tee_load_info. The TEE image is
authenticated and if there are no errors, the control passes to the TEE
entry point.
2. PPA_SERV_HAL_TEE_LOAD_SLAVE - Called on other CPU cores only after
a TEE_LOAD_MASTER call. Takes no arguments. Checks if TEE was
successfully loaded (on core 0) and transfers control to the same TEE
entry point.
The code at TEE entry point is expected perform OS initialization steps
and return back to non-secure world (U-Boot).
Signed-off-by: Harinarayan Bhatta <harinarayan@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
