Commit graph

37326 commits

Author SHA1 Message Date
Marek Vasut
43a092ffdd mips: ath79: Fix compiler warning on const assignment
The assignment const T var; var = value; is illegal, since var is
constant. Drop the const to fix the compiler warning.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
2016-05-21 01:36:38 +02:00
Marek Vasut
0a6767efab mips: ath79: Fix ar71xx_regs.h indent
The indent in this file triggers my OCD, so fix it. Replace multiple
spaces with tabs and align the values in one column.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
2016-05-21 01:36:38 +02:00
Marek Vasut
0a0a958b68 mips: Add MIPS 74Kc tune
Add MIPS 74Kc tune Kconfig option.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
[added missing tune-y entry in arch/mips/Makefile]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-21 01:36:38 +02:00
Marek Vasut
5760fc7850 mips: Fix compiler warning in cpu.c
There really is zero reason for including netdev.h in generic mips CPU code.
Removing the netdev.h from cpu.c also fixes the following compiler warning:

In file included from arch/mips/cpu/cpu.c:10:0:
include/netdev.h:204:41: warning: 'struct eth_device' declared inside parameter list [enabled by default]
 int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int));
                                         ^
include/netdev.h:204:41: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default]

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-21 01:36:38 +02:00
Wills Wang
59e4080c7e ath79: add readonly attribute for ath79_soc_desc
use 'const' keywork to qualify readonly attribute for lookup-table member

Signed-off-by: Wills Wang <wills.wang@live.com>
2016-05-21 01:36:38 +02:00
Wills Wang
5691d10a01 ath79: ar933x: use BIT macro for bit shift operation
used a uniform BIT macro for register bit-field shift

Signed-off-by: Wills Wang <wills.wang@live.com>
2016-05-21 01:36:38 +02:00
Wills Wang
773f3b2538 ar933x: serial: Remove the explicit pinctrl setting
The correct pinctrl is handled automatically so we don't need to do it in
the driver.

Signed-off-by: Wills Wang <wills.wang@live.com>
2016-05-21 01:36:38 +02:00
Wills Wang
5fabf2e7da ath79: spi: Remove the explicit pinctrl setting
The correct pinctrl is handled automatically so we don't need to do it in
the driver.

Signed-off-by: Wills Wang <wills.wang@live.com>
2016-05-21 01:36:37 +02:00
Tim Chick
8cf7a418bc mips: Report reloc information in bdinfo
Signed-off-by: Tim Chick <tim.chick@mediatek.com>
2016-05-21 01:36:23 +02:00
Purna Chandra Mandal
5c99045699 drivers: mtd: add Microchip PIC32 internal non-CFI flash driver.
PIC32 internal flash devices are parallel NOR flash divided into
number of banks to allow erase-programming in one while fetch and
execution continues on other. As the flash banks are memory mapped
stored code can be executed directly from flash (XIP), also there
is additional hardware logic to prefetch and cache contents to
improve execution performance. These flash can also be used to
store user data (like environment).
Flash erase and programming are handled by on-chip NVM controller.

Driver implemented driver model but MTD is not really support.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-21 01:25:50 +02:00
Purna Chandra Mandal
30fd42cba6 flash: add device ID for Microchip PIC32 internal flash.
Microchip PIC32 has internal parallel flash (non-CFI compliant).
These flash devices do not support any identifier command so no
standard IDs. Added unique IDs to seperate these flash devices
from others supported by U-Boot.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
2016-05-21 01:25:50 +02:00
Wills Wang
a2277cc30c mips: ath79: add AP143 reference board
This patch add board-level code and base DT for AP143.

Signed-off-by: Wills Wang <wills.wang@live.com>
[updated defconfig, enabled CONFIG_USE_PRIVATE_LIBGCC=y]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-21 01:25:50 +02:00
Wills Wang
6a7b52bc8d mips: ath79: add AP121 reference board
This patch add board-level code and base DT for AP121.

Signed-off-by: Wills Wang <wills.wang@live.com>
[updated defconfig, enabled CONFIG_USE_PRIVATE_LIBGCC=y]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-21 01:25:50 +02:00
Wills Wang
b85dc46072 drivers: spi: add spi support for QCA/Atheros ath79 SOCs
This patch add a compatible spi driver for ath79 series SOC.

Signed-off-by: Wills Wang <wills.wang@live.com>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-21 01:25:50 +02:00
Wills Wang
60b49761e9 drivers: serial: add serial driver for ar933x SOC
This patch add support for ar933x serial.

Signed-off-by: Wills Wang <wills.wang@live.com>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-21 01:25:50 +02:00
Wills Wang
c102453aeb drivers: pinctrl: Add simple pinctrl driver for Qualcomm/Atheros qca953x.
This is a simple pinctrl driver, it just support uart and spi pin-mux now.

Signed-off-by: Wills Wang <wills.wang@live.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[fixed typo in commit subject line]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-21 01:25:50 +02:00
Wills Wang
a79d0643f4 drivers: pinctrl: Add simple pinctrl driver for Qualcomm/Atheros ar933x.
This is a simple pinctrl driver, it just support uart and spi pin-mux now.

Signed-off-by: Wills Wang <wills.wang@live.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[fixed typo in commit subject line]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-21 01:25:50 +02:00
Wills Wang
9b03f802ae mips: ath79: add support for QCA953x SOCs
This patch enable work for qca953x SOC.

Signed-off-by: Wills Wang <wills.wang@live.com>
2016-05-21 01:25:50 +02:00
Wills Wang
ee7bb5be35 mips: ath79: add support for AR933x SOCs
This patch enable work for ar933x SOC.

Signed-off-by: Wills Wang <wills.wang@live.com>
2016-05-21 01:25:50 +02:00
Wills Wang
1d3d0f1f1c mips: add base support for QCA/Atheros ath79 SOCs
This patch add some common code for QCA/Atheros ath79 SOCs such as
DDR tuning, chip reset and CPU detection.

Signed-off-by: Wills Wang <wills.wang@live.com>
2016-05-21 01:25:50 +02:00
Stanislav Galabov
4a48cfc4e5 Add support for 64-bit MIPS to examples/standalone
Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>
2016-05-21 01:25:50 +02:00
Stanislav Galabov
78757d52c8 Fix FreeBSD loader API so that it works on both 32-bit and 64-bit targets.
Specifically tested on MIPS under QEMU (works with all  combination of bit-ness and endian-ness)

Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>
2016-05-21 01:25:50 +02:00
Stanislav Galabov
713a9e15bb Use CONFIG_IDE_SWAP_IO when running on big-endian MIPS (32 or 64-bit) in QEMU so that IDE transfers work properly
Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>
2016-05-21 01:25:50 +02:00
Stanislav Galabov
d92ea983b9 Properly calculate ATA_SECTORWORDS, using a fixed-size integer, so it works for both 32-bit and 64-bit targets
Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>
2016-05-21 01:25:50 +02:00
Tom Rini
4b6e1fda10 Merge git://git.denx.de/u-boot-dm 2016-05-17 13:58:27 -04:00
Tom Rini
27bec5c127 Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2016-05-17 12:10:35 -04:00
Simon Glass
341392dd11 dm: mmc: test: Add tests for MMC
Add a simple test which checks that a sandbox-emulated SD card can be used
correctly. This tests plumbing through the MMC stack's block-device
implementaion.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
afa2c3122d dm: sandbox: mmc: Enable building MMC code for sandbox
Enable building the MMC code for sandbox. This increases build
coverage for sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
f376a3cbbf dm: mmc: sandbox: Add an SD-card emulation
Add an emulation of an SD card to sandbox, allowing MMC to be used in tests.
The emulation is very simple, supporting only card detection and reading
test data.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
33fb211dd2 dm: mmc: Add support for driver-model block devices
Add support for enabling CONFIG_BLK with MMC. This involves changing a
few functions to use struct udevice and adding a MMC block device driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
ad27dd5e13 dm: mmc: Add a way to bind MMC devices with driver model
Binding an MMC device when CONFIG_BLK is enabled requires that a block
device be bound as a child of the MMC device. Add a function to do this.
The mmc_create() method will be used only when DM_BLK is disabled.

Add an unbind method also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
8ef761ed4c dm: mmc: Implement the MMC functions for block devices
Implement the functions in mmc_legacy.c for driver-model block devices, so
that MMC can use driver model for these. This allows CONFIG_BLK to be enabled
with DM_MMC.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
f8b7752e8f dm: sandbox: Only enable the sandbox MMC driver when valid
This driver will require generic MMC and block-device support in a future
commit. To avoid test errors, make this change now.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
fdbb139f0c dm: mmc: Adjust mmc_switch_part() to use a struct mmc
Instead of looking up the MMC device by number, just pass it in. This makes
it possible to use this function with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
1598dfcb10 dm: blk: Use the correct error code for blk_get_device_by_str()
Return -EINVAL instead of -1 in this function, to provide a more meaningful
error.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
c40fdca6b7 dm: mmc: Move the device list into a separate file
At present the MMC subsystem maintains its own list of MMC devices. This
cannot work with driver model, which needs to maintain this itself. Move the
list code into a separate 'legacy' file. The core MMC code remains, and will
be shared with the driver-model implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
cffe5d86cf dm: mmc: Set up the device pointer when using the MMC uclass
Update the existing drivers to set up this new pointer. This will be required
by the MMC uclass.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
b6694a33c4 dm: blk: Add a comment as to why the bdev member is needed
This member should be explained, since it is not obvious why it is needed.
Add a comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
6dd9faf8f9 dm: part: Drop the block_drvr table
This is not needed since we can use the functions provided by the legacy
block device support.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
1fde473da7 dm: part: Use the legacy block driver for hardware partition support
Drop use of the table in part.c for this feature.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
cd0fb55b64 dm: blk: Add functions to select a hardware partition
The block device uclass does not currently support selecting a particular
hardware partition but this is needed for MMC. Add it so that the blk API
can support MMC properly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
69f45cd53b dm: mmc: Use the new select_hwpart() API
Avoid calling directly into the MMC code - use the new API call instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
0776167ec5 dm: mmc: spl: Use the legacy block interface in SPL
Bring this in for SPL so that we can use generic code for loading from
block devices.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
cb5ec33d90 dm: mmc: Add a function to obtain the block device
The MMC block device is contained within struct mmc. But with driver model
this will not be the case. Add a function to obtain the block device. We
can later implement this for CONFIG_BLK.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
e17d1143c1 dm: mmc: Implement the select_hwpart() method
Implement this method so that hardware partitions will work correctly with
MMC.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
ff3882ac23 dm: mmc: Move mmc_switch_part() above its callers
This function is defined after it is used. In preparation for making it
static, move it up a little. Also drop the printf() which should not appear
in a driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
d0773524e1 dm: blk: Free the block device name when unbound
Mark the device name as allocated so that it will be freed correctly when the
device is unbound.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
a2040facd2 dm: core: Allow device names to be freed automatically
Some devices have a name that is stored in allocated memory. At present
there is no mechanism to free this memory when the device is unbound.

Add a device flag to track whether a name is allocated and a function to
add the flag. Free the memory when the device is unbound.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
72a85c0d2d dm: blk: Fix allocation of block-device numbering
Due to code ordering the block devices are not numbered sequentially. Fix
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
cd995a8aa0 dm: sandbox: Enable systemace
Enable building the systemace code for sandbox. This increases build
coverage for sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00