Commit graph

7120 commits

Author SHA1 Message Date
Timur Tabi
ae2291fbe0 fm-eth: add function fm_info_get_phy_address()
Function fm_info_get_phy_address() returns the PHY address for a given
Fman port.  This is handy when the MDIO code needs to fixup the Ethernet
nodes in the device tree to point to PHY nodes for a specific PHY address.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:18 -05:00
Timur Tabi
99abf7ded3 powerpc/85xx: add support for FM2 DTSEC5
Unlike previous SOCs, the Freescale P5040 has a fifth DTSEC on the second
Fman, so add the Fman and SerDes macros for that DTSEC.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:18 -05:00
Shaohui Xie
5d898a00f3 powerpc/CoreNet: add tool to support pbl image build.
Provides a tool to build boot Image for PBL(Pre boot loader) which is
used on Freescale CoreNet SoCs, PBL can be used to load some instructions
and/or data for pre-initialization. The default output image is u-boot.pbl,
for more details please refer to doc/README.pblimage.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:16 -05:00
Liu Gang
461632bd71 powerpc/corenet_ds: Slave module for boot from PCIE
When boot from PCIE, slave's core should be in holdoff after powered on for
some specific requirements. Master will release the slave's core at the
right time by PCIE interface.

Slave's ucode and ENV can be stored in master's memory space, then slave
can fetch them through PCIE interface. For the corenet platform, ucode is
for Fman.

NOTE: Because the slave can not erase, write master's NOR flash by
	  PCIE interface, so it can not modify the ENV parameters stored
	  in master's NOR flash using "saveenv" or other commands.

environment and requirement:

master:
	1. NOR flash for its own u-boot image, ucode and ENV space.
	2. Slave's u-boot image is in master NOR flash.
	3. Put the slave's ucode and ENV into it's own memory space.
	4. Normally boot from local NOR flash.
	5. Configure PCIE system if needed.
slave:
	1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
	2. Boot location should be set to one PCIE interface by RCW.
	3. RCW should configure the SerDes, PCIE interfaces correctly.
	4. Must set all the cores in holdoff by RCW.
	5. Must be powered on before master's boot.

For the slave module, need to finish these processes:
	1. Set the boot location to one PCIE interface by RCW.
    2. Set a specific TLB entry for the boot process.
	3. Set a LAW entry with the TargetID of one PCIE for the boot.
	4. Set a specific TLB entry in order to fetch ucode and ENV from
	   master.
	5. Set a LAW entry with the TargetID one of the PCIE ports for
	   ucode and ENV.
	6. Slave's u-boot image should be generated specifically by
	   make xxxx_SRIO_PCIE_BOOT_config.
	   This will set SYS_TEXT_BASE=0xFFF80000 and other configurations.

In addition, the processes are very similar between boot from SRIO and
boot from PCIE. Some configurations like the address spaces can be set to
the same. So the module of boot from PCIE was added based on the existing
module of boot from SRIO, and the following changes were needed:
	1. Updated the README.srio-boot-corenet to add descriptions about
	   boot from PCIE, and change the name to
	   README.srio-pcie-boot-corenet.
	2. Changed the compile config "xxxx_SRIOBOOT_SLAVE" to
	   "xxxx_SRIO_PCIE_BOOT", and the image builded with
	   "xxxx_SRIO_PCIE_BOOT" can support both the boot from SRIO and
	   from PCIE.
	3. Updated other macros and documents if needed to add information
	   about boot from PCIE.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:15 -05:00
Liu Gang
b5f7c8732a powerpc/corenet_ds: Master module for boot from PCIE
For the powerpc processors with PCIE interface, boot location can be
configured from one PCIE interface by RCW. The processor booting from PCIE
can do without flash for u-boot image. The image can be fetched from another
processor's memory space by PCIE link connected between them.

The processor booting from PCIE is slave, the processor booting from normal
flash memory space is master, and it can help slave to boot from master's
memory space.

When boot from PCIE, slave's core should be in holdoff after powered on for
some specific requirements. Master will release the slave's core at the
right time by PCIE interface.

Environment and requirement:

master:
    1. NOR flash for its own u-boot image, ucode and ENV space.
    2. Slave's u-boot image is in master NOR flash.
    3. Normally boot from local NOR flash.
    4. Configure PCIE system if needed.
slave:
    1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
    2. Boot location should be set to one PCIE interface by RCW.
    3. RCW should configure the SerDes, PCIE interfaces correctly.
	4. Must set all the cores in holdoff by RCW.
	5. Must be powered on before master's boot.

For the master module, need to finish these processes:
    1. Initialize the PCIE port and address space.
    2. Set inbound PCIE windows covered slave's u-boot image stored in
       master's NOR flash.
	3. Set outbound windows in order to configure slave's registers
	   for the core's releasing.
    4. Should set the environment variable "bootmaster" to "PCIE1", "PCIE2"
	   or "PCIE3" using the following command:

			setenv bootmaster PCIE1
			saveenv

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:15 -05:00
Liu Gang
81fa73bab0 powerpc/corenet_ds: Get rid of the CONFIG_SRIOBOOT_SLAVE_PORTx macro
When compile the slave image for boot from SRIO, no longer need to
specify which SRIO port it will boot from. The code will get this
information from RCW and then finishes corresponding configurations.

This has the following advantages:
	1. No longer need to rebuild an image when change the SRIO port for
	   boot from SRIO, just rewrite the new RCW with selected port,
	   then the code will get the port information by reading new RCW.
	2. It will be easier to support other boot location options, for
	   example, boot from PCIE.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:14 -05:00
Liu Gang
ff65f12699 powerpc/corenet_ds: Get rid of the SRIOBOOT_MASTER build target
Get rid of the SRIOBOOT_MASTER build target, and to support for serving as
a SRIO boot master via environment variable. Set the environment variable
"bootmaster" to "SRIO1" or "SRIO2" using the following command:

		setenv bootmaster SRIO1
		saveenv

The "bootmaster" will enable the function of the SRIO boot master, and
this has the following advantages compared with SRIOBOOT_MASTER build
configuration:
	1. Reduce a build configuration item in boards.cfg file.
	   No longer need to build a special image for master, just use a
	   normal target image and set the "bootmaster" variable.
	2. No longer need to rebuild an image when change the SRIO port for
	   boot from SRIO, just set the corresponding value to "bootmaster"
	   based on the using SRIO port.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:14 -05:00
Holger Brunck
81316a902a mtd/cfi_flash: fix write problems for Numonyx P33/30 32 MBit flashs
commit 54652991
Work around bug in Numonyx P33/P30 256-Mbit 65nm flash chips

fixes a problem for Numonyx P33/P30 flashes for 256-Mbit, but this leads
to problems for smaller versions of this chip e.g. the 32Mbit version
with deviceid 0x16 on mgcoge. So move the code for this work around to
an own function and check previously manufacturer id and device id to
not break other flashes which don't need this work around.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Stefan Roese <sr@denx.de>
cc: Philippe De Muyter <phdm@macqel.be>
cc: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-08-13 14:34:44 +02:00
Anatolij Gustschin
66863b0538 cfi_flash: add support for Spansion flash PPB sector protection
Erasing flash sectors protected with persistent protection bit (PPB)
mechanism on Spansion flash chips doesn't work. Add sector protection
status checking and sector lock and unlock commands to fix this.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-08-13 14:34:35 +02:00
Jorgen Lundman
4d3c95f5ea zfs: Add ZFS filesystem support
U-Boot port is based on sources forked from GRUB-0.97 by Sun in 2004,
which can be found here:
http://src.opensolaris.org/source/xref/onnv/onnv-gate/usr/src/grub/grub-0.97/stage2/zfs-include/zfs.h

Released by Sun for GRUB under the license:
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
  *  the Free Software Foundation; either version 2 of the License, or
  *  (at your option) any later version.

GRUB official releases include ZFS in version:
ftp://alpha.gnu.org/gnu/grub/grub-1.99~rc1.tar.gz

And patched against GRUB Bazaar repository for ashift fixes (4KB HDDs)
more conveniently found at github:
e7b6ef3ac3

Signed-off-by: Jorgen Lundman <lundman@lundman.net>
2012-08-09 23:42:20 +02:00
Jens Scharsig
eb0b43f264 rename EB+MCF-EV123 to its current marketing name EB+CPU5282
* rename board directory to eb_cpu5282
* rename EB+MCF-EV123_.*config to eb_cpu5282_.*config
* add Maintainer for EB+CPU5282 board
* rename prompt

Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
2012-08-09 23:07:32 +02:00
Fabio Estevam
f28e26951a configs: Remove unused symbol CONFIG_DISCOVER_PHY
CONFIG_DISCOVER_PHY is not used anywhere, so remove it from config files.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-08-09 22:32:05 +02:00
Simon Glass
d51004a832 Add run_command_list() to run a list of commands
This new function runs a list of commands separated by semicolon or newline.
We move this out of cmd_source so that it can be used by other code. The
PXE code also uses the new function.

Suggested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-08-09 22:06:03 +02:00
Marek Vasut
213adf6dff Malloc: Fix -Wundef warnings
In file included from arch/arm/lib/board.c:43:0:
include/malloc.h:490:5: warning: "HAVE_MMAP" is not defined [-Wundef]
include/malloc.h:590:5: warning: "HAVE_USR_INCLUDE_MALLOC_H" is not defined [-Wundef]
include/malloc.h:757:5: warning: "HAVE_MMAP" is not defined [-Wundef]

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>
2012-08-09 22:04:52 +02:00
Mike Frysinger
47fde91f0c global_data: unify global flag defines
All the global flag defines are the same across all arches.  So unify them
in one place, and add a simple way for arches to extend for their needs.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-08-09 21:46:32 +02:00
Wolfgang Denk
1d56f63dab Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx:
  powerpc/85xx: use CONFIG_SYS_FSL_PCIE_COMPAT macro when setting the PCI LIODNs
  powerpc/mpc85xx: Ignore E bit for BSC9130/1
  powerpc/sgmii: To support PHY link state auto detect in SGMII mode
  powerpc/85xx: improve definition of BR_PHYS_ADDR macro
  powerpc/p2041: configure the CPLD lane_mux according to RCW
  powerpc/ddr: fix fsl_ddr_get_dimm_params compile error
  powerpc/corenet: fix compile error when CONFIG_SYS_NO_FLASH is defined
  powerpc/mpc8xxx: fix workaround for errata DDR111 and DDR134 for DDR over 4GB
  powerpc/p1022ds: fix DIU/LBC switching with NAND enabled
  powerpc/p1022ds: add support for SPI and SD boot

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-08-09 21:04:05 +02:00
Timur Tabi
7ee411071f powerpc/85xx: improve definition of BR_PHYS_ADDR macro
The BR_PHYS_ADDR(x) macro was missing parentheses around "x" in the macro
definition, so callers had to supply their own parenthesis.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-08 18:32:15 -05:00
Shaohui Xie
0f57f6a3fe powerpc/corenet: fix compile error when CONFIG_SYS_NO_FLASH is defined
ENV location compile logic is wrong, and when CONFIG_SYS_NO_FLASH is defined
and non-NOR u-boot is building, it will cause compile error. Also, add
CONFIG_SYS_FLASH_USE_BUFFER_WRITE for p2041, which will improve NOR flash
write performance.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-08 17:13:38 -05:00
Matthew McClintock
af2536088e powerpc/p1022ds: add support for SPI and SD boot
Add TLB mappings, board target options, and configuration items
need for SPI/SD boot.

Since P1022DS RevB board, the NOR flash have been changed to 16 bit/28bit
address flash, therefore, when SDHC/ESPI booting and access to eLBC,
the PMUXCR[0~1] must be set to 10b, and PMUXCR[9~10] must be set to
00b for them.

Configure the PX_BRDCFG0[0~1] to 10b which is connected to
SPI devices as SPI_CS(0:3)_B.

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-08 17:13:37 -05:00
Nobuhiro Iwamatsu
d764c5043d sh: Add support pin function control using GPIO
Renesas SH and R-Mobile set up device using PFC.
This provide the framework. Most codes were brought from linux kernel.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-08-08 10:24:41 +09:00
Gerlando Falauto
56249fea3d powerpc/82xx: adapt SDRAM settings for mgcoge3ne
The HW guys suggested to change these two values. And these values are
now identical to the values we use on mgcoge.

PSDMR_WRC was set to 1C as it should lead to better performance.

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
2012-07-31 22:36:38 +02:00
Gerlando Falauto
c9718210b1 powerpc/82xx: use SDRAM detection for mgcoge2ne
mgcoge2ne was an intermediate step towards mgcoge3ne. One difference is the
smaller SDRAM on mgcoge2ne (128MB). To support both boards with the same
u-boot we use here the SDRAM detection.

This patch enables SDRAM detection between 256MB and 128MB.
So in addition to the existing 256MB geometry:
     4 chips x 8M (13 rows, 10 cols) x 16 bit x 4 banks
we can now also have 128MB geometry:
     4 chips x 4M (13 rows,  9 cols) x 16 bit x 4 banks

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
2012-07-31 22:36:35 +02:00
Gerlando Falauto
65c7f92313 powerpc/82xx: move km/km82xx-common.h within km82xx.h
The only file including km82xx-common.h is km82xx.h.
So there is no need to have it as a separate file.

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
2012-07-31 22:36:27 +02:00
Gerlando Falauto
b83cf848f0 powerpc/82xx: merge mgcoge.h and mgcoge3ne.h into km82xx.h
Since mgcoge and mgcoge3ne are the only km82xx boards, there is no need
to keep them as separate .h config files.
Therefore, make mgcoge3ne.h and mgcoge.h converge into a single km82xx.h
file.

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
2012-07-31 22:36:23 +02:00
Gerlando Falauto
bae5407dd2 powerpc/82xx: move mgcoge, mgcoge3ne defines to ease subsequent merge
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
2012-07-31 22:30:01 +02:00
Holger Brunck
4fdfe376eb powerpc/82xx: remove unused define for mgcoge3ne
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
2012-07-31 22:29:44 +02:00
Wolfgang Denk
948fa1713c Merge branch 'master' of git://git.denx.de/u-boot-i2c
* 'master' of git://git.denx.de/u-boot-i2c:
  km/common: remove printfs for i2c deblocking code
  CONFIG: SMDK5250: I2C: Enable I2C
  I2C: Add support for Multi channel
  I2C: Modify the I2C driver for EXYNOS5
  I2C: Move struct s3c24x0_i2c to a common place.
  EXYNOS: PINMUX: Add pinmux support for I2C
  EXYNOS5: define EXYNOS5_I2C_SPACING
  EXYNOS: Add I2C base address.
  EXYNOS: CLK: Add i2c clock
  mx6qsabrelite: add i2c multi-bus support
  imx-common: add i2c.c for bus recovery support
  i.mx53: add definition for I2C3_BASE_ADDR
  i.mx: iomux-v3.c: move to imx-common directory
  i.mx: iomux-v3.h: move to imx-common include directory
  iomux-v3: remove include of mx6x_pins.h
  mxc_i2c: finish adding CONFIG_I2C_MULTI_BUS support
  mxc_i2c: add bus recovery support
  mxc_i2c: prep work for multiple busses support
  mxc_i2c: add i2c_regs argument to i2c_imx_stop
  mxc_i2c: add retries
  mxc_i2c: check for arbitration lost
  mxc_i2c: change slave addr if conflicts with destination.
  mxc_i2c: don't disable controller after every transaction
  mxc_i2c: place i2c_reset code inline
  mxc_i2c: place imx_start code inline
  mxc_i2c: remove redundant read
  mxc_i2c: combine i2c_imx_bus_busy and i2c_imx_trx_complete into wait_for_sr_state
  mxc_i2c.c: code i2c_probe as a 0 length i2c_write
  mxc_i2c: call i2c_imx_stop on error in i2c_read/i2c_write
  mxc_i2c: create i2c_init_transfer
  mxc_i2c: clear i2sr before waiting for bit
  mxc_i2c: create tx_byte function
  mxc_i2c: remove ifdef of CONFIG_HARD_I2C
  mxc_i2c: fix i2c_imx_stop
  i2c: deblock i2c bus also if accessed before realocation

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-31 22:07:42 +02:00
Wolfgang Denk
d978780b2e Merge branch 'master' of git://git.denx.de/u-boot-microblaze
* 'master' of git://git.denx.de/u-boot-microblaze:
  microblaze: Wire up SPI driver
  spi: microblaze: Adds driver for Xilinx SPI controller
  microblaze: intc: Clear interrupt code
  microblaze: Call serial multi initialization
  microblaze: Move __udelay implementation
  microblaze: Remove extern from board.c
  microblaze: Wire up dts configuration
  fdt: Add board specific dts inclusion
  microblaze: Move individual board linker scripts to common script in cpu tree.
  microblaze: Add gpio.h
  microblaze: Add missing undefs for UBI and UBIFS
  microblaze: Expand and correct configuration comments
  microblaze: Enable ubi support
  microblaze: Avoid compile error on systems without cfi flash
  microblaze: Remove wrong define CONFIG_SYS_FLASH_PROTECTION

Conflicts:
	drivers/spi/Makefile

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-31 22:01:08 +02:00
Rajeshwari Shinde
c82b050ead CONFIG: SMDK5250: I2C: Enable I2C
This enables I2C support on smdk5250.
Pinmux setting moved to board file to avoid repeated setting of
gpio lines.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
2012-07-31 08:03:19 +02:00
Troy Kisky
9c06782863 mx6qsabrelite: add i2c multi-bus support
This includes bus recovery support.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Jason Liu <r64343@freescale.com>
2012-07-31 08:01:09 +02:00
Stephan Linz
bcec8f49d1 microblaze: Wire up SPI driver
Depending on XILINX_SPI_FLASH_BASEADDR enable SPI flash
and environment in SPI flash.

Expected values from xparameters.h are:
    - XILINX_SPI_FLASH_BASEADDR
    - XILINX_SPI_FLASH_MAX_FREQ
    - XILINX_SPI_FLASH_CS

Signed-off-by: Stephan Linz <linz@li-pro.net>
Acked-by: Michal Simek <monstr@monstr.eu>
2012-07-31 07:16:26 +02:00
Wolfgang Denk
b98b611502 Merge branch 'next' of git://git.denx.de/u-boot
* 'next' of git://git.denx.de/u-boot:
  MPC8xx: Fixup warning in arch/powerpc/cpu/mpc8xx/cpu.c
  doc: cleanup - move board READMEs into respective board directories
  net: sh_eth: add support for SH7757's GETHER
  net: sh_eth: modify the definitions of regsiter
  net: sh_eth: add SH_ETH_TYPE_ condition
  net: sh_eth: clean up for the SH7757's code
  net: fec_mxc: Fix MDC for xMII
  net: fec_mxc: Fix setting of RCR for xMII
  net: nfs: make NFS_TIMEOUT configurable
  net: Inline the new eth_setenv_enetaddr_by_index function
  net: allow setting env enetaddr from net device setting
  net/designware: Consecutive writes to the same register to be avoided
  CACHE: net: asix: Fix asix driver to work with data cache on
  net: phy: micrel: make ksz9021 phy accessible
  net: abort network initialization if the PHY driver fails
  phylib: phy_startup() should return an error code on failure
  net: tftp: fix type of block arg to store_block

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-30 20:39:52 +02:00
Linu Cherian
9f0a371d2c hawkboard: Fix SPL Nand driver misconfiguration
Hawkboard was using the wrong nand_read_page version for SPL image.
As a side effect, the u-boot image loaded by the SPL from nand
was getting corrupted.

Enable CONFIG_SYS_NAND_HW_ECC_OOBFIRST to select the correct nand_read_page
algorithm for SPL.

Signed-off-by: Linu Cherian <linucherian@gmail.com>
Acked-by: Sughosh Ganu <urwithsughosh@gmail.com>
Acked-by: Tom Rini <trini@ti.com>
2012-07-30 20:22:42 +02:00
Marek Vasut
546910f85f common.h: Remove include compiler.h
Remove this as including it on global scale breaks a lot of things.
This was reported by:
Matthew McClintock <B29882@freescale.com>

Fix found by:
Tom Rini <trini@ti.com>

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Tom Rini <trini@ti.com>
2012-07-20 22:30:04 +02:00
Wolfgang Denk
3ec81d758c Merge branch 'master' of git://git.denx.de/u-boot-usb
* 'master' of git://git.denx.de/u-boot-usb:
  usb_storage: fix ehci driver max transfer size
  smsc95xx: align buffers to cache line size
  ehci-hcd: change debug() to printf() in case of errors
  usb: check return value of submit_{control, bulk}_msg
  usb: pass cache-aligned buffer to usb_get_descriptor()
  ehci-hcd: fix external buffer cache handling
  ehci-hcd.c, musb_core, usb.h: Add USB_DMA_MINALIGN define for cache alignment
  ehci-hcd: program asynclistaddr before every transfer
  common.h: Introduce DEFINE_CACHE_ALIGN_BUFFER
  ehci-omap: Do not call dcache_off from omap_ehci_hcd_init

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-20 09:12:43 +02:00
Tom Rini
71c5de4f4a ehci-hcd.c, musb_core, usb.h: Add USB_DMA_MINALIGN define for cache alignment
The USB spec says that 32 bytes is the minimum required alignment.
However on some platforms we have a larger minimum requirement for cache
coherency.  In those cases, use that value rather than the USB spec
minimum.  We add a cpp check to <usb.h> to define USB_DMA_MINALIGN and
make use of it in ehci-hcd.c and musb_core.h.  We cannot use MAX() here
as we are not allowed to have tests inside of align(...).

Signed-off-by: Tom Rini <trini@ti.com>
[marek.vasut]: introduce some crazy macro voodoo
Signed-off-by: Marek Vasut <marex@denx.de>
[ilya.yanok]: moved external buffer fixes to separate patch,
we use {ALLOC,DEFINE}_ALIGN_BUFFER macros with alignment of USB_DMA_MINALIGN
for qh_list, qh and qtd structures to make sure they are proper aligned
for both controller and cache operations.
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-07-18 14:43:29 +02:00
Marek Vasut
de4d11355f common.h: Introduce DEFINE_CACHE_ALIGN_BUFFER
This is the out-of-function-scope counterpart of
ALLOC_CACHE_ALIGN_BUFFER.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@ti.com>
[ilya.yanok]: added missing <linux/compiler.h> include and
{DEFINE,ALLOC}_ALIGN_BUFFER macros allowing explicit alignment
specification.
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-07-18 14:43:14 +02:00
Wolfgang Denk
66714b1a6d Merge branch 'next' of git://git.denx.de/u-boot-video
* 'next' of git://git.denx.de/u-boot-video:
  ipu_common: Add ldb_clk for use in parenting the pixel clock
  ipu_common: Do not hardcode the ipu_clk frequency
  ipu_common: Rename MXC_CCM_BASE
  ipu_common: Let clk_ipu_enable/disable only run on MX51 and MX53
  ipu_common: Only apply the erratum to MX51
  video: Rename CONFIG_VIDEO_MX5
  mx6: Allow mx6 to access the IPUv3 registers
  common lcd: minor coding style changes

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-18 10:47:03 +02:00
Thomas Chou
7dfb060291 nios2: move gd and bd into BSS
As suggested by Graeme Russ, move gd and bd data structrures
to BSS instead of calculating the locations around the stack
and heap.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2012-07-16 09:51:12 +08:00
Wolfgang Denk
0878222fed Merge branch 'next' of git://git.denx.de/u-boot-net into next
* 'next' of git://git.denx.de/u-boot-net:
  net: Inline the new eth_setenv_enetaddr_by_index function
  net: allow setting env enetaddr from net device setting
  net/designware: Consecutive writes to the same register to be avoided
  CACHE: net: asix: Fix asix driver to work with data cache on
  net: phy: micrel: make ksz9021 phy accessible
  net: abort network initialization if the PHY driver fails
  phylib: phy_startup() should return an error code on failure
  net: tftp: fix type of block arg to store_block

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-12 08:23:58 +02:00
Troy Kisky
cc5f552283 net: phy: micrel: make ksz9021 phy accessible
Micrel accidentally used the same part number
for the KS8721 and KSZ9021. So, both cannot be
in the same build of u-boot. Add a config option
to handle this.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
2012-07-11 13:15:30 -05:00
Fabio Estevam
175a7d2778 mx28evk: Add I2C support
Add I2C support.

Tested by placing a 24LC16 EEPROM into the U50 slot which comes empty from factory.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-07-11 10:54:53 +02:00
Troy Kisky
3174689be2 mx6qsabrelite: add i2c support
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-07-11 10:54:52 +02:00
Troy Kisky
de6f604de2 mxc_i2c: specify i2c base address in config file
The following platforms had their config files changed
flea3, imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smd
and mx53loco.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-07-11 10:54:29 +02:00
Michal Simek
575a3d21f6 microblaze: intc: Clear interrupt code
Clear and prepare for device-tree driven configuration.
Remove CONFIG_SYS_INTC_0 definition
Use dynamic allocation instead of static.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Simon Glass <sjg@chromium.org>
2012-07-10 11:54:06 +02:00
Fabio Estevam
9fbdb1aac5 ipu_common: Do not hardcode the ipu_clk frequency
Do not hardcode the ipu_clk frequency and let the board file pass this value.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-07-10 11:35:39 +02:00
Fabio Estevam
695af9abc6 video: Rename CONFIG_VIDEO_MX5
Rename CONFIG_VIDEO_MX5 as this driver can also be used on mx6.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-07-10 11:35:38 +02:00
Stephan Linz
920c358781 microblaze: Wire up dts configuration
- enable OF control and embedded OF
    - set default device tree file name to 'microblaze'
    - add CPP to dtc proxy: board/xilinx/dts/microblaze.dts
    - add an empty but processable dts for microblaze-generic

Signed-off-by: Stephan Linz <linz@li-pro.net>
2012-07-10 10:01:29 +02:00
Wolfgang Denk
895f3e0542 Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm:
  tegra: define fdt_load/fdt_high variables
  tegra: enable bootz command
  tegra: usb: Fix device enumeration problem of USB1
  tegra: trimslice: set up serial flash pinmux
  tegra: add pin_mux_spi() board initialization function
  tegra: add GMC/GMD funcmux entry for SFLASH
  tegra: bootcmd: start USB only when needed
  tegra: bootcmd enhancements
  tegra: add enterrcm command
  tegra: enable CONFIG_ENV_VARS_UBOOT_CONFIG
  Add env vars describing U-Boot target board
  tegra: usb: fix wrong error check
  tegra: add ULPI on USB2 funcmux entry
  tegra: fix leftover CONFIG_TEGRA2_MMC & _SPI build switches
  tegra: Add Tamonten Evaluation Carrier support
  tegra: Use SD write-protect GPIO on Tamonten
  tegra: Implement gpio_early_init() on Tamonten
  tegra: Allow boards to perform early GPIO setup
  tegra: plutux: Add device tree support
  tegra: medcom: Add device tree support
  tegra: Rework Tamonten support
  beagle: add eeprom expansion board info for bct brettl4

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-10 08:54:41 +02:00
Stephen Warren
63905f1616 tegra: define fdt_load/fdt_high variables
These variables act like loadaddr, but for a device tree image. Defining
them in the environment allows boot scripts to be identical on Tegra20 and
Tegra30, which have different memory base addresses, and hence need
different values for these variables.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09 22:44:34 +02:00