Commit graph

22 commits

Author SHA1 Message Date
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Masahiro Yamada
a322eb9ff6 ARM: uniphier: hide memory top by platform hook instead of CONFIG
I do not see a good reason to do this by a CONFIG option that affects
all SoCs.  The ram_size can be adjusted by dram_init() at run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-09 21:58:19 +09:00
Masahiro Yamada
be893a5c09 ARM: uniphier: do not use RAM that exceeds 32 bit address range
LD20 / PXs3 boards are equipped with a large amount of memory beyond
the 32 bit address range.  U-Boot relocates itself to the end of the
available RAM.

This is a problem for DMA engines that only support 32 bit physical
address, like the SDMA of SDHCI controllers.

In fact, U-Boot does not need to run at the very end of RAM.  It is
rather troublesome for drivers with DMA engines because U-Boot does
not have API like dma_set_mask(), so DMA silently fails, making the
driver debugging difficult.

Hide the memory region that exceeds the 32 bit address range.  It can
be done by simply carving out gd->ram_size.  It would also possible to
override get_effective_memsize() or to define CONFIG_MAX_MEM_MAPPED,
but dram_init() is a good enough place to do this job.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-09 21:58:17 +09:00
Masahiro Yamada
dd74b945af ARM: uniphier: use pr_() instead of printf() where appropriate
Replace printf() with pr_() to specify proper loglevel.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-10-15 22:32:24 +09:00
Masahiro Yamada
b44b30260f printk: collect printk stuff into <linux/printk.h> with loglevel support
When we import code from Linux, with regular re-sync planned, we want
to use printk() and pr_*().  U-Boot does not support them in a clean
way.  So, people end up with local macros, or compat headers here and
there, then we occasionally see build errors of definition conflicts.

We have include/linux/compat.h, but putting all sorts of unrelated
things into a single header is just a temporal workaround.  Hence this
patch, to find the best home for all printk variants.  If you want to
use printk() and friends, please include <linux/printk.h>.  This header
is self-contained, and pulls in only a few headers.

When I was testing this clean-up, I noticed the image size exceeded
its platform limit on some boards.  This is because all pr_*() that
were previously defined as no-op in include/linux/mtd/mtd.h (unless
CONFIG_MTD_DEBUG is set), are now enabled.

To make such boards happy, this commit also implements CONFIG_LOGLEVEL.
The concept is similar to the kernel parameter "loglevel".  (Actually,
the Kconfig help message was taken from kernel-paremeter.txt of Linux)
Messages with a loglevel smaller than console loglevel will be printed.

The difference is the loglevel is build-time determined.  To save the
image size, lower priority pr_*() are compiled out.  I set the default
of CONFIG_LOGLEVEL to 6, i.e. pr_notice and higher priority messages
are compiled in.

I adjusted CONFIG_LOGLEVEL to avoid build error for some boards.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Add in SPL_LOGLEVEL that is the same as LOGLEVEL]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-10-04 10:31:17 -04:00
Masahiro Yamada
00aa453ebf ARM: uniphier: remove sLD3 SoC support
This SoC is too old.  It is difficult to maintain any longer.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-20 23:05:39 +09:00
Masahiro Yamada
1d21e1b97c ARM: uniphier: fix various sparse warnings
Fix warnings reported by sparse:
 - ... was not declared. Should it be static?"
 - cast to restricted __be32

While fixing those, the type conflict of cci500_init() was found.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-25 06:06:09 +09:00
Simon Glass
76b00aca4f board_f: Drop setup_dram_config() wrapper
By making dram_init_banksize() return an error code we can drop the
wrapper. Adjust this and clean up all implementations.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-04-05 16:36:51 -04:00
Masahiro Yamada
04cd4e7215 ARM: uniphier: remove DRAM base address from board parameters
The base address of each DRAM channel can be calculated from other
parameters, so does not need hard-coding.  What we need is the size
of each DRAM channel and DRAM_SPARSE flag to decide the start address
of DRAM channel 1.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
87c3308cbf ARM: uniphier: skip memreserve of unused DRAM bank of LD20
Now the "for" loop here iterates on the detected memory banks.
It must skip unused DRAM banks.

Fixes: c995f3a3c5 ("ARM: uniphier: use gd->bd->bi_dram for memory reserve on LD20 SoC")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
0f5bf09cf1 ARM: uniphier: correct spelling of "invalid"
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
bed1624d0d ARM: uniphier: skip MEMCONF ch2 parsing if CH2_DISABLE bit is set
If SG_MEMCONF_CH2_DISABLE bit is set, the DRAM channel 2 is unused.
The register settings for the ch2 should be ignored.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23 08:37:56 +09:00
Masahiro Yamada
c995f3a3c5 ARM: uniphier: use gd->bd->bi_dram for memory reserve on LD20 SoC
For LD20 SoC, the last 64 byte of each DRAM bank is used for the
dynamic training of DRAM PHY.  The regions must be reserved in DT to
prevent the kernel from using them.  Now gd->bd->bi_dram reflects
the actual memory banks.  Just use it instead of getting access to
the board parameters.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-29 20:59:08 +09:00
Masahiro Yamada
3e9952be23 ARM: uniphier: detect RAM size by decoding HW register instead of DT
U-Boot needs to set up available memory area(s) in dram_init() and
dram_init_banksize().  It is platform-dependent how to detect the
memory banks.  Currently, UniPhier adopts the memory banks _alleged_
by DT.  This is based on the assumption that users bind a correct DT
in their build process.

Come to think of it, the DRAM controller has already been set up
before U-Boot is entered (because U-Boot runs on DRAM).  So, the
DRAM controller setup register seems a more reliable source of any
information about DRAM stuff.  The DRAM banks are initialized by
preliminary firmware (SPL, ARM Trusted Firmware BL2, or whatever),
so this means the source of the reliability is shifted from Device
Tree to such early-stage firmware.  However, if the DRAM controller
is wrongly configured, the system will crash.  If your system is
running, the DRAM setup register is very likely to provide the
correct DRAM mapping.

Decode the SG_MEMCONF register to get the available DRAM banks.
The dram_init() and dram_init_banksize() need similar decoding.
It would be nice if dram_init_banksize() could reuse the outcome
of dram_init(), but global variables are unavailable at this stage
because the .bss section is available only after the relocation.
As a result, SG_MEMCONF must be checked twice, but a new helper
uniphier_memconf_decode() will help to avoid code duplication.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-29 20:59:08 +09:00
Masahiro Yamada
e27d6c7d32 ARM: uniphier: simplify SoC ID get function
Currently, uniphier_get_soc_type() converts the SoC ID (this is
read from the revision register) to an enum symbol to use it for SoC
identification.  Come to think of it, there is no need for the
conversion in the first place.  Using the SoC ID from the register
as-is a straightforward way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-22 16:49:27 +09:00
Masahiro Yamada
0f4ec05bbb ARM: uniphier: replace <linux/err.h> with <linux/errno.h>
These files only need error number macros.  Actually, IS_ERR(),
PTR_ERR(), ERR_PTR(), etc. are not useful for U-Boot.  Avoid
unnecessary header includes.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-22 15:32:56 +09:00
Masahiro Yamada
51ea5a060d ARM: uniphier: reserve memory for DRAM PHY training on PH1-LD20
The DRAM PHY layer on PH1-LD20 is able to calibrate PHY parameters
periodically.  This compensates for the voltage and temperature
deviation and improves the PHY parameter adjustment.  Instead, it
requires 64 byte scratch memory in each DRAM channel for the dynamic
training.  The memory regions must be reserved in DT before jumping
to the kernel.

The scratch area can be anywhere in each DRAM channel, but the DRAM
init code in SPL currently assigns it at the end of each channel.
So, it makes sense to reserve the regions on run-time by U-Boot
instead of statically embedding it in the DT in Linux.  Anyway,
a boot-loader should know much more about memory initialization
than the kernel.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-20 07:15:33 +09:00
Masahiro Yamada
7b3a032dd3 ARM: uniphier: avoid unaligned access to DT on 64bit SoC
Because DT properties are 4-byte aligned, the pointer access
*(fdt64_t *) in this code causes unaligned access.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24 09:53:55 +09:00
Masahiro Yamada
ac2a1030e3 ARM: uniphier: adjust dram_init() and dram_init_banksize() for ARM64
Currently, these functions assume #address-cells and #size-cells are
both one.  Fix them to support 64bit DTB.

Also, I am fixing a buffer overrun bug while I am here.  The array
size of gd->bd->bd_dram is CONFIG_NR_DRAM_BANKS.  The number of
iteration in the loop should be limited by that CONFIG.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-01 00:59:47 +09:00
Masahiro Yamada
11d3ede42c ARM: uniphier: fix warnings reported by aarch64 compiler
The UniPhier SoC family has not supported ARMv8 yet, but these would
cause warnings if they were compiled with a 64bit compiler.  Before
adding the ARMv8 support really, fix them now.

Because UniPhier SoCs do not support Large Physical Address Extension,
casting "phys_addr_t" into "unsigned long" would carry the address
as is.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-01 00:33:29 +09:00
Masahiro Yamada
cf88affab6 ARM: uniphier: parse device tree to determine DRAM base and size
Device tree specifies the available memory ranges in its "/memory"
node.  Use it to simplify the CONFIG defines.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:27:53 +09:00
Masahiro Yamada
4c42557021 ARM: UniPhier: move SoC sources to mach-uniphier
Move
arch/arm/cpu/armv7/uniphier/* -> arch/arm/mach-uniphier/*

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01 00:01:56 +09:00
Renamed from arch/arm/cpu/armv7/uniphier/dram_init.c (Browse further)