In rare circumstances two dhcp clients may generate the same
bootp ID. If this happens it is vital that the client also checks
the hw address in the received response to prevent IP address conflicts.
Signed-off-by: Anton Persson <don.juanton@gmail.com>
Fixes:
drivers/mmc/bcm2835_sdhci.c: In function ‘bcm2835_sdhci_init’:
drivers/mmc/bcm2835_sdhci.c:181:17: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Fixes:
arch/arm/mach-bcm283x/mbox.c: In function ‘bcm2835_mbox_call_prop’:
arch/arm/mach-bcm283x/mbox.c:118:48: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
arch/arm/mach-bcm283x/mbox.c:126:29: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Currently, CONFIG_BCM2835 is defined for all BCM283x builds and _BCM2836
is defined when building for that SoC. That means there isn't a single
define that means "exactly BCM2835". This will complicate future patches
where BCM2835-vs-anything-else needs to be determined simply.
Modify the code to define one or the other of CONFIG_BCM2835/BCM2836 so
future patches are simpler.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
It is possible to compile and run the sandbox target with clang
currently, so document that as well.
Cc: Jeroen Hofstee <jeroen@myspectrum.nl>
Signed-off-by: Tom Rini <trini@konsulko.com>
The bcm2835 frame buffer is in RAM, so we can easily map it as cached and gain
all the glorious performance boost that brings with it.
Signed-off-by: Alexander Graf <agraf@suse.de>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Now that we have support for running with caches enabled in HYP mode,
opt in to that on the Raspberry Pi 2. This brings a significant performance
boost.
Signed-off-by: Alexander Graf <agraf@suse.de>
When compiling the code for 64bit, the lcd code emits warnings because it
tries to cast pointers to 32bit values. Fix it by casting them to longs
instead, actually properly aligning with the function prototype.
Signed-off-by: Alexander Graf <agraf@suse.de>
We currently always modify the SVC versions of registers and only support
the short descriptor PTE format.
Some boards however (like the RPi2) run in HYP mode. There, we need to modify
the HYP version of system registers and HYP mode only supports the long
descriptor PTE format.
So this patch introduces support for both long descriptor PTEs and HYP mode
registers.
Signed-off-by: Alexander Graf <agraf@suse.de>
We want to be able to reuse device drivers from 32bit code, so let's add
definitions for all the dcache options that 32bit code has.
While at it, fix up the DCACHE_OFF configuration. That was setting the bits
to declare a PTE a PTE and left the MAIR index bit at 0. Drop the useless
bits and make the index explicit.
Signed-off-by: Alexander Graf <agraf@suse.de>
Add the pinmux data for rev C evm. This is different from previous
revisions of the platform thanks to the deltas introduced both from
silicon side and from SoC side.
Based on J6EcoES2_EVM_Base_Config-20160309b and PCT-DRA72x-v1.3.0.7 for
SR2.0 silicon.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
do_set_iodelay can now be used from board files based on needs of the
platforms variation they have.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Since many platforms may need different pad configuration required
depending on variation of the platform with minor deltas, it is
easier to maintain a sub step based approach to allow for pin mux
and iodelay configuration which may depend on the platform variations
and need to be done in IO isolation.
While we retain the older __recalibrate_iodelay function which provides
a ready sequencing, __recalibrate_iodelay_start and
__recalibrate_iodelay_end may be alternatively used now and the callers
will be responsible for the correct sequencing of operations.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
DDR configuration has changes from SR1.1 based Rev-A/B version of evm
to the SR2.0 based Rev C of the EVM. Rev C evm now uses the higher
density MT41K512M8RH-125-AAT:E (IT) which is of size 2GB.
Update the DDR configuration based on data from EMIF configuration
tool 1.1.1. NOTE: we use eeprom information (ram_size) to update the
configuration.
Tested-by: Vishal Mahaveer <vishalm@ti.com>
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Based on data from EMIF configuration tool 1.1.1. Expected update for
CTRL_WKUP_EMIF1_SDRAM_CONFIG_EXT in the next revision of the tool has
been incorporated as well.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add support for detection of SR2.0 version of DRA72x family of
processors.
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The EFI standard defines a simple boot protocol that an EFI payload can use
to access video output.
This patch adds support to expose exactly that one (and the mode already in
use) as possible graphical configuration to an EFI payload.
With this, I can successfully run grub2 with graphical output.
Signed-off-by: Alexander Graf <agraf@suse.de>
Fix up BOOT_SET_BITFIELD to be a static inline function to be readable
with the same functionality.
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
BOOT_READ_BITFIELD can easily be a static inline function and be a
little more readable with the same functionality.
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
BOOTBITMASK is almost impossible to decode, so convert it into a simpler
static line functions of equivalent solution.
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Same flash driver can be used by other stm32 families like stm32f7.
Better place for this driver would be mtd driver location.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
If including MX7D in CONFIG_SYS_EXTRA_OPTIONS, CONFIG_ROM_UNIFIED_SECTIONS
will not effect.So move MX7D to Kconfig entry from CONFIG_SYS_EXTRA_OPTIONS to
"select MX7D" to boards using i.MX7 Dual.
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
If including MX6SX in CONFIG_SYS_EXTRA_OPTIONS, CONFIG_ROM_UNIFIED_SECTIONS
will not effect.So move MX6SX to Kconfig entry from CONFIG_SYS_EXTRA_OPTIONS to
"select MX6SX" to boards using i.MX6 SoloX.
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
This patch add support for the CCV xPress board which is equipped
with the i.MX6UL. And provides the following interfaces:
- 128MiB DDR
- UART
- I2C
- eMMC (with booting)
- Ethernet
- USB
This patch adds two build targets. One with and one without SPL. The
non-SPL version is used for loading U-Boot via USB (imx_usb_loader).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Add the base address for the i.MX6UL so that this UART can be used.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
CONFIG_BOARD_EARLY_INIT_F and CONFIG_BOARD_LATE_INIT should not be
placed into mx7_common because not all boards need these options.
Move them to the board file instead.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The description was borrowed from kernel. "tristate" type was changed
to "bool" (I believe we don't support modules for u-boot yet, right?).
CONFIG_USB_GADGET requires CONFIG_USB to be defined too, so add it along
as well.
Definitions were added to defconfig files in a way that
"make savedefconfig" generates exactly the same file as used defconfig.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
[trini: Add zynq_zc702 conversion]
Signed-off-by: Tom Rini <trini@konsulko.com>
VESA 1024x768 results in much more accurate timings.
Based on the patch from Soeren Moch for the tbs2910 board.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Make the watchdog registers 16-bit wide, as they are according to TRM.
Signed-off-by: Leonid Iziumtsev <leonid.iziumtsev@se.atlascopco.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Booting mx6qp sabreauto board and then doing:
=> saveenv
=> reset
, causes a system hang.
This happens because the size of the U-Boot binary is larger than
CONFIG_ENV_OFFSET.
Fix this problem by increasing CONFIG_ENV_OFFSET, so that the U-boot binary
and the environment variables region do not overlap.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Switch the DDR3 calibration from ad-hoc implementation of wait_for_bit()
to generic implementation of wait_for_bit().
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Enable NAND TrimFFS support in M53EVK, since it is convenient when
installing UBI images to NAND.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Configure the PMIC_STBY_REQ pin as open drain 100K according
to the design team's requirement for the PMIC_STBY_REQ pin
for i.MX 6UltraLite TO1.0.
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
To i.MX6UL, default ARM rate and AHB rate is 396M and 198M,
no need to set them.
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Since the MX6UL/SL/SX only has one DDR channel, in CCM_CCDR register
the bit[17] for mmdc_ch0 is reserved and its proper state should be 1.
When clear this bit, the periph_clk_sel cannot be set and that
CDHIPR[periph_clk_sel_busy] handshake never clears.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
The fsl-mc node has been moved under /soc, so update
the path references accordingly. Backwards compatibility
is retained for /fsl-mc.
Delete backwards compatibility for the completely obsolete
/fsl,dprc@0.
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Add command-line specification of xmodem timeout. If the binary
header needs to take a while to do something (e.g. DDR ECC
scrubbing), the xmodem transfer can time out. Add a configurable
xmodem block timeout to allow transfers with slow binary headers
to succeed.
Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Usage text was getting unwieldy and somewhat incorrect. The
usage summary implied that some options were mutually exclusive
(e.g. -q or -s). Clean up the summary to just include the
important ones, and include a generic "[OPTIONS]" instead.
Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
It has been superseded in kwbimage.cfg in favor of an SPL in commit
9e30b31d20 (arm: mvebu: db-88f6820: Add
SPL support with DDR init code). Found via code review.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for Altera StratixV bitstream programming. 2 FPGAs
are connected to the SPI busses. This patch uses board specific write
code to program the bitstream via SPI direct write mode.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Signed-off-by: Stefan Roese <sr@denx.de>
