Commit graph

87074 commits

Author SHA1 Message Date
Michal Simek
04cc6f0a53 arm64: zynqmp: Fix command error values properly
Process errors from command via cmd_process_error() as is done on Versal.
When internal function returns different number then CMD_RET_SUCCESS(0),
CMD_RET_FAILURE(1) or CMD_RET_USAGE(-1) shell react on these errors by
throwing an error like
"exit not allowed from main input shell." that's why use
cmd_process_error() to make sure that error code is all the time correct.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/d511935ba10daf95c70996fae6e6ffc374efffa0.1685618464.git.michal.simek@amd.com
2023-06-12 13:25:02 +02:00
Michal Simek
322c0da86a video: zynqmp: Enable 1024x768 resolution
Add support for 1024x768 60p resolution and set it up this resolution by
default. This resolution is still able to use only one GT line. But for
example 800x600 60p has some issues with settings. That's why extend this
table by tested resolutions.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/957e1e85a05744326ec2606dadc1af6e69976f37.1684312924.git.michal.simek@amd.com
2023-06-12 13:25:02 +02:00
Venkatesh Yadav Abbarapu
dbec4f0b7f xilinx: zynqmp: Enable the vidconsole by default
Add the vidconsole flags for video serial console.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f1b58d1d1052bf2d8cb8b25af44ecbb567ebbd4a.1684312924.git.michal.simek@amd.com
2023-06-12 13:25:01 +02:00
Venkatesh Yadav Abbarapu
a29f44d631 video: zynqmp: Driver for Xilinx ZynqMP DisplayPort Subsystem
The Xilinx ZynqMP SoC has a hardened display pipeline named DisplayPort
Subsystem. It includes a buffer manager, blender, an audio mixer and a
DisplayPort source controller (transmitter). The DisplayPort controller can
source data from memory (non-live input) or the stream (live input). The
DisplayPort controller is responsible for managing the link and physical
layer functionality. The controller packs audio/video data into transfer
units and sends them over the main link. The link rate and lane counts can
be selected based on the application bandwidth requirements. The
DisplayPort pipeline consists of the DisplayPort direct memory access (DMA)
for fetching data from memory. The DisplayPort DMA controller (DPDMA)
supports up to six input channels as non-live input.

This driver supports the DisplayPort Subsystem and implements
1)640x480 resolution
2)RGBA8888 32bpp format
3)DPDMA channel 3 for Graphics
4)Non-live input
5)Fixed 5.4G link rate
6)Tested on ZCU102 board

There will be additional work to configure GT lines based on DT, higher
resolutions, support for more compressed video formats, spliting code to
more files, add support for EDID, audio support, using clock framework for
all clocks and in general code clean up.

Codevelop-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5c1567b63d0280dacc7efba2998857c399c25358.1684312924.git.michal.simek@amd.com
2023-06-12 13:25:01 +02:00
Venkatesh Yadav Abbarapu
c4865e1632 video: move zynqmp files to subdirectory
Place zynqmp files and headers in custom driver subdirectory.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9aae6d217f0673c310818e3de38bb239c79c060c.1684312924.git.michal.simek@amd.com
2023-06-12 13:25:01 +02:00
Michal Simek
f6de01d6af video: bmp: Support rgba8888 pixel format
Adding the support for RGBA8888 format for BMP decoding.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/322910eb24692f6140a001796501270eb1c53d9a.1684312924.git.michal.simek@amd.com
2023-06-12 13:25:01 +02:00
Michal Simek
e9500ba9e0 video: Add support for RGBA8888 format
Add support for RGBA8888 32bpp format where pixels are picked in
32-bit integers, where the colors are stored in memory such that
R is at lowest address, G after that, B after that, and A last.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/aa1de54b7d4ff46df6858f76d52634e0c5c71a4a.1684312924.git.michal.simek@amd.com
2023-06-12 13:25:01 +02:00
Stefan Herbrechtsmeier
497322436d firmware: zynqmp: Store driver data in data section
Store the driver data in the data section to make the data usable before
relocation. Additionally mark the driver data static to restrict the
access.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20230523124215.30915-5-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-06-12 13:25:01 +02:00
Stefan Herbrechtsmeier
ec4739775a firmware: zynqmp: Move permission to change config object message
Move the permission to change a config object message from
zynqmp_pmufw_load_config_object function to zynqmp_pmufw_node function
to simplify the code and check the permission only if required.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20230523124215.30915-4-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-06-12 13:25:01 +02:00
Stefan Herbrechtsmeier
d0f1af3ec0 power: zynqmp: Mask node already configured error
Do not return an error (ENODEV) from the request function if the node is
already configured.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20230523124215.30915-3-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-06-12 13:25:01 +02:00
Stefan Herbrechtsmeier
bc75a3465f firmware: zynqmp: Remove redundant child device bind
Remove the redundant child device bind from the driver bind function and
rely on the post_bind of the class which calls the same function.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20230523124215.30915-2-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-06-12 13:25:01 +02:00
Stefan Herbrechtsmeier
ee3c02af77 firmware: zynqmp: Remove extraordinary return value
Return a common -EACCES error value instead of a positive private error
value XST_PM_NO_ACCESS (2002) in zynqmp_pmufw_load_config_object
function if the config object is not loadable to simplify the error
checking.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20230523124215.30915-1-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-06-12 13:25:01 +02:00
Michal Simek
999ac2c37a arm64: zynqmp: Check 0 node ID
ID is decimal not hexadecimal that's why passing hex number all the time
end's up as 0 that's why check it. Node ID 0 is not valid anyway.
Also properly say it in help.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/68c5cd5eade216f3c5aa6eb703ee9f69f14acad1.1685615549.git.michal.simek@amd.com
2023-06-12 13:25:01 +02:00
Marek Vasut
24d32e05ce tools: relocate-rela: Fix typo
Position is written with one s, fix typo.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://lore.kernel.org/r/20230530225319.949968-1-marek.vasut+renesas@mailbox.org
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-06-12 13:24:31 +02:00
Michal Simek
1be82afa80 global: Use proper project name U-Boot
Use proper project name in comments, Kconfig, readmes.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Qu Wenruo <wqu@suse.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/0dbdf0432405c1c38ffca55703b6737a48219e79.1684307818.git.michal.simek@amd.com
2023-06-12 13:24:31 +02:00
Algapally Santosh Sagar
6fe46936a3 board: xilinx: Add missing prototypes
Add missing prototypes to fix the below sparse warnings
1. warning: no previous prototype for 'soc_name_decode'
[-Wmissing-prototypes]
2. warning: no previous prototype for 'soc_detection'
[-Wmissing-prototypes]
3. warning: no previous prototype for 'board_name_decode'
[-Wmissing-prototypes]
4. warning: no previous prototype for 'board_detection'
[-Wmissing-prototypes]

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230523055626.14742-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-06-12 13:24:31 +02:00
Algapally Santosh Sagar
2bfe253d31 xilinx: versal-net: Add new versalnet loadpdi command
Versal NET loadpdi command is used for loading secure & non-secure
pdi images.

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f43709af894b669833770acb39ff5856fecf6d66.1684761656.git.michal.simek@amd.com
2023-06-12 13:24:31 +02:00
Michal Simek
ed99a77b2a mmc: zynq: Sync with upstream DT binding
Versal NET is not in production yet that's why no need to keep backward
compatible with previously used compatible string.

Link: https://lore.kernel.org/r/20230403102551.3763054-2-sai.krishna.potthuri@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/0d355f4fbaf6a3521d41ee43f17dde2515ff7ab7.1684311766.git.michal.simek@amd.com
2023-06-12 13:24:31 +02:00
Michal Simek
3e95bf9b76 arm64: versal-net: Add support for SPP production version
Production version restarting platform version field from 0 that's why add
new calculation to be able to use different DT for these platforms.
Requested DT names for production silicons for IPP/SPP and EMU platform are
versal-net-ipp-rev2.0.dts and versal-net-emu-rev2.0.dts.
If platform version increase numbers revision can be even higher.
As of today platform version is 2 that's why expected is rev2.2.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/691e166b3cf2643d7edf482bda5500163eecb35a.1684311689.git.michal.simek@amd.com
2023-06-12 13:24:31 +02:00
Ashok Reddy Soma
f5aa35c932 cmd: sf/nand: Print and return failure when 0 length is passed
For sf commands, when '0' length is passed for erase, update, write or
read, there might be undesired results. Ideally '0' length means nothing to
do.

So print 'ERROR: Invalid size 0' and return cmd failure when length '0' is
passed to sf commands. Same thing applies for nand commands also.

Example:

ZynqMP> sf erase 0 0
ERROR: Invalid size 0
ZynqMP> sf write 10000 0 0
ERROR: Invalid size 0
ZynqMP> sf read 10000 0 0
ERROR: Invalid size 0
ZynqMP> sf update 1000 10000 0
ERROR: Invalid size 0
ZynqMP>

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230516115236.22458-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-06-12 13:24:31 +02:00
Algapally Santosh Sagar
b4501aa028 mach-zynqmp: handoff: Add missing header
Add missing prototype to fix the sparse warning.
warning: no previous prototype for 'bl2_plat_get_bl31_params'
[-Wmissing-prototypes]

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230519113816.22083-3-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-06-12 13:24:31 +02:00
Algapally Santosh Sagar
71c5fdc2a3 clk: zynqmp: Add fallthrough statement in the switch case
Add fallthrough statement in switch case to fix the sparse warning.
In function 'zynqmp_clk_get_rate': warning: this statement may
fall through [-Wimplicit-fallthrough=]

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230519113816.22083-2-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-06-12 13:24:31 +02:00
Ashok Reddy Soma
ded539ff66 arm64: versal-net: Detect and display bootmode
Read boodmode register using versal_net_get_bootmode() in board_late_init
and prepare corresponding distro boot command sequence based on it.

versal_net_get_bootmode() will be changed to use smc calls later, but
for now directly reads the register.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230516144753.30869-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-06-12 13:24:31 +02:00
Tom Rini
c13a1c22a2 Merge branch 'master_reserved' of https://source.denx.de/u-boot/custodians/u-boot-sh 2023-06-11 16:23:32 -04:00
Tom Rini
5b589e1396 Merge branch 'next_net/phy_connect_dev' of https://source.denx.de/u-boot/custodians/u-boot-sh into next 2023-06-10 14:08:00 -04:00
Tom Rini
cc5a940923 Merge branch 'next_mtd/rpc-spi' of https://source.denx.de/u-boot/custodians/u-boot-sh into next 2023-06-10 14:07:49 -04:00
Detlev Casanova
fd3e2b4de3 renesas: rcar: Apply ATF overlay for reserved-memory
The function fdtdec_board_setup() is called early and adds the overlay
from ATF to the u-boot device tree. That is necessary so that u-boot
doesn't use reserved memory.

Linux also needs to know about that reserved memory so the overlay from
ATF needs to be aplied on the linux device tree as well.

This commit makes sure that the ATF overlay is applied to both device trees.

Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Adam Ford <aford173@gmail.com>
2023-06-10 17:06:38 +02:00
Marek Vasut
32d2461e04 ARM: renesas: Enable DM_ETH_PHY and SMSC PHY driver
The board comes with SMSC LAN8710A PHY, enable matching driver.
Enable DM_ETH_PHY in the process to start using DM drivers more.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
---
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Michal Simek <michal.simek@amd.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:06 +02:00
Geert Uytterhoeven
c1466c55de ARM: dts: renesas: Add compatible properties to LAN8710A Ethernet PHYs
Add compatible values to Ethernet PHY subnodes representing SMSC
LAN8710A PHYs on RZ/A1 and R-Mobile A1 boards.  This allows software to
identify the PHY model at any time, regardless of the state of the PHY
reset line.

Ported from Linux kernel commit 1c65ef1c71e473c00f2a7a1b9c140f0b4862f282 .

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/247dc2074dae149af07b6d014985ad30eb362eda.1631174218.git.geert+renesas@glider.be
---
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Michal Simek <michal.simek@amd.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:06 +02:00
Valentine Barshak
41a0cfd0c5 net: sh_eth: Fix RX error handling
In case RX error occurs, and the RD_RFE bit is set, the descriptor
is never returned back to the queue. Make sh_eth_recv_start return
zero length in this case so that the descriptor can be released
and pushed back to the list. Also return the more appropriate
-EAGAIN instead of -EINVAL if the descriptor is not ready yet.

Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Valentine Barshak
d49ba9c8d7 net: sh_eth: Workaround cache issues
U-Boot writes to RX packets when constructing replies.
This can cause stale cached data to be written to RX
buffer while we're receiving a packet. This causes RX
packet corruption because we invalidate the cache right
before processing the packet. Invalidate packet buffer
cache when preparing RX descriptor as well. This seems
to fix RX packet drops with high RX traffic.

While at it flush the descriptors right before enabling
RX/TX in sh_eth_tx_desc_init/sh_eth_rx_desc_init callbacks
when they are ready instead of flushing after allocation.

Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
92c312c734 net: sh_eth: Drop reset GPIO handling in favor of common code
The common code is now capable of handling reset GPIO associated
with PHY. Drop the local ad-hoc code in favor of common code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
5c80edb264 net: ravb: Drop reset GPIO handling in favor of common code
The common code is now capable of handling reset GPIO associated
with PHY. Drop the local ad-hoc code in favor of common code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
3015ae5feb net: phy: Handle reset-delay-us/reset-post-delay-us properties
These two properties are used by various DTs in place of
current reset-assert-us/reset-deassert-us , handle both .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
68a4d15061 net: phy: Bind ETH_PHY uclass driver to each new PHY
In case a new PHY is created and DM_ETH_PHY is enabled, bind a
generic PHY driver from ETH_PHY uclass to the PHY to have a
matching DM representation of that PHY.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
495fc04b6d net: phy: Unpublish phy_connect_dev()
The phy_connect_dev() is legacy API, now that there are no users,
make it internal to phy.c and unpublish it from headers.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
83434e249f net: sunxi_emac: Switch to new U-Boot PHY API
Use new U-Boot phy_connect() API which also supports fixed PHYs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
b9b04f8c5f net: sh_eth: Switch to new U-Boot PHY API
Use new U-Boot phy_connect() API which also supports fixed PHYs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
8f5abff522 net: pch_gbe: Switch to new U-Boot PHY API
Use new U-Boot phy_connect() API which also supports fixed PHYs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
8869a8883b net: ethoc: Switch to new U-Boot PHY API
Use new U-Boot phy_connect() API which also supports fixed PHYs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
7ff881a69f net: ave: Switch to new U-Boot PHY API
Use new U-Boot phy_connect() API which also supports fixed PHYs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
fd5910288f net: altera_tsa: Switch to new U-Boot PHY API
Use new U-Boot phy_connect() API which also supports fixed PHYs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
06173ef643 net: eth-phy: staticize eth_phy_reset()
The eth_phy_reset() is not used outside of this file, staticize it.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:04 +02:00
Cong Dang
2e6a1f9fde mtd: spi: renesas: Add 4 bytes address mode support
This patch adds 4-byte address mode support. Because traditional access
based on FIFO/shift register, it's complex to specify information like
opcode, address length, dummy bytes etc to flash. Replace the traditional
access by spi-mem layer which is essential to make 4-byte address mode
support possible.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-06-10 11:50:45 +02:00
Hai Pham
8e8cb7e1a8 mtd: spi: renesas: Add R-Car Gen4 support
Support RPC SPI on R-Car Gen4 R8A779F0 S4 and R8A779G0 V4H SoCs.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Squash S4 and V4H patches, fix brackets around STRTIM2]
2023-06-10 11:50:45 +02:00
Hai Pham
89208dba38 mtd: spi: renesas: Enable SPI_FLASH_SFDP_SUPPORT
Enable support for parsing and auto discovery of parameters for
SPI NOR flashes using Serial Flash Discoverable Parameters (SFDP)
tables as per JESD216 standard.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Make SFDP the default unconditionally
2023-06-10 11:50:45 +02:00
Hai Pham
49096f9924 mtd: spi: renesas: Extract strobe delay setting code into separate function
Move strobe delay setting code into extra function and reflect the latest
setting in datasheet (R-Car Gen3 v2.20, R-Car V3U v0.50).
i.e. STRTIM[2:0] should be set to 110 (RCar M3-W) or 111 (Other products)

This is also a preparation for new R-Car Gen4 SoC which has 4-bits STRTIM

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Fix for RZ/A1
2023-06-10 11:50:45 +02:00
Tom Rini
5f41ef792c Merge branch '2023-06-09-fwu-updates' into next
Two sets of FWU updates from Jassi Brar.  First:
The patchset reduces ~400 lines of code, while keeping the functionality same and making
meta-data operations much faster (by using cached structures).

Issue:
meta-data copies (primary and secondary) are being handled by the
backend/storage layer instead of the common core in fwu.c (as also noted by
Ilias)  that is, gpt_blk.c manages meta-data and similarly raw_mtd.c will have
to do the same when it arrives. The code could by make smaller, cleaner and
optimised.

Basic idea:
Introduce  .read_mdata() and .write_mdata() in fwu_mdata_ops  that simply
read/write meta-data copy. The core code takes care of integrity and redundancy
of the meta-data, as a result we can get rid of every other callback
.get_mdata() .update_mdata() .get_mdata_part_num()  .read_mdata_partition()
.write_mdata_partition() and the corresponding wrapper functions thereby making
the code 100s of LOC smaller.

Get rid of fwu_check_mdata_validity() and fwu_mdata_check() which expected
underlying layer to manage and verify mdata copies.
Implement  fwu_get_verified_mdata(struct fwu_mdata *mdata) public function that
reads, verifies and, if needed, fixes the meta-data copies.

Verified copy of meta-data is now cached as 'g_mdata' in fwu.c, which avoids
multiple low-level expensive read and parse calls.
gpt meta-data partition numbers are now cached in gpt_blk.c, so that we don't
have to do expensive part_get_info() and uid ops.

And second:
Introduce support for mtd backed storage for FWU feature and enable it on
Synquacer platform based DeveloperBox.
2023-06-09 20:35:02 -04:00
Jassi Brar
a7e45415b2 fwu: provide default fwu_plat_get_bootidx
Just like fwu_plat_get_update_index, provide a default/weak
implementation of fwu_plat_get_bootidx. So that most platforms
wouldn't have to re-implement the likely case.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-06-09 13:52:40 -04:00
Jassi Brar
6b403ca4dc fwu: DeveloperBox: add support for FWU
Add code to support FWU_MULTI_BANK_UPDATE.
The platform does not have gpt-partition storage for
Banks and MetaData, rather it used SPI-NOR backed
mtd regions for the purpose.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-06-09 13:52:40 -04:00