Commit graph

46062 commits

Author SHA1 Message Date
Patrice Chotard
40d1a31e63 usb: dwc3: Add dwc3 glue driver support for STi
This patch adds the ST glue logic to manage the DWC3 HC
on STiH407 SoC family. It configures the internal glue
logic and syscfg registers.

Part of this code been extracted from kernel.org driver
(drivers/usb/dwc3/dwc3-st.c)

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-22 07:39:59 -04:00
Patrice Chotard
8b35f4346f STiH410-B2260: enable USB, fastboot, reset, PHY related flags
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-22 07:39:58 -04:00
Patrice Chotard
e9d1257203 STiH410-B2260: enable USB Host Networking
Enable USB Host Networking support by enabling Ethernet/USB
adaptors support and by enabling some BOOTP flags

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-22 07:39:58 -04:00
Patrice Chotard
b7ca56dcda usb: phy: Add STi USB2 PHY
This is the generic phy driver for the picoPHY ports
used by USB2/1.1 controllers. It is found on STiH407 SoC
family from STMicroelectronics.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-22 07:39:57 -04:00
Patrice Chotard
dca3166f55 mmc: sti_sdhci: Use reset framework
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-22 07:39:57 -04:00
Patrice Chotard
9ea2fc88dd ARM: dts: stih410-family: Add missing reset_names for mmc1 node
reset-names property is needed to use the reset
API for STi sdhci driver.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-22 07:39:57 -04:00
Patrice Chotard
819c626bb0 mmc: sti_sdhci: Rework sti_mmc_core_config()
Use struct udevice* as input parameter. Previous
parameters are retrieved through plat and priv data.

This to prepare to use the reset framework.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-22 07:39:56 -04:00
Tuomas Tynkkynen
44913a185f pci: Remove unnecessary 'default n' from Kconfig
'default n' is the default anyway so it doesn't need to be specified
explicitly, and the rest of the file doesn't specify it either anywhere.
Drop it.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-09-22 07:39:56 -04:00
Tuomas Tynkkynen
93b1431f1a pci: layerscape: Remove unused field 'hose' from struct ls_pcie
This field is no longer used since the DM conversion. Drop it.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-09-22 07:39:55 -04:00
Tuomas Tynkkynen
be0105bc1e pci: tegra: Remove unused field 'hose' from struct tegra_pcie
This field is no longer used since the DM conversion. Drop it.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-09-22 07:39:55 -04:00
Tuomas Tynkkynen
bee278de81 pci: xilinx: Remove unused field 'hose' from struct xilinx_pcie
This field has never been used as the driver has been DM-based since the
beginning. Drop it.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-09-22 07:39:55 -04:00
Tuomas Tynkkynen
adfc3e4804 pci: xilinx: Fix doc comments on config space accessors
These take the 'struct udevice *' as an argument, not the
'struct xilinx_pcie *` which is a local variable. Fix the comments to
match the code.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-09-22 07:39:54 -04:00
Tom Rini
2460098cff fs/fat: Reduce stack usage
We have limited stack in SPL builds.  Drop itrblock and move to
malloc/free of itr to move this off of the stack.  As part of this fix a
double-free issue in fat_size().

Signed-off-by: Tom Rini <trini@konsulko.com>
---
Rework to use malloc/free as moving this to a global overflows some SH
targets.
2017-09-22 07:37:43 -04:00
Tom Rini
2dc5b553b9 Merge branch 'next' of git://git.denx.de/u-boot-video 2017-09-21 07:51:20 -04:00
rick
7155cd2e6e nds32: spi: Support spi dm driver.
Support spi driver and can detect MX25U1635E flash on AE3XX board.

Verification:

sf probe 0:0 50000000 0
spi_flash_std_probe(sf_Probr.c)
	spi_flash_probe_slave(sf_Probr.c)
	SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB
	NDS32 # sf test 0x100000 0x1000
	SPI flash test:
	0 erase: 34 ticks, 117 KiB/s 0.936 Mbps
	1 check: 15 ticks, 266 KiB/s 2.128 Mbps
	2 write: 21 ticks, 190 KiB/s 1.520 Mbps
	3 read: 11 ticks, 363 KiB/s 2.904 Mbps
	Test passed
	0 erase: 34 ticks, 117 KiB/s 0.936 Mbps
	1 check: 15 ticks, 266 KiB/s 2.128 Mbps
	2 write: 21 ticks, 190 KiB/s 1.520 Mbps
	3 read: 11 ticks, 363 KiB/s 2.904 Mbps

Signed-off-by: rick <rick@andestech.com>
2017-09-21 10:30:22 +08:00
rick
7b1a50b7b6 nds32: board: Support SPI driver.
Add spi dts node and enable spi dm flash config.

Signed-off-by: rick <rick@andestech.com>
2017-09-21 10:30:22 +08:00
rick
6d3cb0fdcd nds32: mtd: add spi flash id MX25U16335E.
To support MACRONIX MX25U1635E 16M-BIT flash.

Signed-off-by: rick <rick@andestech.com>
2017-09-21 10:30:22 +08:00
rick
1341494c7d nds32: ftmac100: Fix write mac addr fail problem.
After soft reset complete, write mac address immediately will fail.
Add delay to work around this problem.

Signed-off-by: rick <rick@andestech.com>
2017-09-21 10:30:22 +08:00
rick
e336b73d8a nds32: ftmac100 support cache enable.
Enable cache and ftmac100 performance can be improved.

Signed-off-by: rick <rick@andestech.com>
2017-09-21 10:30:22 +08:00
rick
ce4e2370f7 nds32: ftmac100: support cache enable.
Add cache inval and flush when rx and tx.

Signed-off-by: rick <rick@andestech.com>
2017-09-21 10:30:22 +08:00
rick
19fc21fb4a nds32: bootm: Fix warning of struct tag_serialnr declared
move #include <asm/setup.h> from bootm.c to bootm.h

Signed-off-by: rick <rick@andestech.com>
2017-09-21 10:30:22 +08:00
rick
d573b36402 nds32: board: Fix andestech adp-ae3xx.c make fail problem.
Add #include <asm/mach-types.h> to fix it.

Signed-off-by: rick <rick@andestech.com>
2017-09-21 10:30:21 +08:00
Tom Rini
e884656c2c Merge git://www.denx.de/git/u-boot-imx 2017-09-20 12:32:34 -04:00
Fabio Estevam
031426a7af mx6sabresd: Add Serial Download Protocol support
Add Serial Download Protocol support (SDP), which allows loading
SPL and u-boot.img via imx_usb_loader tool as explained in
doc/README.sdp.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-09-20 15:34:59 +02:00
Fabio Estevam
511db3bf5a toradex: imx6: Move g_dnl_bind_fixup() into common SPL code
Instead of having every board file to add its own g_dnl_bind_fixup()
implementation, move it to the common imx6 SPL code.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Łukasz Majewski <lukma@denx.de>
2017-09-20 15:34:59 +02:00
Ian Ray
be2808c3b0 board: ge: bx50v3: set eth0 MAC address
Define i2c mux configuration.  Add new vpd_reader which is used to read
vital product data.  Read VPD from EEPROM and set eth0 MAC address.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Jose Alarcon <jose.alarcon@ge.com>
2017-09-20 15:34:59 +02:00
Dennis Gilmore
b1e8512e9d detect and setup solidrun hummingboard2
The hummingboard2 is slightly different to the cubox i and to the
hummingboard. The GPIO pin info to probe came from solidruns
for of u-boot on github.
https://github.com/SolidRun/u-boot-imx6/blob/imx6/board/solidrun/mx6_cubox-i/mx6_cubox-i.c#L569-L589
I have tested on a hummingboard-edge witha  imx6 solo and 512mb of
ram.

Signed-off-by: Dennis Gilmore <dgilmore@redhat.com>
2017-09-20 15:34:59 +02:00
Tom Rini
975f97b431 Merge git://git.denx.de/u-boot-rockchip 2017-09-18 15:44:57 -04:00
Klaus Goger
60d7c50945 rockchip: puma_rk3399: increase serialno_str size
Increase serialno_str to 17 bytes so it can hold the 16 bytes long serial
nummer and the terminating null byte added by snprintf.

Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2017-09-18 20:40:38 +02:00
Kever Yang
6e5bd8d6f3 rockchip: ram: rk3399: update reg map for of-platdata
After Simon's patch, the dtoc can work with 64bit address,
so we need to fix reg number for it.
Depend on Simon's patch set:
https://patchwork.ozlabs.org/cover/807266/

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18 20:40:38 +02:00
Kever Yang
5184daddaa rockchip: sdhci: update reg map for of-platdata
After Simon's patch, the dtoc can work with 64bit address,
so we need to fix reg number for it.
Depend on Simon's patch set:
https://patchwork.ozlabs.org/cover/807266/

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18 20:40:38 +02:00
Philipp Tomsich
75ff057851 rockchip: dts: rk3368: reduce the number of nodes seen in TPL
The RK3368 TPL stage always returns to the BootROM, so it has no need
for the eMMC, SD and SPI nodes.  This marks those nodes (that should
be included in SPL, but not TPL) as 'u-boot,dm-spl'.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-18 20:40:38 +02:00
Philipp Tomsich
1d70f0ac88 rockchip: rk3368: adjust DMC driver for 32/64bit-aware OF_PLATDATA
With the new 32/64bit-aware dtoc, the type of reg is fdt64_t and the
OF_PLATDATA structure layout changes.  This adjusts the DMC driver for
the RK3368 to track these changes.

For the time being (i.e. until regmap_init_mem_platdata works for the
64bit case), we won't use regmap_init_mem_platdata here and simply
access of_plat.reg[] directly.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-18 20:40:38 +02:00
Philipp Tomsich
8158a848fa rockchip: timer: update for 32/64bit-aware OF_PLATDATA
With dtoc emitting fdt64_t for addresses (and region sizes), the array
indices for accessing the reg[] array needs to be adjusted.  This
adjusts the Rockchip DM timer driver to correctly handle OF_PLATDATA
given this new structure layout.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-18 20:40:37 +02:00
Philipp Tomsich
7b87e3bfaf rockchip: defconfig: puma-rk3399: enable OF_LIVE (live tree)
With the critical drivers ready for switching to a live tree, we can
now enable it in the defconfig for the RK3399-Q7.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-18 20:40:37 +02:00
Philipp Tomsich
f6230a0057 rockchip: efuse: change to use dev_read_addr_ptr
With the dev_read_addr_ptr function available, we can change the
efuse driver to use it (and eliminate the explicit type-cast).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-18 20:40:37 +02:00
Philipp Tomsich
75c7859803 rockchip: clk: rk3399: Convert to livetree
Update the clock driver for the RK3399  to support a live device tree.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-18 20:40:37 +02:00
Philipp Tomsich
46c89c8efa rockchip: dts: rk3399-puma: replace 'rockchip, vbus-gpio' with fixed regulator
On the RK3399-Q7, we need to turn on the on-module USB hub before using the
USB host interfaces (only the OTG interface is directly connected to the edge
connector).  This drops the deprecated 'rockchip,vbus-gpio' property and uses
a fixed regulator to turn on the USB hub.

References: 26a8b80 "usb: host: xhci-rockchip: use fixed regulator to control vbus"
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-18 20:40:37 +02:00
Philipp Tomsich
2f01a2b214 rockchip: clk: rk3399: add clk_enable function and support USB HOST0/1
The generic ehci-driver (ehci-generic.c) will try to enable the clocks
listed in the DTSI. If this fails (e.g. due to clk_enable not being
implemented in a driver and -ENOSYS being returned by the clk-uclass),
the driver will bail our and print an error message.

This implements a minimal clk_enable for the RK3399 and supports the
clocks mandatory for the EHCI controllers; as these are enabled by
default we simply return success.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-18 20:40:37 +02:00
Andy Yan
8ac884974a rockchip: rk3368: add the missing target and pinctrl config for sheep board
Add the missing target and pinctrl config for rk3368 sheep board

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18 20:40:36 +02:00
Andy Yan
ffaefb885e rockchip: rk3368: add ENV_MEM_LAYOUT to extra env settings
Add the ENV_MEM_LAYOUT_SETTINGS to CONFIG_EXTRA_ENV_SETTINGS

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18 20:40:36 +02:00
Jagan Teki
d55af074e5 rk3288: Add Vyasa initial board support
This patch adds support for Vyasa RK3288 initial board
from Amarula Solutions.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18 20:40:36 +02:00
Philipp Tomsich
ba1657338b rockchip: rk3399: spl: remove hard-coded addresses for GRF and SGRF
On the RK3399, we will have either OF_PLATDATA or full OF_CONTROL
enabled: this allows the use of syscon to retrieve the addresses of
GRF and SGRF (except for the early debug UART setup, which runs so
early that the device-model is not initialised).

This removes the hard-coded addresses and goes through syscon to
retrieve the base-addresses of GRF and SGRF. After that, we use
the structure definitions to locate the respective registers.

In addition to this, the inclusion of header files is also cleaned up:
- all headers are included at the beginning (there was a spurious
  inclusion of the grf header from within a function)
- all #include statements for unused headers are removed
- the remaining #include statements are sorted (while keeping common.h
  included in front)

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-18 20:40:36 +02:00
Philipp Tomsich
c254b29fef rockchip: lion-rk3368: defconfig: resync w/ OF_LIVE and BOOTSTAGE enabled
This adds OF_LIVE and BOOTSTAGE support for the RK3368-uQ7 and
regenerates the defconfig (picking up a few changes/reorderings) from
upstream Kconfig changes.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18 20:40:36 +02:00
Philipp Tomsich
f041176c46 rockchip: dts: rk3368-lion: add /chosen/tick-timer
To support bootstage recording, we want to mark our DM timer as the
tick-timer; this triggers the support for 'trying harder' to read the
timer in the Rockchip DM timer driver, even if the device model isn't
ready yet.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18 20:40:36 +02:00
Philipp Tomsich
c23ce9ab85 rockchip: gpio: remove outdated/misleading comment
Remove a comment claiming that this driver only supports the RK3288,
as we also use it on the RK3368, RK3399 and (most likely) on other
variants.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

Version-changes: 2
- use the dev_read_addr_ptr function in rk_gpio.c
2017-09-18 20:40:35 +02:00
Philipp Tomsich
a1d3480bc6 rockchip: gpio: convert to livetree
Update the Rockchip GPIO-bank driver to support a live tree.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

Version-changes: 2
- use the dev_read_addr_ptr function in rk_gpio.c
2017-09-18 20:40:35 +02:00
Philipp Tomsich
cc91bdf8d4 rockchip: i2c: Convert to livetree
Update the Rockchip I2C driver to support livetree.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Heiko Schocher <hs@denx.de>
2017-09-18 20:40:35 +02:00
Philipp Tomsich
a904a16bc1 rockchip: rk8xx: remove unused header includes
Remove header file includes that have been left over after the
conversion to livetree-support.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18 20:40:35 +02:00
Philipp Tomsich
327b2b35c5 rockchip: sdhci: Convert to livetree
Update the Rockchip SDHCI wrapper to support a live device tree.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

Version-changes: 2
- use the dev_read_addr_ptr function in	rockchip_sdhci.c
2017-09-18 20:40:35 +02:00