Commit graph

15789 commits

Author SHA1 Message Date
Weijie Gao
77ebea23c3 mmc: mtk-sd: add a dts property cd-active-high for builtin-cd mode
This patch adds a dts property cd-active-high for builtin-cd mode to make
it configurable instead of using hardcoded active-low.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
3c92a957ee mmc: mtk-sd: add support for MediaTek MT7620/MT7628 SoCs
This patch adds mmc support for MediaTek MT7620/MT7628 SoCs.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
877d03903c net: mt7628-eth: add support to isolate LAN/WAN ports
This patch add support for mt7628-eth to isolate LAN/WAN ports mainly to
prevent LAN devices from getting IP address from WAN.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
c88ee3ea0a net: mt7628-eth: free rx descriptor on receiving failure
When received a packet with an invalid length recorded in rx descriptor,
we should free this rx descriptor to allow us to continue to receive
following packets.
Without doing so, u-boot will stuck in a dead loop trying to process this
invalid rx descriptor.

This patch adds a call to mt7628_eth_free_pkt() after received an invalid
packet length.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
f079321009 net: mt7628-eth: make phy link up detection optional via DT
The mt7628 has an embedded ethernet switch (5 phy ports + 1 cpu port).
Although in IOT mode only port0 is usable, the phy0 is still connected
to the switch, not the ethernet gmac directly.

This patch rewrites it and makes it optional. It can be turned on by adding
mediatek,poll-link-phy = <?> explicitly into the eth node. By default the
driver is switch mode with all 5 phy ports working without link detection.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
2734fdef5c net: mt7628-eth: remove hardcoded gpio settings and regmap-based phy reset
This patch removes hardcoded gpio settings as they have been replaced by
pinctrl in dts, and also replaces regmap-based phy reset with a more
generic reset controller.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
4cce51141f phy: mt76x8-usb-phy: add slew rate calibration and remove non-mt7628 part
This patch adds slew rate calibration for mt76x8-usb-phy, removes code
which belongs to mt7620, and gets rid of using syscon and regmap by using
clock driver and reset controller.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
f7ae6b682c reset: add reset controller driver for MediaTek MIPS platform
This patch adds reset controller driver for MediaTek MIPS platform and
header file for mt7628.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
3fad441c54 pinctrl: add support for MediaTek MT7628
This patch adds pinctrl support for mt7628, with a file for common pinmux
functions and a file for mt7628 which has additional support for pinconf.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
43405e009b spi: mt7621-spi: restore default register value after each xfer
Currently this driver uses a different way to implement the spi xfer,
by modifying some fields of two registers, which is incompatible with the
MTK's original SDK linux driver. This will cause the flash data being
damaged by the SDK driver.

This patch lets the mt7621_spi_set_cs() restore the original register
fields after cs deactivated.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
54a6b8e793 spi: mt7621-spi: remove data cache and rewrite its xfer function
The mt7621 spi controller supports continuous generic half-duplex spi
transaction. There is no need to cache xfer data at all.

To achieve this goal, the OPADDR register must be used as the first data
to be sent. And follows the eight generic DIDO registers. But one thing
different between OPADDR and DIDO registers is OPADDR has a reversed byte
order.

With this patch, any amount of data can be read/written in a single xfer
function call.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
f09978566b spi: mt7621-spi: use clock frequency from clk driver
This patch lets the spi driver to use clock provided by the clk driver
since the new clk-mt7628 driver provides accurate sys clock frequency.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
77ed3c42fe clk: add clock driver for MediaTek MT76x8 platform
This patch adds a clock driver for MediaTek MT7628/7688 SoC.
It provides clock gate control as well as getting clock frequency for
CPU/SYS/XTAL and some peripherals.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
44fa676e58 serial: serial_mtk: add non-DM version for SPL
This patch adds non-DM version for mtk hsuart driver and makes it
compatible with ns16550a driver in configuration.
This is needed in SPL with CONFIG_SPL_DM disabled for reducing size.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:43 +02:00
Weijie Gao
99ced5331b serial: serial_mtk: enable FIFO and disable flow control
This patch adds codes to enable FIFO and disable flow control taken from
ns16550 driver.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:43 +02:00
William Zhang
e365de9051 drivers: nand: brcmnand: fix nand_chip ecc layout structure
The current brcmnand driver is based on 4.18 linux kernel which uses
mtd_set_ooblayout to set ecc layout. But nand base code in u-boot is from
old kernel which does not use this new API and expect nand_chip.ecc.layout
structure to be set. This cause nand_scan_tail function running into a bug
check if the device has a different oob size than the default ones.

This patch ports the brcmstb_choose_ecc_layout function from kernel 4.6.7
that supports the ecc layout struture and replaces the mtd_set_ooblayout
method

Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-10-25 17:20:43 +02:00
Álvaro Fernández Rojas
a9f80cf9ad nand: brcm: add BCM6368 support
This adds support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-10-25 17:20:43 +02:00
Tom Rini
17fd9915a4 Merge branch '2019-10-24-UFS-support'
- Add Universal Flash Storage (UFS) support
2019-10-24 09:51:48 -04:00
Vignesh Raghavendra
c2dfd0a4d8 mtd: Add TI HyperBus Memory Controller driver
AM654/J721e has HyperBus Memory Controller that supports HyperFlash and
HyperRAM devices. It provides a memory mapped interface to interact with
these devices. Add a driver to support the same.
Driver calibrates the controller, setups up for MMIO access and probes
HyperFlash child node.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-10-24 09:49:10 +02:00
Vignesh Raghavendra
d75eacf9b8 mtd: cfi_flash: Use CONFIG_SYS_MONITOR_BASE only when defined
Make use of CONFIG_SYS_MONITOR_BASE only when available to avoid build
error when CONFIG_SYS_MONITOR_BASE is not defined.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-10-24 09:48:53 +02:00
Faiz Abbas
4390eaf676 ufs: Add glue layer driver for TI J721E devices
Add glue layer driver for the controller present on TI's J721E devices.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-10-23 20:47:12 -04:00
Faiz Abbas
ef5fb5a84c ufs: Add Support for Cadence platform UFS driver
Add Support for the platform driver for the Cadence device present on
TI's J721e device.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-10-23 20:47:12 -04:00
Faiz Abbas
7feafb0ae4 ufs: Add Initial Support for UFS subsystem
Add Support for UFS Host Controller Interface (UFSHCI) for communicating
with Universal Flash Storage (UFS) devices. The steps to initialize the
host controller interface are the following:

- Initiate the Host Controller Initialization process by writing to the
Host controller enable register.
- Configure the Host Controller base address registers by allocating a
host memory space and related data structures.
- Unipro link startup procedure
- Check for connected device
- Configure UFS host controller to process requests

Also register this host controller as a SCSI host controller.

Taken from Linux Kernel v5.2 (drivers/scsi/ufs/ufshcd.c) and ported to
U-boot.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-10-23 20:47:12 -04:00
Faiz Abbas
8fbac8e23e scsi: Add dma direction member to command structure
Some SCSI devices like UFS use DMA for executing scsi commands and hence
need to know the direction of transfer of the dma. Add a dma_dir element
to the command structure to facilitate this.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-10-23 20:47:12 -04:00
Faiz Abbas
d48f00ed11 scsi: Retry inquiry 3 times to overcome Unit Attention condition
The UFS SCSI device LUNs are observed to return failure the first time a
unit ready inquiry is sent and pass on the second try. Send this
inquiry 3 times to make sure device is ready.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-10-23 20:47:12 -04:00
Faiz Abbas
4ff572830e scsi: Add max_bytes_per_req to scsi_platdata
Add max_bytes_per_req to scsi_platdata to enable the host driver to limit
the number of bytes that can be read/written per request.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-10-23 20:47:12 -04:00
Faiz Abbas
66c54f1a3e scsi: Simplify scsi_read()/_write()
With no non-DM driver using scsi_read()/_write() APIs, remove
the legacy implementations.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
[trini: Reorder slightly and mark scsi_read/write behind BLK test to
avoid warnings]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-10-23 20:47:12 -04:00
Patrick Delaunay
44510daea4 dm: pinctrl: fix for introduce PINCONF_RECURSIVE option
Correct the name of the define used CONFIG_IS_ENABLED which is
not aligned with Kconfig name: CONFIG_$(SPL_)PINCONF_RECURSIVE.

The recursive calls is conditional only for UCLASS_PINCONFIG
"pinconfig" driver.
It is always needed to call pinctrl_post_bind for UCLASS_PINCTRL
"pinctrl", the test CONFIG_IS_ENABLED(PINCONF_RECURSIVE) need to
be removed for this driver.

This correct a regression introduced because the same patch is
applied twice times in u-boot-dm branch:
- commit e878b53a79 ("dm: pinctrl: introduce PINCONF_RECURSIVE
  option")
- commit c20851b3d8 ("dm: pinctrl: introduce PINCONF_RECURSIVE
  option")

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-10-21 09:40:54 -04:00
Patrick Delaunay
ae799ffcae pinctrl: Kconfig: remove duplicated nodes
Remove the duplicated configs introduced when the same patch is
applied twice times:
- commit e878b53a79 ("dm: pinctrl: introduce PINCONF_RECURSIVE
  option")
- commit c20851b3d8 ("dm: pinctrl: introduce PINCONF_RECURSIVE
  option")

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-10-21 09:40:50 -04:00
Tom Rini
3b985bdeab - document alternative libretech-cc installation methods, including upstream TF-A and opensource tools
- add HDMI/CVBS display support for Amlogic G12A SoCs and SEI510 board
 - add support for Amlogic A311D based Khadas VIM3
 - add support for Amlogic S905X3 based SEI610 board, targeting Android support like SEI510
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Merge tag 'u-boot-amlogic-20191018' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- document alternative libretech-cc installation methods, including upstream TF-A and opensource tools
- add HDMI/CVBS display support for Amlogic G12A SoCs and SEI510 board
- add support for Amlogic A311D based Khadas VIM3
- add support for Amlogic S905X3 based SEI610 board, targeting Android support like SEI510
2019-10-18 16:36:44 -04:00
Neil Armstrong
a990c390a3 power: domain: add Amlogic Everything-Else power domain driver
Based on the 54ecb8f7028c ("Linux 5.4-rc1") Everything-Else power domain
driver for Amlogic SoCs.

This driver handles the VPU Power domain and other domains from the
Everything-Else part of the SM1 and G12A SoCs.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-10-18 14:33:21 +02:00
Neil Armstrong
2168a52e2b clk: meson-sm1: add compatible
The SM1 clock controller is almost identical to the G12A and
so far the differences don't matter.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-10-18 14:26:59 +02:00
Neil Armstrong
a10388dc69 mmc: meson-gx: add support for mmc-pwrseq-emmc
Add support for mmc-pwrseq-emmc in the meson-gx mmc driver to support
enabling the eMMC.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-10-18 14:24:05 +02:00
Neil Armstrong
04eb4f45c1 video: meson: add compatible for Amlogic G12A
Finally add the Amlogic G12A SoC compatible for the VPU driver.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-10-18 11:45:36 +02:00
Neil Armstrong
573687c3be video: meson: sync with linux drm-misc tree
Synchronize the Amlogic Meson Video driver back with the latest
DRM misc tree, adding G12A platform support, from the latest commit:
528a25d040bc ("drm: meson: use match data to detect vpu compatibility")

The sync includes the following changes from Linux adapted to U-Boot:
- Add support for VIC alternate timings
- Switch PLL to 5.94GHz base for 297Mhz pixel clock
- Add registers for G12A SoC
- Add G12A Support for VPP setup
- Add G12A Support for VIU setup
- Add G12A support for OSD1 Plane
- Add G12A support for plane handling in CRTC driver
- Add G12A support for CVBS Encoder
- Add G12A Video Clock setup
- Add G12A support for the DW-HDMI Glue
- fix G12A HDMI PLL settings for 4K60 1000/1001 variations
- fix primary plane disabling
- fix G12A primary plane disabling
- mask value when writing bits relaxed
- crtc: drv: vpp: viu: venc: use proper macros instead of magic constants
- global clean-up
- add macro used to enable HDMI PLL
- venc: set the correct macrovision max amplitude value

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-10-18 11:42:55 +02:00
Neil Armstrong
0a3561119f video: meson: remove power domain get
Remove getting and enabling the node power domain since it's now handled
by the dm core directly.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-10-18 10:46:08 +02:00
Neil Armstrong
a0513b40cc clk: meson: g12a: add support for VPU/HDMI clocks
Add necessary clock support to set up clock for the VPU and
HDMI support.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-10-18 10:46:08 +02:00
Neil Armstrong
3dcdf85efd power: domain: meson-gx-pwrc: add G12A support
Add Amlogic G12A support for the gx-pwrc driver, aligned on the
Linux v5.2 driver.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-10-18 10:46:08 +02:00
Sagar Shrikant Kadam
d26b40450b gpio: sifive: add support for DM based gpio driver for FU540-SoC
This patch adds a DM based driver model for gpio controller present in
FU540-C000 SoC on HiFive Unleashed A00 board. This SoC has one GPIO
bank and 16 GPIO lines in total, out of which GPIO0 to GPIO9 and
GPIO15 are routed to the J1 header on the board.

This implementation is ported from linux based gpio driver submitted
for review by Wesley W. Terpstra <wesley@sifive.com> and/or Atish Patra
<atish.patra@wdc.com> (many thanks !!). The linux driver can be referred
here [1]

[1]: https://lkml.org/lkml/2018/10/9/1103

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-18 09:04:01 +08:00
Tom Rini
a2fce50455 Merge tag 'for-v2020.01' of https://gitlab.denx.de/u-boot/custodians/u-boot-ubi
ubi enhancements for 2020.01
- provide a way for skipping crc checks ported from linux, and add an
  U-Boot command to set this flag on already installed systems.
- fix redundand environment management
2019-10-17 07:26:16 -04:00
Stefan Roese
524acec47c ubi: Print skip_check in ubi_dump_vol_info()
It might be interesting, if "skip_check" is set or not, so lets print
this flag in ubi_dump_vol_info() as well.

hs: fix typo in commit message

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Quentin Schulz <quentin.schulz@bootlin.com>
Cc: Boris Brezillon <boris.brezillon@bootlin.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-10-16 05:42:27 +02:00
Quentin Schulz
386f20cade ubi: provide a way to skip CRC checks
Some users of static UBI volumes implement their own integrity check,
thus making the volume CRC check done at open time useless. For
instance, this is the case when one use the ubiblock + dm-verity +
squashfs combination, where dm-verity already checks integrity of the
block device but this time at the block granularity instead of verifying
the whole volume.

Skipping this test drastically improves the boot-time.

Adapted to U-Boot by Stefan Roese.

Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Cc: Quentin Schulz <quentin.schulz@bootlin.com>
Cc: Boris Brezillon <boris.brezillon@bootlin.com>
2019-10-16 05:42:27 +02:00
Patrick Delaunay
2a43dbdf96 dm: Tidy up dump output when there are many devices
At present the 'Index' column of 'dm tree' assumes there is
two digits, this patch increase it to 3 digits.

It also aligns output of 'dm uclass', assuming the same 3 digits index.

The boards with CONFIG_PINCTRL_FULL activated have one pinconfig
by pin configuration, so they can have more than 100 devices
pinconfig (for example with stm32mp157c-ev1 board we have
106 pinconfig node).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-10-15 08:40:03 -06:00
Patrick Delaunay
e878b53a79 dm: pinctrl: introduce PINCONF_RECURSIVE option
In the Linux pinctrl binding, the pin configuration nodes don't need to
be direct children of the pin controller device (may be grandchildren for
example). This behavior is managed with the pinconfig u-class which
recursively bind all the sub-node of the pin controller.

But for some binding (when pin configuration is only children of pin
controller) that is not necessary. U-Boot can save memory and reduce
the number of pinconf instance when this feature is deactivated
(for arch stm32mp for example for SPL).

This patch allows to control this feature with a new option
CONFIG_PINCONF_RECURSIVE when it is possible for each individual
pin controller device.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fixed CONFIG_IF_ENABLED() condition, added __maybe_unused:
Signed-off-by: Simon Glass <sjg@chromium.org>
2019-10-15 08:40:03 -06:00
Anatolij Gustschin
52edfed65d dm: core: device: switch off power domain after device removal
The power domain associated with a device is enabled when probing,
but currently the domain remains enabled when the device is removed.
Some boards started to disable power domains for selected devices
via custom board_quiesce_devices(), but it doesn't work in many
cases, i. e. because devices still can be accessed later in
.remove() callback on behalf of dm_remove_devices_flags().

Utilize the DM core to power off the device power domain, but add a
device flag to be able to selectively let the power domain enabled
after device removal. This might be required for devices that must
remain enabled when booting OS, i. e. serial console for debug
output, etc.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-10-15 08:40:03 -06:00
Lokesh Vutla
0cf795a802 power: domain: Introduce dev_power_domain_off
Add dev_power_domain_off() api to disable all the power-domains
corresponding to a device

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-10-15 08:40:03 -06:00
Lokesh Vutla
af17b0dad5 remoteproc: k3_arm64: Enable DM_FLAG_DEFAULT_PD_CTRL_OFF
Enable DM_FLAG_DEFAULT_PD_CTRL_OFF for arm64 remote core so that
pd can be enabled after loading the image.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-10-15 08:40:03 -06:00
Lokesh Vutla
af94ad418d dm: core: Allow for not controlling the power-domain by DM framework
In some remoteproc cases, enabling the power domain of the core will
start running the core. In such cases image should be loaded before
enabling the power domain. But the current DM framework enables the
power-domain by default during probe. This is causing the remotecore
to start and crash as there is no valid image loaded.

In order to avoid this introduce a DM flag that doesn't allow for
enabling/disabling the power-domain by DM framework.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-10-15 08:40:03 -06:00
Michael Trimarchi
36a90eda84 dm: pinctrl: Skip not associated gpio phandle and rise a warning message
Skip not associated gpio phandle let register the other gpios on a group.
We need anyway to send out a warning to the user to fix their uboot-board.dtsi.
Thhe handle id can be found inside the decompiled dtb

dtc -I dtb -O dts -o devicetree.dts spl/u-boot-spl.dtb

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-10-15 08:40:02 -06:00
Peng Fan
f0cc4eae9a core: device: use dev_power_domain_on
When multiple power domains attached to a device, need power on
them all, so use dev_power_domain_on to do that.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-15 08:40:02 -06:00