Commit graph

21638 commits

Author SHA1 Message Date
Ovidiu Panait
3f351cd358 cpu: microblaze: add error handling in microblaze_cpu_get_desc()
Check snprintf() return value for errors.

Make microblaze_cpu_get_desc() directly return snprintf() error code if
ret < 0. Otherwise, if the return value is greater than or equal to size,
the resulting string is truncated, so return -ENOSPC.

Fixes: 816226d27e ("cpu: add CPU driver for microblaze")
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220829170205.1274484-2-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-09-13 11:32:48 +02:00
Michal Simek
bae7d37e52 net: gem: Check rate before setting it up
On QEMU setting rate for fixed clock is failing. That's why check a rate
first if the rate is the same there is no need to ask for the change.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/bc465ffd4904bfd65208b782daa06732b915db54.1661502645.git.michal.simek@amd.com
2022-09-13 11:32:48 +02:00
Ashok Reddy Soma
ad8024e040 firmware: zynqmp: Skip loading config object for Versal
SET_CONFIGURATION is not yet implemented for Versal platforms. Skip
loading config object for Versal until support is added.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/eb7ef6c6de36a1f7d056de43042f96fe3639f18e.1659691195.git.michal.simek@amd.com
2022-09-13 11:32:48 +02:00
Stefan Herbrechtsmeier
7a0bc18b63 fpga: zynq: Remove post config info message for SPL
The drivers informs the user that a post config was not run after FPGA
configuration. This message is unnecessary in SPL because the
ps7_post_config function is called via spl_board_prepare_for_boot
function before jump_to_image_no_args function from board_init_r
function.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220808145331.24723-1-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-09-12 12:03:17 +02:00
Stefan Herbrechtsmeier
b7e0750d88 zynq: Convert arm twd timer to DM driver
Move arm twd timer driver from zynq to generic location.

DM timer drivers are designed differently to original driver. Timer is
counting up and not down.
Information about clock rates are find out in timer_pre_probe() that's
why there is no need to get any additional information from DT in the
driver itself (only register offset).

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220805061629.1207-1-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-09-12 12:03:17 +02:00
Andrew Davis
96e036a4e5 firmware: ti_sci: Move ACK checking to ti_sci_do_xfer() function
We can check if the message was acknowledged in the common
ti_sci_do_xfer() which lets us remove it from after each call to this
function. This simplifies the code and reduces binary size.

Signed-off-by: Andrew Davis <afd@ti.com>
2022-08-26 10:55:46 -04:00
Andrew Davis
f127a58e05 firmware: ti_sci: Remove inline keyword from functions
The inline hint is not needed here, the compiler will do the right thing
based on if we are compiling for speed or for code size. In this case the
inline causes this function to be placed inside each callsite which is
not the right thing to do for either speed nor size. There is no
performance benefit to this due to the larger function size reducing
cache locality, but there is a huge size penalty. Remove inline keyword.

Signed-off-by: Andrew Davis <afd@ti.com>
2022-08-26 10:55:46 -04:00
Andrew Davis
0d74f2684b firmware: ti_sci: Factor out message alloc failed message
We don't need to print the same message in every location, just
print it in the function that fails and remove all the extra
message printouts.

Signed-off-by: Andrew Davis <afd@ti.com>
2022-08-26 10:55:46 -04:00
Andrew Davis
5917850138 firmware: ti_sci: Reduce output on ti_sci_do_xfer error
This ti_sci_do_xfer() function already prints out the reason for the
failure, and the caller of each of these functions should also notify
the user of the failed task. Remove this extra level of error message.

Signed-off-by: Andrew Davis <afd@ti.com>
2022-08-26 10:55:46 -04:00
Sumit Garg
0ddabb6830 arm: dts: qcom: Sync pinctrl DT nodes with Linux bindings
Currently for all Qcom SoCs/boards there are separate compatibles for
GPIO and pinctrl. But this is inconsistent with official (upstream) Linux
bindings which requires only a single compatible "qcom,<SoC name>-pinctrl"
and there is no such compatible property as "qcom,tlmm-<SoC name>".

So fix this inconsistency for Qcom SoCs in order to comply with upstream
DT bindings. This is done via removing compatibles from "msm_gpio" driver
and via binding to "msm_gpio" driver from pinctrl driver in case
"gpio-controller" property is specified for pinctrl node.

Suggested-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2022-08-26 10:55:46 -04:00
Sumit Garg
cf515842b9 gpio: qcom_pmic: Add support for GPIO LV/MV subtype
GPIO LV (low voltage)/MV (medium voltage) subtypes have different
features and register mappings than 4CH/8CH subtypes. Add support
for LV and MV subtypes.

With GPIO LV/MV subtype available, add "qcom,pms405-gpio" compatible
which requires support for GPIO MV subtype.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2022-08-26 10:55:46 -04:00
Sumit Garg
e555d4caac pmic: Convert pm8916 driver to a generic Qcom PMIC driver
Since both pm8916.c and pm8916_gpio.c are already supporting multiple
Qcom SoCs, it makes sense to rename these drivers to pmic_qcom.c and
qcom_pmic_gpio.c respectively. Also, these driver can be extended to
support additional functionality if required for other Qcom SoCs.

Along with this import latest DT binding: qcom,spmi-pmic.txt from Linux
kernel and thereby remove pm8916.txt.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2022-08-26 10:55:45 -04:00
Sumit Garg
9b6f90ca92 reset: qcom: Add support for QCS404 SoC reset table
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2022-08-26 10:55:45 -04:00
Sumit Garg
42588276b3 reset: Convert ipq4019 driver to a generic Qcom driver
Since the base functionality remains the same for a reset driver on Qcom
SoCs, so leverage that to convert ipq4019 specific reset driver to a
generic Qcom reset driver. With that one just need to provide SoC specific
reset table.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2022-08-26 10:55:45 -04:00
Sumit Garg
0b746d287c phy: Add support for drivers to enable USB on QCS404 SoC
QCS404 SoC supports two types of PHY, one supports high speed mode or
USB2 PHY and the other supports super speed mode or USB3 PHY. So add
corresponding PHY drivers.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2022-08-26 10:55:45 -04:00
Sumit Garg
23ba5f34c8 phy: Move qcom SoCs specific phy drivers to qcom folder
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2022-08-26 10:55:45 -04:00
Tom Rini
a2aa7d6550 Merge commit 'ac30d240dbb520d0980f0687630feb702a14f51a' of https://source.denx.de/u-boot/custodians/u-boot-nand-flash into next
Re-sync again on some linux part, add some fixes for fsl_elbc from
Pali and switch
imx8mn bsh to use nand base ident

For nand subsystem tested on:
 - imx8mn  Macronix MX30LF4G18AC
 - P2020 based board Turris 1.1 for fsl_elbc
2022-08-24 17:30:29 -04:00
Michael Walle
1b34339c50 button: gpio: add DM_GPIO dependency
The gpio-button driver depends on DM_GPIO, add it to Kconfig to avoid
build errors.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:39:06 +02:00
Michael Walle
e9e73d78a8 timer: add orion-timer support
Add timer support for Kirkwood and MVEBU devices.

Cc: Pali Rohár <pali@kernel.org>
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:39:00 +02:00
Pali Rohár
ac30d240db mtd: rawnand: fsl_elbc: Fix reading address pointer from DT
During compilation gcc throws warning:

    drivers/mtd/nand/raw/fsl_elbc_nand.c: In function ‘fsl_elbc_nand_probe’:
    drivers/mtd/nand/raw/fsl_elbc_nand.c:841:31: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
      return fsl_elbc_chip_init(0, (void *)dev_read_addr(dev), dev);
                                   ^

Fix it by using dev_read_addr_ptr() function which returns pointer instead
of dev_read_addr() which returns integer type.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-08-22 11:15:57 +02:00
Pali Rohár
080b7d89ae mtd: rawnand: fsl_elbc: Remove NAND_NO_SUBPAGE_WRITE flag
Subpage write support for freescale eLBC NAND controller driver is
implemented in U-Boot and was fixes in the commit d3963721d9 ("nand: Sync
with Linux v4.1").

So remove NAND_NO_SUBPAGE_WRITE flag from the fsl_elbc_nand.c driver. This
partially revert commit cb04c77234 ("nand/fsl: add NAND_NO_SUBPAGE_WRITE
to eLBC and IFC drivers"), only eLBC driver part.

With this change U-Boot with default settings can read from NAND UBIFS
image created on Linux with Linux default settings. Prior this change
U-Boot was unable to read from NAND UBIFS images created with Linux default
settings due to differnet UBI geometry.

Linux kernel fsl_elbc_nand.c driver also does not set NAND_NO_SUBPAGE_WRITE
flag and has implemented subpage write support.

Fixes: cb04c77234 ("nand/fsl: add NAND_NO_SUBPAGE_WRITE to eLBC and IFC drivers")
Fixes: d3963721d9 ("nand: Sync with Linux v4.1")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-By: Michael Trimarchi<michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-08-22 11:15:39 +02:00
Michael Trimarchi
007f1d1473 mtd: nand: samsung: Retrieve ECC requirements from extended
Upstream linux commit 8fc82d456e40a0.

On some nand controllers with hw-ecc the controller code wants to know
the ecc strength and size and having these as 0, 0 is not accepted.

Specifying these in devicetree is possible but undesirable as the nand
may be different in different production runs of the same board, so it
is better to get this info from the nand id where possible.

This commit adds code to read the ecc strength and size from the nand
for Samsung extended-id nands. This code is based on the info for the 5th
id byte in the datasheets for the following Samsung nands: K9GAG08U0E,
K9GAG08U0F, K9GAG08X0D, K9GBG08U0A, K9GBG08U0B. These all use these bits
in the exact same way.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-08-22 11:15:24 +02:00
Michael Trimarchi
6cda1dc210 mtd: nand: Rename nand_get_flash_type() into nand_detect()
Upstream linux commit 7bb427990ee364.

Rename the function to match this new behavior.

NOTE: fix nand_detect/nand_get_flash_type parameters in
mxs_nand_spl. This code seems never executed by any board
as alternative for nand detect

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-08-22 11:15:15 +02:00
Michael Trimarchi
c76f9ddf91 mtd: nand: change return type of nand_get_flash_type() to int
Upstream linux commit 4722c0e958e636.

The returned "type" is never used in nand_scan_ident() and spl code

Make nand_get_flash_type() simply return an integer value in order
to avoid unnecessary ERR_PTR/PTR_ERR dance.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-08-22 11:15:04 +02:00
Michael Trimarchi
8a67acfce2 mtd: nand: Rename the nand_manufacturers struct
Upstream linux commit 8cfb9ab68f9070.

Drop the 's' at the end of nand_manufacturers since the struct is actually
describing a single manufacturer, not a manufacturer table.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-08-22 11:14:37 +02:00
Holger Brunck
845102cbe9 powerpc: remove support for kmtergr1 and MPC8309
The kmtegr1 board is out of maintenance and can be removed. As it is the
only board in the tree using MPC8309 the support for this CPU is dropped
completely.

Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
2022-08-20 22:45:00 -04:00
Tom Rini
94633c36f9 net: Make DM_ETH be selected by NETDEVICE
The deadline for DM_ETH migration passed 2 years ago.  Now that
platforms which cannot be migrated have been either removed or had
drivers disabled, and platforms that needed minor help to migrate have
been forcefully migrated, we can complete the migration.

This entails select'ing DM_ETH under NETDEVICES, and then removing now
extraneous depends on lines.  In a few places, we can now either remove
options or just simplify later dependencies.

Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-20 21:18:15 -04:00
Tom Rini
a2504a1bd2 net: ks8851_mll: Remove legacy non-DM_ETH code and callers
As this driver has been converted to DM_ETH and the migration deadline
is 2 years passed, remove the legacy code and callers.

Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-20 21:18:15 -04:00
Tom Rini
adae2ed62d fsl-mc: Update dependencies for DM_ETH
When using DM_ETH, which should be the default now, we need to always
have DM_MDIO and FSL_LS_MDIO enabled, so select them.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Cc: Wasim Khan <wasim.khan@nxp.com>
Cc: Udit Agarwal <udit.agarwal@nxp.com>
Cc: Ashish Kumar <Ashish.Kumar@nxp.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Manish Tomar <Manish.Tomar@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-20 21:18:15 -04:00
Tom Rini
9d7add8ac9 net: lpc32xx_eth.c ethernet driver
This driver has not been converted to DM_ETH.  The migration
deadline passed 2 years ago.

Cc: Trevor Woerner <twoerner@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-20 21:18:15 -04:00
Tom Rini
ecf1d2741d net: Remove smc91111 ethernet driver
This driver has not been converted to DM_ETH.  The migration deadline
passed 2 years ago.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: David Feng <fenghua@phytium.com.cn>
Cc: Liviu Dudau <liviu.dudau@foss.arm.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-12 16:10:50 -04:00
Tom Rini
ff4e87c030 Convert CONFIG_SYS_FSL_QMAN_V3 et al to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_NGPIXIS
   CONFIG_SYS_FSL_QMAN_V3
   CONFIG_SYS_FSL_RAID_ENGINE
   CONFIG_SYS_FSL_RMU
   CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
   CONFIG_SYS_FSL_SRIO_LIODN
   CONFIG_SYS_FSL_TBCLK_DIV
   CONFIG_SYS_FSL_USB1_PHY_ENABLE
   CONFIG_SYS_FSL_USB2_PHY_ENABLE
   CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
   CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Tom Rini
c6eec0182a Convert CONFIG_SYS_FSL_MAX_NUM_OF_SEC to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_MAX_NUM_OF_SEC

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Tom Rini
7ae1e6a3a3 Convert CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Tom Rini
d0748898d8 Convert CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
   CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS

And we remove the entries from the README for a number of already
converted items.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Simon Glass
55f7990bfe dm: core: Add support for writing u32 with ofnode
Add a new function to write an integer to an ofnode (live tree or
flat tree).

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:24 -04:00
Simon Glass
39e42be12b dm: core: Allow writing to a flat tree with ofnode
In generally it is not permitted to implement an ofnode function only for
flat tree or live tree. Both must be supported. Also the code for
live tree access should be in of_access.c rather than ofnode.c which is
really just for holding the API-conversion code.

Update ofnode_write_prop() accordingly and fix the test so it can work
with flat tree too.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:24 -04:00
Simon Glass
be0789a8ee dm: core: Swap parameters of ofnode_write_prop()
It is normal for the length to come after the value in libfdt. Follow this
same convention with ofnode.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:24 -04:00
Simon Glass
331048471d dm: core: Introduce support for multiple trees
At present ofnode only works with a single device tree, for the most part.
This is the control FDT used by U-Boot.

When booting an OS we may obtain a different device tree and want to
modify it. Add some initial support for this into the ofnode API.

Note that we don't permit aliases in this other device tree, since the
of_access implementation maintains a list of aliases collected at
start-up. Also, we don't need aliases to do fixups in the other FDT. So
make sure that flat tree and live tree processing are consistent in this
area.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:23 -04:00
Simon Glass
da62e1e861 video: Rename structs and functions to avoid VBE
Rename these to VESA, itself an abbreviation, to avoid a conflict with
Verified Boot for Embedded.

Rename this to avoid referencing VBE.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:23 -04:00
Simon Glass
cafe8712e8 video: Renname vbe.h to vesa.h
We want to use VBE to mean Verfiied Boot for Embedded in U-Boot. Rename
the existing VBE (Vesa BIOS extensions) to allow this.

Verified Boot for Embedded is documented doc/develop/vbe.rst

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:23 -04:00
Simon Glass
4e4bf9449b common: Drop display_options.h from common header
Move this out of the common header and include it only where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-10 13:46:55 -04:00
Michal Simek
99699a7707 power: regulator: Remove i2c header from gpio regulator
i2c is not used that's why header is not needed.

Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-08-10 13:38:30 -04:00
Marek Vasut
2349ecffec mmc: Do not send status of send_status is false
Commit 44645f87de ("mmc: Fix mmc_switch excessive timeout") introduced
a side effect where CMD13 SEND_STATUS is issued in case mmc_wait_dat0()
does not return -ENOSYS and $send_status is not set. This happens on all
hardware which does implement .mmc_wait_dat0 callback, e.g. i.MX8M .

This leads to lengthy timeout before booting OS in case of eMMC in one
of the HS200/HS400 modes, since the card cannot respond to CMD13 while
downgrading from HS200/HS400 to regular HS mode.

Fix this by adding the missing conditional.

Fixes: 44645f87de ("mmc: Fix mmc_switch excessive timeout")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Kirill Kapranov <kirill.kapranov@compulab.co.il>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Ye Li <ye.li@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-08-10 13:38:29 -04:00
Pali Rohár
ca514d0267 misc: atsha204a: Don't check for error when waking up the device
The device ignores any levels or transitions on the SCL pin when the device
is idle, asleep or during waking up.

Linux kernel driver for atsha204a (atmel-sha204a.ko) also ignores return
value from i2c wakeup send command, see:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/crypto/atmel-i2c.c?h=v5.19#n174

And also userspace Turris libatsha204 library ignores return value from
wakeup send command, see:
https://gitlab.nic.cz/turris/libatsha204/-/blob/v29.2/src/libatsha204/layer_ni2c.c#L75-76

U-Boot driver should do same thing.

Fixes waking up ATSHA204 on Turris 1.x boards.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Marek Behún <kabel@kernel.org>
2022-08-09 10:01:31 +02:00
Pali Rohár
ca3756c86b pci: pci_mvebu: Add support for reset-gpios
Release PERST# signal via GPIO when "reset-gpios" is defined in device tree.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Pali Rohár
019090647c arm64: a37xx: pinctrl: Improve description for pinmux command
In more cases group name consist of function name followed by function
number. So if function name is just prefix of group name, show group name.

So in 'pinmux status -a' command output would be visible also extended
function number, which is useful for debugging.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Pali Rohár
361cf5c7e1 arm64: a37xx: pinctrl: Remove unused macro PIN_GRP()
Macro PIN_GRP() is not used, remove it.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Pali Rohár
7a1c071173 arm64: a37xx: pinctrl: Fix definitions for MPP pins 20-22
All 3 MPP pins (20, 21 and 22) can be configured individually and also can
be configured to GPIO functions. Fix definitions for these MPP pins in
existing pin groups. After this change GPIO function can be enabled just
for one of these 3 pins.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Chris Packham
65b3b24eba gpio: Remove mvgpio driver
The last user of this driver was removed in commit dee08b1999 ("arm:
Remove gplugd board"). Remove the unused driver.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Pali Rohár <pali@kernel.org>
2022-08-09 08:58:27 +02:00