When the resolution is set to 800x600 and 1024x768,
but, the driver will use 1280x1024 resolution to set the DIU register
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
add new configuration file da850_am18xxevm.h for AM18xx boards
which are based on da850 SOC. AM18xx has WINBOND spi flash which
is indicated in the config file. And make appropriate changes in
board.cfg for building.
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This is needed to support the latest kernel versions.
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The devkit8000 ships with either a 128MB or 256MB NAND chip. In
order for SPL to work with 256MB NAND CONFIG_SYS_NAND_5_ADDR_CYCLE
needs to be set. After talking with Scott Wood this should be
safe to set even for smaller NAND chips.
Cc: Scott Wood <scottwood@freescale.com>
Cc: Frederik Kriewitz <frederik@kriewitz.eu>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This enables Vpp and disables the flash protection on the
Integrator when starting U-Boot. The integrator/AP has double
protection mechanisms: this one and the EBI protection bit
(patch earlier), the Integrator/CP has only one line of
protection in these registers.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Break out the AP system controller and CP "CP controller"
registers into a header file, it gives better overview than
hardcoding its values and other disturbing practices.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This reconfigures the EBI (External Bus Interface) on the
integrator so that chip select 1, handling the flash memory, is
set to writeable. Without this it is not possible for U-Boot to
access flash memory and it crashes on startup since CFI won't
work properly.
Since this is the first time we use the EBI, we create a header
file for its registers.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Casting around to *(volatile ulong *) doesn't look good, so include
the <asm/io.h> macros and use good old readl() instead.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Do away with the config.mk file and move the text offset to the
config files to make things easier.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Alter the board.cfg to pass core module configuration flags
so we can make compile-time switches for different core
modules. These are already in use for some low-level code,
they just got lost in the conversion to the new build
system.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
We cause CCSRBAR to be relocated in the SPL phase of NAND boot which
isn't expected and breaks things. Fixing the board config.h to NOT
relocate CCSR during the CONFIG_NAND_SPL phase.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Make linker script handles .data.rel sections.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
Tested-by: Macpaul Lin <macpaul@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
fsl_i2c.c: In function 'i2c_init':
fsl_i2c.c:245:7: warning: assignment discards qualifiers from pointer target type
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This allows the SPL to avoid compiling in the CPU support code.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
When booting from Flash, the Integrator remaps its flash memory
from 0x24000000 to 0x00000000, and starts executing it at
0x00000000. This ROM thus hides the RAM underneath and first
0x40000 bytes of the memory cannot be tested by get_ram_size().
So let's test from 0x40000 to the end of detected memory
instead.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The new IO FPGA implementation for Versatile Express contains an MMCI
(PL180) cell with the FIFO extended to 128 words. This causes the
read_bytes() function to go into an infinite loop; as it will wait for
for the half-full signal (SDI_STA_RXFIFOBR) if there are more than 8
words remaining (SDI_FIFO_BURST_SIZE), but it won't receive this signal
once there are fewer than 64 words left to transfer.
One possible fix is to add some build time configuration to change
SDI_FIFO_BURST_SIZE for the new implementation. However, the problematic
code only seems to exist as a small performance optimisation, so the
solution implemented by this patch is to simply remove it. The error
checking following the loop is also removed as this will be handled by
code further down the function.
Cc: Andy Fleming <afleming@gmail.com>
Signed-off-by: Jon Medhurst <jon.medhurst@linaro.org>
timer.c used static data and are called before relocation.
Move all static variables into global_data structure. Also cleanup
timer.c from unused stubs and make it truly use 64 bit tick values.
Remove reset_timer_masked() get_timer_masked()
reference: arch/arm/cpu/arm926ejs/at91/timer.c
Based on Reinhard Meyer <u-boot@emk-elektronik.de>'s patches
5dca710a3dcfff263f41
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Tested-by: Macpaul Lin <macpaul@gmail.com>
Wrong pointer was being used to copy code into L2SRAM.
Also removed the unreferenced variable l2srbar.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
A few of the config registers changed definition between MMU v1.0 and
MMUv2.0. The new e6500 core from Freescale implements v2.0 of the
architecture.
Specifically, how we determine the size of TLB entries we support in the
variable size (or TLBCAM/TLB1) array is specified in a new register
(TLBnPS - TLB n Page size) instead of via TLBnCFG.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Include call to usb device-fixup only when CONFIG_HAS_FSL_DR_USB is
defined for the platform - P1020RDB, P1010RDB, P1020-PC
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Fix USB device-fixup warning "node not found". This was occuring
because of static nature of start_offset variable
Static start_offset was storing offset of last node modified, and
was becoming issue if node fixup is carried multiple times,
resulting in "node not found" warning
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
On some Freescale systems (e.g. those booted from the on-chip ROM), the
TLB that covers the boot page can also cover CCSR, which breaks the CCSR
relocation code. To fix this, we resize the boot page TLB so that it only
covers the 4KB boot page.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Verify that CCSR is actually located where it is supposed to be before
we relocate it. This is useful in detecting U-Boot configurations that
are broken (e.g. an incorrect value for CONFIG_SYS_CCSRBAR_DEFAULT).
If the current value is wrong, we enter an infinite loop, which is handy
for debuggers.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Calls to tlbwe and tlbsx should be preceded with an isync/msync pair.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Some of the MAS register macros do not protect the parameter with
parentheses, which could cause wrong values if the parameter includes
operators.
Also fix the definition of TSIZE_TO_BYTES() so that it actually uses
the parameter. This hasn't caused any problems to date because the
parameter was always been 'tsize'.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add board_eth_init(). PCIe network card is also supported.
Put RGMII init after tsec_eth_init().
Skip initializing eTSEC3 and eTSEC4 with Carrier boards prior to ver 1.3.
Signed-off-by: Ebony Zhu
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Erratum NMG_eTSEC129 (eTSEC86 in MPC8548 document) applies to some early
verion silicons. This workaround detects if the eTSEC Rx logic is properly
initialized, and reinitialize the eTSEC Rx logic.
Signed-off-by: Gong Chen <g.chen@freescale.com>
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
TBI PHY address (TBIPA) register has been set in general frame manager
phy init funciton dtsec_init_phy() in drivers/net/fm/eth.c
So remove the duplicate code on QorIQ frame manager Ethernet related
platforms, which include Hydra board, P4080DS board and P2041rdb board.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
add a function in board file to pass board revision
info to kernel. Revision number 0 and 1 are passed in
case of DM6467 and DM6467T respectively.
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
add new configuration file for dm6467T and appropraite changes
in boards.cfg. dm6467T is the new varaiant of dm6467 SOC which
supports 33 MHz reference clock where as dm6467 supports 27 MHz
reference clock.
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
da850_ddr_setup() expects the BOOTUNLOCK bit to be set in
If BOOTUNLOCK is not set in this define, several configuration
bits will not be writeable and the code will not work.
Since the BOOTUNLOCK and TIMUNLOCK bits are not configuration options
but access control bits, this patch changes the code to work
irrespective of the value of these bits in CONFIG_SYS_DA850_DDR2_SDBCR.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The LPSC functions defined in
arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c
are replaced by those already defined in
arch/arm/cpu/arm926ejs/davinci/psc.c.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Rename arch/arm/cpu/arm926ejs/davinci/am1808_lowlevel.c and
arch/arm/include/asm/arch-davinci/am1808_lowlevel.h to da850_lowlevel.c
and da850_lowlevel.h since they apply not only to the AM1808 SoC
but to all DA850 chips. The function names and #defines are changed
likewise.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch fixes following compile error for da8xx evm
da830evm.c: In function 'board_init':
da830evm.c:222: error: 'DAVINCI_SYSCFG_SUSPSRC_UART2' undeclared (first use in this function)
da830evm.c:222: error: (Each undeclared identifier is reported only once
da830evm.c:222: error: for each function it appears in.)
make[2]: *** [da830evm.o] Error 1
similarly for da850evm.
introduced through commit:
f9fc237f1f
Signed-off-by: Prabhakar Lad <prabhakar.csengg@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
New syntax:
env export [-t | -b | -c] [-s size] addr [var ...]
With this change it is possible to provide a list of variables names
that shall be exported. Whenno arguments are given, the whole
environment gets exported.
NOTE: The new handling of the "size" argument means a change to the
user API.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The new MPC8360EMDS board changes the oscillator to 33.33MHz
in order to support QE 500MHz since 2008.
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* 'master' of git://git.denx.de/u-boot-arm:
Arm: re-introduce the MACH_TYPE_XXXXXX for EB_CPUX9K2 board
arm: jadecpu: Readd MACH_TYPE_JADECPU
at91: defined mach-types for otc570 board in board config file
at91: defined mach-types for meesc board in board config file
mx31pdk: Enable D and I caches
ehci-mxc: remove incorrect comment
README: Fix supported i.MX SoC list for CONFIG_MXC_SPI
mx53: Turn off child clocks before reconfigure perclk_root
qong: enable support for compressed images
imx: imx31_phycore.h: fix checkpatch warnings
vision2: Remove unused get_board_rev function
mx53smd: Remove unused get_board_rev function
mx53ard: Remove unused get_board_rev function
mx53evk: Remove unused get_board_rev function
mx53evk: Add RTC support
mx53loco: Remove unused get_board_rev function
mx53evk: Remove unneeded '1' from mx53evk.h
OMAP3: mvblx: Initial support for mvBlueLYNX-X
ARM: dig297: Define MACH_TYPE_OMAP3_CPS and CONFIG_MACH_TYPE
omap3: mem: Move comments next to definitions
omap3: mem: Clean-up whitespaces
omap3: mem: Define and use common macros
Davinci: ea20: added PREBOOT to configuration
Davinci: ea20: added I2C support
Davinci: ea20: added video support
VIDEO: davinci: add framebuffer to da8xx
ARM: Davinci: added missing registers to hardware.h
Davinci: ea20: add gpios for LCD backlight control
Davinci: ea20: add gpio for keeping power on in board_late_init
Davinci: ea20: Add default U-Boot environment
Davinci: ea20: Add early init to get early output from console
Davinci: ea20: Add NAND support
Davinci: ea20: set GPIOs to hold MII-Phy in reset and set UART0-Switch for console
Davinci: ea20: set console on UART0
arm, davinci: add cam_enc_4xx support
arm926ejs, davinci: add missing spi defines for dm365
arm926ejs, davinci: add cpuinfo for dm365
arm, davinci: add lowlevel function for dm365 soc
arm, davinci: add header files for dm365
spl, nand: add 4bit HW ecc oob first nand_read_page function
arm, davinci: add support for new spl framework
spl: add option for adding post memory test to the SPL framework
net, davinci_emac: make clock divider in MDIO control register configurable
arm, usb, davinci: make USBPHY_CTL register configurable
usb, davinci: add enable_vbus() weak function
omap3evm: fix errors caused by multiple definitions
omap3evm: Add (quick) configuration for NAND only
omap3evm: Add (quick) configuration for MMC/SD only
omap3evm: move common config options to new file
omap3evm: Prepare to split configuration
omap3evm: Reorder related config options
omap/spl: actually enable the console
davinci_emac: compilation fix, phy is array now
omap3evm: Set environment variable 'ethaddr'
arm, arm926: fix missing symbols in NAND_SPL mode
arm, davinci: Add function lpsc_syncreset()
arm, davinci: replace CONFIG_PRELOADER with CONFIG_SPL_BUILD
arm/km: portl2 environment address update to P1B
arm/km: adapt bootcounter evaluation
arm/km: enable jffs2 cmds
arm/km: trigger reconfiguration for the Xilinx FPGA
arm/km: add boardid and hwkey to kernel command line
ARM: Reintroduce MACH_TYPE_KM_KIRKWOOD for keymile ARM boards
netspace_v2: enable I2C EEPROM support
netspace_v2: fix SDRAM configuration
armada100: define CONFIG_SYS_CACHELINE_SIZE
pantheon: define CONFIG_SYS_CACHELINE_SIZE
kirkwood: define CONFIG_SYS_CACHELINE_SIZE
kirkwood: drop empty asm-offsets.s file
arm/km/mgcoge3un: enhance "waitforne" feature
arm/km: add variable waitforne to mgcoge3un
gplugD: Fix for error:MACH_TYPE_SHEEVAD undeclared
ARM: dreamplug: fix compilation
ARM: DockStar: fix compilation
ARM: netspace_v2: fix warnings
am335x: Drop board_sysinfo struct
am335x: Temporarily add MACH_TYPE define
misc:pmic:samsung Enable PMIC driver at C210 Universal target
dcache:s5p CONFIG_SYS_CACHELINE_SIZE added for s5p UNIVERSAL C210 target
dcache:s5p CONFIG_SYS_CACHELINE_SIZE added for s5p GONI target
smdkv310: use macro for mmc data read function address
smdkv310: use spl framework for mmc spl
SMDKV310: use get_ram_size() to validate dram size
SMDKV310: Initialize board id using CONFIG_MACH_TYPE
ORIGEN : use absolute paths and fix tool naming
ORIGEN : enable device tree support
MX25: tx25: Fix building due to missing MACH_TYPE
mx31: Add board support for HALE TT-01
mx31: add ESD control registers
mx31: define pins and init for UART2 and CSPI3
MX35: add support for flea3 board
MX51: vision2: add MACH_TYPE in config file
vision2: Remove unused header file
mx51evk: Remove unused get_board_rev function
mx51evk: Remove unneeded '1' from mx51evk.h
I2C: Fix mxc_i2c.c problem on imx31_phycore
mx35pdk: Add RTC support
mx51evk: Use GPIO API for configuring the IOMUX
mx51evk: Add RTC support
rtc: Make mc13783-rtc driver generic
qong: remove unneeded IOMUX settings
qong: Use mx31_set_gpr to setup USBH2 pins
mx31: Introduce mx31_set_gpr function
mx31pdk: Add MC13783 PMIC support
qong: remove unneeded "1" from qong.h
misc: pmic: fix regression in pmic_fsl.c (SPI)
mx5 configs: CONFIG_PRIME should really be CONFIG_ETHPRIME
MX35: Drop unnecessary prototypes from imx-regs.h
I2C: added I2C-2 and I2C-3 to MX35
MX35: factorize common assembly code
MX35: add reset cause as provided by other i.MX
MX35: add pins definition for UART3
MX35: added ESDC structure to imx-regs
* 'master' of git://git.denx.de/u-boot-coldfire:
ColdFire: The EB+MCF-EV123 boards config update
ColdFire: Fix the compile issue for M52277
ColdFire:Moving the remaining coldfire boards to boards.cfg
